4 #ifndef __NR_sys_iosetup2
5 #define __NR_sys_iosetup2 335
8 static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
9 unsigned int *ecx, unsigned int *edx)
12 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
13 : "0" (*eax), "2" (*ecx)
17 #include "arch-x86-common.h" /* IWYU pragma: export */
19 #define FIO_ARCH (arch_x86_64)
21 #define FIO_HUGE_PAGE 2097152
23 #define nop __asm__ __volatile__("rep;nop": : :"memory")
24 #define read_barrier() __asm__ __volatile__("lfence":::"memory")
25 #define write_barrier() __asm__ __volatile__("sfence":::"memory")
27 static inline unsigned long arch_ffz(unsigned long bitmask)
29 __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask));
33 static inline unsigned long long get_cpu_clock(void)
37 __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));
38 return ((unsigned long long) hi << 32ULL) | lo;
42 #define ARCH_HAVE_SSE4_2
43 #define ARCH_HAVE_CPU_CLOCK
45 #define RDRAND_LONG ".byte 0x48,0x0f,0xc7,0xf0"
46 #define RDSEED_LONG ".byte 0x48,0x0f,0xc7,0xf8"
47 #define RDRAND_RETRY 100
49 static inline int arch_rand_long(unsigned long *val)
53 asm volatile("1: " RDRAND_LONG "\n\t"
58 : "=r" (ok), "=a" (*val)
59 : "0" (RDRAND_RETRY));
64 static inline int arch_rand_seed(unsigned long *seed)
68 asm volatile(RDSEED_LONG "\n\t"
70 : "=qm" (ok), "=a" (*seed));