arch/arch-ia64.h

   1 #ifndef ARCH_IA64_H
   2 #define ARCH_IA64_H
   3
   4 #define ARCH    (arch_ia64)
   5
   6 #ifndef __NR_ioprio_set
   7 #define __NR_ioprio_set         1274
   8 #define __NR_ioprio_get         1275
   9 #endif
  10
  11 #ifndef __NR_fadvise64
  12 #define __NR_fadvise64          1234
  13 #endif
  14
  15 #ifndef __NR_sys_splice
  16 #define __NR_sys_splice         1297
  17 #define __NR_sys_tee            1301
  18 #define __NR_sys_vmsplice       1302
  19 #endif
  20
  21 #define nop             asm volatile ("hint @pause" ::: "memory");
  22 #define read_barrier()  asm volatile ("mf" ::: "memory")
  23 #define writebarrier()  asm volatile ("mf" ::: "memory")
  24
  25 #define ia64_popcnt(x)                                                  \
  26 ({                                                                      \
  27         unsigned long ia64_intri_res;                                   \
  28         asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x));         \
  29         ia64_intri_res;                                                 \
  30 })
  31
  32 static inline unsigned long arch_ffz(unsigned long bitmask)
  33 {
  34         return ia64_popcnt(bitmask & (~bitmask - 1));
  35 }
  36 #define ARCH_HAVE_FFZ
  37
  38 typedef struct {
  39         volatile unsigned int lock;
  40 } spinlock_t;
  41
  42 #define IA64_SPINLOCK_CLOBBERS "ar.ccv", "ar.pfs", "p14", "p15", "r27", "r28", "r29", "r30", "b6", "memory"
  43
  44 static inline void spin_lock(spinlock_t *lock)
  45 {
  46         register volatile unsigned int *ptr asm ("r31") = &lock->lock;
  47         unsigned long flags = 0;
  48
  49         __asm__ __volatile__("{\n\t"
  50                         "  mov ar.ccv = r0\n\t"
  51                         "  mov r28 = ip\n\t"
  52                         "  mov r30 = 1;;\n\t"
  53                         "}\n\t"
  54                         "cmpxchg4.acq r30 = [%1], r30, ar.ccv\n\t"
  55                         "movl r29 = ia64_spinlock_contention_pre3_4;;\n\t"
  56                         "cmp4.ne p14, p0 = r30, r0\n\t"
  57                         "mov b6 = r29;;\n\t"
  58                         "mov r27=%2\n\t"
  59                         "(p14) br.cond.spnt.many b6"
  60                         : "=r"(ptr) : "r"(ptr), "r" (flags)
  61                         : IA64_SPINLOCK_CLOBBERS);
  62 }
  63
  64 static inline void spin_unlock(spinlock_t *lock)
  65 {
  66         read_barrier();
  67         __asm__ __volatile__("st4.rel.nta [%0] = r0\n\t" :: "r" (lock));
  68 }
  69
  70 #endif