Add cross-stripe intel sample verify job

[fio.git] / crc / crc32c-intel.c

diff --git a/crc/crc32c-intel.c b/crc/crc32c-intel.c
index 8e1cd587dcec85adc2a75ec4bd824e75457514b5..6e810a28f93608dfafcaac4bb6dec03bea526554 100644 (file)
--- a/crc/crc32c-intel.c
+++ b/crc/crc32c-intel.c
@@ -1,10 +1,3 @@
-#include <inttypes.h>
-#include <string.h>
-#include <unistd.h>
-#include <stdlib.h>
-#include <signal.h>
-#include <sys/types.h>
-#include <sys/wait.h>
 #include "crc32c.h"
 
 /*
@@ -18,7 +11,7 @@
  * Volume 2A: Instruction Set Reference, A-M
  */
 
-int crc32c_intel_available = 0;
+bool crc32c_intel_available = false;
 
 #ifdef ARCH_HAVE_SSE4_2
 
@@ -30,7 +23,7 @@ int crc32c_intel_available = 0;
 #define SCALE_F 4
 #endif
 
-static int crc32c_probed;
+static bool crc32c_probed;
 
 static uint32_t crc32c_intel_le_hw_byte(uint32_t crc, unsigned char const *data,
                                        unsigned long length)
@@ -81,14 +74,14 @@ uint32_t crc32c_intel(unsigned char const *data, unsigned long length)
 void crc32c_intel_probe(void)
 {
        if (!crc32c_probed) {
-               unsigned int eax, ebx, ecx, edx;
+               unsigned int eax, ebx, ecx = 0, edx;
 
                eax = 1;
 
                do_cpuid(&eax, &ebx, &ecx, &edx);
                crc32c_intel_available = (ecx & (1 << 20)) != 0;
-               crc32c_probed = 1;
+               crc32c_probed = true;
        }
 }
 
-#endif /* ARCH_HAVE_SSE */
+#endif /* ARCH_HAVE_SSE4_2 */