Add Hygon SoC support to enable tsc_reliable feature

[fio.git] / arch / arch-x86_64.h

diff --git a/arch/arch-x86_64.h b/arch/arch-x86_64.h
index 8f33fc541ee6f266e96f9f507ccc3782d618392c..d49bcd7f34478f969f4975608624d14be6be8e94 100644 (file)
--- a/arch/arch-x86_64.h
+++ b/arch/arch-x86_64.h
@@ -1,5 +1,12 @@
-#ifndef ARCH_X86_64_h
-#define ARCH_X86_64_h
+#ifndef ARCH_X86_64_H
+#define ARCH_X86_64_H
+
+#ifndef __NR_sys_io_setup2
+#define __NR_sys_io_setup2     335
+#endif
+#ifndef __NR_sys_io_ring_enter
+#define __NR_sys_io_ring_enter 336
+#endif
 
 static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
                            unsigned int *ecx, unsigned int *edx)
@@ -10,32 +17,10 @@ static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
                : "memory");
 }
 
-#include "arch-x86-common.h"
+#include "arch-x86-common.h" /* IWYU pragma: export */
 
 #define FIO_ARCH       (arch_x86_64)
 
-#ifndef __NR_ioprio_set
-#define __NR_ioprio_set                251
-#define __NR_ioprio_get                252
-#endif
-
-#ifndef __NR_fadvise64
-#define __NR_fadvise64         221
-#endif
-
-#ifndef __NR_sys_splice
-#define __NR_sys_splice                275
-#define __NR_sys_tee           276
-#define __NR_sys_vmsplice      278
-#endif
-
-#ifndef __NR_shmget
-#define __NR_shmget             29
-#define __NR_shmat              30
-#define __NR_shmctl             31
-#define __NR_shmdt              67
-#endif
-
 #define        FIO_HUGE_PAGE           2097152
 
 #define nop            __asm__ __volatile__("rep;nop": : :"memory")
@@ -59,6 +44,7 @@ static inline unsigned long long get_cpu_clock(void)
 #define ARCH_HAVE_FFZ
 #define ARCH_HAVE_SSE4_2
 #define ARCH_HAVE_CPU_CLOCK
+#define ARCH_HAVE_AIORING
 
 #define RDRAND_LONG    ".byte 0x48,0x0f,0xc7,0xf0"
 #define RDSEED_LONG    ".byte 0x48,0x0f,0xc7,0xf8"