+ unsigned int tbl, tbu0, tbu1;
+ unsigned long long ret;
+
+ do {
+ if (arch_flags & ARCH_FLAG_1) {
+ tbu0 = mfspr(SPRN_ATBU);
+ tbl = mfspr(SPRN_ATBL);
+ tbu1 = mfspr(SPRN_ATBU);
+ } else {
+ __asm__ __volatile__("mftbu %0" : "=r"(tbu0));
+ __asm__ __volatile__("mftb %0" : "=r"(tbl) );
+ __asm__ __volatile__("mftbu %0" : "=r"(tbu1));
+ }
+ } while (tbu0 != tbu1);
+
+ ret = (((unsigned long long)tbu0) << 32) | tbl;
+ return ret;