| 1 | #ifndef ARCH_X86_64_h |
| 2 | #define ARCH_X86_64_h |
| 3 | |
| 4 | static inline void do_cpuid(unsigned int *eax, unsigned int *ebx, |
| 5 | unsigned int *ecx, unsigned int *edx) |
| 6 | { |
| 7 | asm volatile("cpuid" |
| 8 | : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx) |
| 9 | : "0" (*eax), "2" (*ecx) |
| 10 | : "memory"); |
| 11 | } |
| 12 | |
| 13 | #include "arch-x86-common.h" |
| 14 | |
| 15 | #define FIO_ARCH (arch_x86_64) |
| 16 | |
| 17 | #ifndef __NR_ioprio_set |
| 18 | #define __NR_ioprio_set 251 |
| 19 | #define __NR_ioprio_get 252 |
| 20 | #endif |
| 21 | |
| 22 | #ifndef __NR_fadvise64 |
| 23 | #define __NR_fadvise64 221 |
| 24 | #endif |
| 25 | |
| 26 | #ifndef __NR_sys_splice |
| 27 | #define __NR_sys_splice 275 |
| 28 | #define __NR_sys_tee 276 |
| 29 | #define __NR_sys_vmsplice 278 |
| 30 | #endif |
| 31 | |
| 32 | #ifndef __NR_shmget |
| 33 | #define __NR_shmget 29 |
| 34 | #define __NR_shmat 30 |
| 35 | #define __NR_shmctl 31 |
| 36 | #define __NR_shmdt 67 |
| 37 | #endif |
| 38 | |
| 39 | #ifndef __NR_preadv2 |
| 40 | #define __NR_preadv2 327 |
| 41 | #endif |
| 42 | #ifndef __NR_pwritev2 |
| 43 | #define __NR_pwritev2 328 |
| 44 | #endif |
| 45 | |
| 46 | |
| 47 | #define FIO_HUGE_PAGE 2097152 |
| 48 | |
| 49 | #define nop __asm__ __volatile__("rep;nop": : :"memory") |
| 50 | #define read_barrier() __asm__ __volatile__("lfence":::"memory") |
| 51 | #define write_barrier() __asm__ __volatile__("sfence":::"memory") |
| 52 | |
| 53 | static inline unsigned long arch_ffz(unsigned long bitmask) |
| 54 | { |
| 55 | __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask)); |
| 56 | return bitmask; |
| 57 | } |
| 58 | |
| 59 | static inline unsigned long long get_cpu_clock(void) |
| 60 | { |
| 61 | unsigned int lo, hi; |
| 62 | |
| 63 | __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi)); |
| 64 | return ((unsigned long long) hi << 32ULL) | lo; |
| 65 | } |
| 66 | |
| 67 | #define ARCH_HAVE_FFZ |
| 68 | #define ARCH_HAVE_SSE4_2 |
| 69 | #define ARCH_HAVE_CPU_CLOCK |
| 70 | |
| 71 | #define RDRAND_LONG ".byte 0x48,0x0f,0xc7,0xf0" |
| 72 | #define RDSEED_LONG ".byte 0x48,0x0f,0xc7,0xf8" |
| 73 | #define RDRAND_RETRY 100 |
| 74 | |
| 75 | static inline int arch_rand_long(unsigned long *val) |
| 76 | { |
| 77 | int ok; |
| 78 | |
| 79 | asm volatile("1: " RDRAND_LONG "\n\t" |
| 80 | "jc 2f\n\t" |
| 81 | "decl %0\n\t" |
| 82 | "jnz 1b\n\t" |
| 83 | "2:" |
| 84 | : "=r" (ok), "=a" (*val) |
| 85 | : "0" (RDRAND_RETRY)); |
| 86 | |
| 87 | return ok; |
| 88 | } |
| 89 | |
| 90 | static inline int arch_rand_seed(unsigned long *seed) |
| 91 | { |
| 92 | unsigned char ok; |
| 93 | |
| 94 | asm volatile(RDSEED_LONG "\n\t" |
| 95 | "setc %0" |
| 96 | : "=qm" (ok), "=a" (*seed)); |
| 97 | |
| 98 | return 0; |
| 99 | } |
| 100 | |
| 101 | #endif |