| 1 | #ifndef FIO_ARCH_X86_COMMON |
| 2 | #define FIO_ARCH_X86_COMMON |
| 3 | |
| 4 | static inline void do_cpuid(unsigned int *eax, unsigned int *ebx, |
| 5 | unsigned int *ecx, unsigned int *edx) |
| 6 | { |
| 7 | unsigned int id = *eax; |
| 8 | |
| 9 | asm("movl %4, %%eax;" |
| 10 | "cpuid;" |
| 11 | "movl %%eax, %0;" |
| 12 | "movl %%ebx, %1;" |
| 13 | "movl %%ecx, %2;" |
| 14 | "movl %%edx, %3;" |
| 15 | : "=r" (*eax), "=r" (*ebx), "=r" (*ecx), "=r" (*edx) |
| 16 | : "r" (id) |
| 17 | : "eax", "ebx", "ecx", "edx"); |
| 18 | } |
| 19 | |
| 20 | #define ARCH_HAVE_INIT |
| 21 | extern int tsc_reliable; |
| 22 | static inline int arch_init(char *envp[]) |
| 23 | { |
| 24 | unsigned int eax, ebx, ecx, edx; |
| 25 | |
| 26 | /* |
| 27 | * Check for TSC |
| 28 | */ |
| 29 | eax = 1; |
| 30 | do_cpuid(&eax, &ebx, &ecx, &edx); |
| 31 | if (!(edx & (1U << 4))) |
| 32 | return 0; |
| 33 | |
| 34 | /* |
| 35 | * Check for constant rate and synced (across cores) TSC |
| 36 | */ |
| 37 | eax = 0x80000007; |
| 38 | do_cpuid(&eax, &ebx, &ecx, &edx); |
| 39 | tsc_reliable = edx & (1U << 8); |
| 40 | return 0; |
| 41 | } |
| 42 | |
| 43 | #endif |