ci: Verify the Android build
[fio.git] / arch / arch-aarch64.h
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78c8831e
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1#ifndef ARCH_AARCH64_H
2#define ARCH_AARCH64_H
3
4#include <unistd.h>
5#include <stdlib.h>
6#include <sys/types.h>
7#include <sys/wait.h>
8
9#define FIO_ARCH (arch_aarch64)
10
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11#define nop do { __asm__ __volatile__ ("yield"); } while (0)
12#define read_barrier() do { __sync_synchronize(); } while (0)
13#define write_barrier() do { __sync_synchronize(); } while (0)
14
15static inline int arch_ffz(unsigned long bitmask)
16{
17 unsigned long count, reversed_bits;
18 if (~bitmask == 0) /* ffz() in lib/ffz.h does this. */
19 return 63;
20
21 __asm__ __volatile__ ("rbit %1, %2\n"
22 "clz %0, %1\n" :
23 "=r"(count), "=&r"(reversed_bits) :
24 "r"(~bitmask));
25 return count;
26}
27
28#define ARCH_HAVE_FFZ
29
f57a3a31
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30static inline unsigned long long get_cpu_clock(void)
31{
32 unsigned long val;
33
34 asm volatile("mrs %0, cntvct_el0" : "=r" (val));
35 return val;
36}
37#define ARCH_HAVE_CPU_CLOCK
38
39#define ARCH_HAVE_INIT
40extern bool tsc_reliable;
41static inline int arch_init(char *envp[])
42{
43 tsc_reliable = true;
44 return 0;
45}
46
e9d0f70a
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47#define __do_syscallN(...) ({ \
48 __asm__ volatile ( \
49 "svc 0" \
50 : "=r"(x0) \
51 : __VA_ARGS__ \
52 : "memory", "cc"); \
53 (long) x0; \
54})
55
56#define __do_syscall0(__n) ({ \
57 register long x8 __asm__("x8") = __n; \
58 register long x0 __asm__("x0"); \
59 \
60 __do_syscallN("r" (x8)); \
61})
62
63#define __do_syscall1(__n, __a) ({ \
64 register long x8 __asm__("x8") = __n; \
65 register __typeof__(__a) x0 __asm__("x0") = __a; \
66 \
67 __do_syscallN("r" (x8), "0" (x0)); \
68})
69
70#define __do_syscall2(__n, __a, __b) ({ \
71 register long x8 __asm__("x8") = __n; \
72 register __typeof__(__a) x0 __asm__("x0") = __a; \
73 register __typeof__(__b) x1 __asm__("x1") = __b; \
74 \
75 __do_syscallN("r" (x8), "0" (x0), "r" (x1)); \
76})
77
78#define __do_syscall3(__n, __a, __b, __c) ({ \
79 register long x8 __asm__("x8") = __n; \
80 register __typeof__(__a) x0 __asm__("x0") = __a; \
81 register __typeof__(__b) x1 __asm__("x1") = __b; \
82 register __typeof__(__c) x2 __asm__("x2") = __c; \
83 \
84 __do_syscallN("r" (x8), "0" (x0), "r" (x1), "r" (x2)); \
85})
86
87#define __do_syscall4(__n, __a, __b, __c, __d) ({ \
88 register long x8 __asm__("x8") = __n; \
89 register __typeof__(__a) x0 __asm__("x0") = __a; \
90 register __typeof__(__b) x1 __asm__("x1") = __b; \
91 register __typeof__(__c) x2 __asm__("x2") = __c; \
92 register __typeof__(__d) x3 __asm__("x3") = __d; \
93 \
94 __do_syscallN("r" (x8), "0" (x0), "r" (x1), "r" (x2), "r" (x3));\
95})
96
97#define __do_syscall5(__n, __a, __b, __c, __d, __e) ({ \
98 register long x8 __asm__("x8") = __n; \
99 register __typeof__(__a) x0 __asm__("x0") = __a; \
100 register __typeof__(__b) x1 __asm__("x1") = __b; \
101 register __typeof__(__c) x2 __asm__("x2") = __c; \
102 register __typeof__(__d) x3 __asm__("x3") = __d; \
103 register __typeof__(__e) x4 __asm__("x4") = __e; \
104 \
105 __do_syscallN("r" (x8), "0" (x0), "r" (x1), "r" (x2), "r" (x3), \
106 "r"(x4)); \
107})
108
109#define __do_syscall6(__n, __a, __b, __c, __d, __e, __f) ({ \
110 register long x8 __asm__("x8") = __n; \
111 register __typeof__(__a) x0 __asm__("x0") = __a; \
112 register __typeof__(__b) x1 __asm__("x1") = __b; \
113 register __typeof__(__c) x2 __asm__("x2") = __c; \
114 register __typeof__(__d) x3 __asm__("x3") = __d; \
115 register __typeof__(__e) x4 __asm__("x4") = __e; \
116 register __typeof__(__f) x5 __asm__("x5") = __f; \
117 \
118 __do_syscallN("r" (x8), "0" (x0), "r" (x1), "r" (x2), "r" (x3), \
119 "r" (x4), "r"(x5)); \
120})
121
122#define FIO_ARCH_HAS_SYSCALL
123
78c8831e 124#endif