RISC-V: fix sifive and thead section mismatches in errata

[linux-block.git] / arch / riscv / errata / thead / errata.c

diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
index a86c4facc2a69906fa5cbaa6bcce304db9ab7543..c259dc925ec1e796d7300bdddfe5bde704bffd7d 100644 (file)
--- a/arch/riscv/errata/thead/errata.c
+++ b/arch/riscv/errata/thead/errata.c
@@ -83,9 +83,9 @@ static u32 thead_errata_probe(unsigned int stage,
        return cpu_req_errata;
 }
 
-void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
-                                             unsigned long archid, unsigned long impid,
-                                             unsigned int stage)
+void thead_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
+                            unsigned long archid, unsigned long impid,
+                            unsigned int stage)
 {
        struct alt_entry *alt;
        u32 cpu_req_errata = thead_errata_probe(stage, archid, impid);