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t/axmap: add regression test for overlap case resulting in 0 settable bits
[fio.git]
/
arch
/
arch-x86-common.h
diff --git
a/arch/arch-x86-common.h
b/arch/arch-x86-common.h
index 78fd40c03d40c71f9f915bf615e1cc06dce6a97a..5140f238fb78557d20e176d6160b72a7a4a97334 100644
(file)
--- a/
arch/arch-x86-common.h
+++ b/
arch/arch-x86-common.h
@@
-3,15
+3,6
@@
#include <string.h>
#include <string.h>
-static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
- unsigned int *ecx, unsigned int *edx)
-{
- asm volatile("cpuid"
- : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
- : "0" (*eax), "2" (*ecx)
- : "memory");
-}
-
static inline void cpuid(unsigned int op,
unsigned int *eax, unsigned int *ebx,
unsigned int *ecx, unsigned int *edx)
static inline void cpuid(unsigned int op,
unsigned int *eax, unsigned int *ebx,
unsigned int *ecx, unsigned int *edx)
@@
-23,9
+14,10
@@
static inline void cpuid(unsigned int op,
#define ARCH_HAVE_INIT
#define ARCH_HAVE_INIT
-extern int tsc_reliable;
+extern bool tsc_reliable;
+extern int arch_random;
-static inline
int arch_init_intel(unsigned int level
)
+static inline
void arch_init_intel(void
)
{
unsigned int eax, ebx, ecx = 0, edx;
{
unsigned int eax, ebx, ecx = 0, edx;
@@
-35,46
+27,51
@@
static inline int arch_init_intel(unsigned int level)
eax = 1;
do_cpuid(&eax, &ebx, &ecx, &edx);
if (!(edx & (1U << 4)))
eax = 1;
do_cpuid(&eax, &ebx, &ecx, &edx);
if (!(edx & (1U << 4)))
- return
0
;
+ return;
/*
* Check for constant rate and synced (across cores) TSC
*/
eax = 0x80000007;
do_cpuid(&eax, &ebx, &ecx, &edx);
/*
* Check for constant rate and synced (across cores) TSC
*/
eax = 0x80000007;
do_cpuid(&eax, &ebx, &ecx, &edx);
- return edx & (1U << 8);
+ tsc_reliable = (edx & (1U << 8)) != 0;
+
+ /*
+ * Check for FDRAND
+ */
+ eax = 0x1;
+ do_cpuid(&eax, &ebx, &ecx, &edx);
+ arch_random = (ecx & (1U << 30)) != 0;
}
}
-static inline
int arch_init_amd(unsigned int level
)
+static inline
void arch_init_amd(void
)
{
unsigned int eax, ebx, ecx, edx;
cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
if (eax < 0x80000007)
{
unsigned int eax, ebx, ecx, edx;
cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
if (eax < 0x80000007)
- return
0
;
+ return;
cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
- if (edx & (1 << 8))
- return 1;
-
- return 0;
+ tsc_reliable = (edx & (1U << 8)) != 0;
}
}
-static inline
int
arch_init(char *envp[])
+static inline
void
arch_init(char *envp[])
{
unsigned int level;
{
unsigned int level;
- char str[12];
+ char str[13];
+
+ arch_random = tsc_reliable = 0;
cpuid(0, &level, (unsigned int *) &str[0],
(unsigned int *) &str[8],
(unsigned int *) &str[4]);
cpuid(0, &level, (unsigned int *) &str[0],
(unsigned int *) &str[8],
(unsigned int *) &str[4]);
+ str[12] = '\0';
if (!strcmp(str, "GenuineIntel"))
if (!strcmp(str, "GenuineIntel"))
-
tsc_reliable = arch_init_intel(level
);
+
arch_init_intel(
);
else if (!strcmp(str, "AuthenticAMD"))
else if (!strcmp(str, "AuthenticAMD"))
- tsc_reliable = arch_init_amd(level);
-
- return 0;
+ arch_init_amd();
}
#endif
}
#endif