4 static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
5 unsigned int *ecx, unsigned int *edx)
8 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
9 : "0" (*eax), "2" (*ecx)
13 #include "arch-x86-common.h" /* IWYU pragma: export */
15 #define FIO_ARCH (arch_x86_64)
17 #define FIO_HUGE_PAGE 2097152
19 #define nop __asm__ __volatile__("rep;nop": : :"memory")
20 #define read_barrier() __asm__ __volatile__("":::"memory")
21 #define write_barrier() __asm__ __volatile__("":::"memory")
23 static inline unsigned long arch_ffz(unsigned long bitmask)
25 __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask));
29 static inline unsigned long long get_cpu_clock(void)
33 __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));
34 return ((unsigned long long) hi << 32ULL) | lo;
38 #define ARCH_HAVE_SSE4_2
39 #define ARCH_HAVE_CPU_CLOCK
41 #define RDRAND_LONG ".byte 0x48,0x0f,0xc7,0xf0"
42 #define RDSEED_LONG ".byte 0x48,0x0f,0xc7,0xf8"
43 #define RDRAND_RETRY 100
45 static inline int arch_rand_long(unsigned long *val)
49 asm volatile("1: " RDRAND_LONG "\n\t"
54 : "=r" (ok), "=a" (*val)
55 : "0" (RDRAND_RETRY));
60 static inline int arch_rand_seed(unsigned long *seed)
64 asm volatile(RDSEED_LONG "\n\t"
66 : "=qm" (ok), "=a" (*seed));
71 #define __do_syscall0(NUM) ({ \
76 : "=a"(rax) /* %rax */ \
77 : "a"(NUM) /* %rax */ \
78 : "rcx", "r11", "memory" \
83 #define __do_syscall1(NUM, ARG1) ({ \
88 : "=a"(rax) /* %rax */ \
89 : "a"((NUM)), /* %rax */ \
90 "D"((ARG1)) /* %rdi */ \
91 : "rcx", "r11", "memory" \
96 #define __do_syscall2(NUM, ARG1, ARG2) ({ \
101 : "=a"(rax) /* %rax */ \
102 : "a"((NUM)), /* %rax */ \
103 "D"((ARG1)), /* %rdi */ \
104 "S"((ARG2)) /* %rsi */ \
105 : "rcx", "r11", "memory" \
110 #define __do_syscall3(NUM, ARG1, ARG2, ARG3) ({ \
115 : "=a"(rax) /* %rax */ \
116 : "a"((NUM)), /* %rax */ \
117 "D"((ARG1)), /* %rdi */ \
118 "S"((ARG2)), /* %rsi */ \
119 "d"((ARG3)) /* %rdx */ \
120 : "rcx", "r11", "memory" \
125 #define __do_syscall4(NUM, ARG1, ARG2, ARG3, ARG4) ({ \
127 register __typeof__(ARG4) __r10 __asm__("r10") = (ARG4); \
131 : "=a"(rax) /* %rax */ \
132 : "a"((NUM)), /* %rax */ \
133 "D"((ARG1)), /* %rdi */ \
134 "S"((ARG2)), /* %rsi */ \
135 "d"((ARG3)), /* %rdx */ \
136 "r"(__r10) /* %r10 */ \
137 : "rcx", "r11", "memory" \
142 #define __do_syscall5(NUM, ARG1, ARG2, ARG3, ARG4, ARG5) ({ \
144 register __typeof__(ARG4) __r10 __asm__("r10") = (ARG4); \
145 register __typeof__(ARG5) __r8 __asm__("r8") = (ARG5); \
149 : "=a"(rax) /* %rax */ \
150 : "a"((NUM)), /* %rax */ \
151 "D"((ARG1)), /* %rdi */ \
152 "S"((ARG2)), /* %rsi */ \
153 "d"((ARG3)), /* %rdx */ \
154 "r"(__r10), /* %r10 */ \
155 "r"(__r8) /* %r8 */ \
156 : "rcx", "r11", "memory" \
161 #define __do_syscall6(NUM, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6) ({ \
163 register __typeof__(ARG4) __r10 __asm__("r10") = (ARG4); \
164 register __typeof__(ARG5) __r8 __asm__("r8") = (ARG5); \
165 register __typeof__(ARG6) __r9 __asm__("r9") = (ARG6); \
169 : "=a"(rax) /* %rax */ \
170 : "a"((NUM)), /* %rax */ \
171 "D"((ARG1)), /* %rdi */ \
172 "S"((ARG2)), /* %rsi */ \
173 "d"((ARG3)), /* %rdx */ \
174 "r"(__r10), /* %r10 */ \
175 "r"(__r8), /* %r8 */ \
176 "r"(__r9) /* %r9 */ \
177 : "rcx", "r11", "memory" \
182 #define FIO_ARCH_HAS_SYSCALL