1 #ifndef FIO_ARCH_X86_COMMON
2 #define FIO_ARCH_X86_COMMON
6 static inline void cpuid(unsigned int op,
7 unsigned int *eax, unsigned int *ebx,
8 unsigned int *ecx, unsigned int *edx)
12 do_cpuid(eax, ebx, ecx, edx);
15 #define ARCH_HAVE_INIT
17 extern bool tsc_reliable;
18 extern int arch_random;
20 static inline void arch_init_intel(void)
22 unsigned int eax, ebx, ecx = 0, edx;
28 do_cpuid(&eax, &ebx, &ecx, &edx);
29 if (!(edx & (1U << 4)))
33 * Check for constant rate and synced (across cores) TSC
36 do_cpuid(&eax, &ebx, &ecx, &edx);
37 tsc_reliable = (edx & (1U << 8)) != 0;
43 do_cpuid(&eax, &ebx, &ecx, &edx);
44 arch_random = (ecx & (1U << 30)) != 0;
47 static inline void arch_init_amd(void)
49 unsigned int eax, ebx, ecx, edx;
51 cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
55 cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
56 tsc_reliable = (edx & (1U << 8)) != 0;
59 static inline void arch_init(char *envp[])
64 arch_random = tsc_reliable = 0;
66 cpuid(0, &level, (unsigned int *) &str[0],
67 (unsigned int *) &str[8],
68 (unsigned int *) &str[4]);
71 if (!strcmp(str, "GenuineIntel"))
73 else if (!strcmp(str, "AuthenticAMD") || !strcmp(str, "HygonGenuine"))