9 #define FIO_ARCH (arch_ppc)
11 #define nop do { } while (0)
14 #define read_barrier() __asm__ __volatile__ ("lwsync" : : : "memory")
16 #define read_barrier() __asm__ __volatile__ ("sync" : : : "memory")
19 #define write_barrier() __asm__ __volatile__ ("sync" : : : "memory")
22 #define PPC_CNTLZL "cntlzd"
24 #define PPC_CNTLZL "cntlzw"
27 #define ARCH_HAVE_IOURING
29 #ifndef __NR_sys_io_uring_setup
30 #define __NR_sys_io_uring_setup 425
32 #ifndef __NR_sys_io_uring_enter
33 #define __NR_sys_io_uring_enter 426
35 #ifndef __NR_sys_io_uring_register
36 #define __NR_sys_io_uring_register 427
39 static inline int __ilog2(unsigned long bitmask)
43 asm (PPC_CNTLZL " %0,%1" : "=r" (lz) : "r" (bitmask));
44 return BITS_PER_LONG - 1 - lz;
47 static inline int arch_ffz(unsigned long bitmask)
49 if ((bitmask = ~bitmask) == 0)
51 return __ilog2(bitmask & -bitmask);
54 static inline unsigned int mfspr(unsigned int reg)
58 asm volatile("mfspr %0,%1": "=r" (val) : "K" (reg));
62 #define SPRN_TBRL 0x10C /* Time Base Register Lower */
63 #define SPRN_TBRU 0x10D /* Time Base Register Upper */
64 #define SPRN_ATBL 0x20E /* Alternate Time Base Lower */
65 #define SPRN_ATBU 0x20F /* Alternate Time Base Upper */
68 static inline unsigned long long get_cpu_clock(void)
70 unsigned long long rval;
83 static inline unsigned long long get_cpu_clock(void)
85 unsigned int tbl, tbu0, tbu1;
86 unsigned long long ret;
89 if (arch_flags & ARCH_FLAG_1) {
90 tbu0 = mfspr(SPRN_ATBU);
91 tbl = mfspr(SPRN_ATBL);
92 tbu1 = mfspr(SPRN_ATBU);
94 tbu0 = mfspr(SPRN_TBRU);
95 tbl = mfspr(SPRN_TBRL);
96 tbu1 = mfspr(SPRN_TBRU);
98 } while (tbu0 != tbu1);
100 ret = (((unsigned long long)tbu0) << 32) | tbl;
106 static void atb_child(void)
108 arch_flags |= ARCH_FLAG_1;
113 static void atb_clocktest(void)
120 else if (pid != -1) {
124 if (pid == -1 || !WIFEXITED(status))
125 arch_flags &= ~ARCH_FLAG_1;
127 arch_flags |= ARCH_FLAG_1;
132 #define ARCH_HAVE_INIT
133 extern bool tsc_reliable;
135 static inline int arch_init(char *envp[])
144 #define ARCH_HAVE_FFZ
147 * We don't have it on all platforms, lets comment this out until we
148 * can handle it more intelligently.
150 * #define ARCH_HAVE_CPU_CLOCK
154 * Let's have it defined for ppc64
158 #define ARCH_HAVE_CPU_CLOCK