9 #define FIO_ARCH (arch_ppc)
11 #ifndef __NR_ioprio_set
12 #define __NR_ioprio_set 273
13 #define __NR_ioprio_get 274
16 #ifndef __NR_fadvise64
17 #define __NR_fadvise64 233
20 #ifndef __NR_sys_splice
21 #define __NR_sys_splice 283
22 #define __NR_sys_tee 284
23 #define __NR_sys_vmsplice 285
26 #define nop do { } while (0)
29 #define read_barrier() __asm__ __volatile__ ("lwsync" : : : "memory")
31 #define read_barrier() __asm__ __volatile__ ("sync" : : : "memory")
34 #define write_barrier() __asm__ __volatile__ ("sync" : : : "memory")
37 #define PPC_CNTLZL "cntlzd"
39 #define PPC_CNTLZL "cntlzw"
42 static inline int __ilog2(unsigned long bitmask)
46 asm (PPC_CNTLZL " %0,%1" : "=r" (lz) : "r" (bitmask));
47 return BITS_PER_LONG - 1 - lz;
50 static inline int arch_ffz(unsigned long bitmask)
52 if ((bitmask = ~bitmask) == 0)
54 return __ilog2(bitmask & -bitmask);
57 static inline unsigned int mfspr(unsigned int reg)
61 asm volatile("mfspr %0,%1": "=r" (val) : "K" (reg));
65 #define SPRN_TBRL 0x10C /* Time Base Register Lower */
66 #define SPRN_TBRU 0x10D /* Time Base Register Upper */
67 #define SPRN_ATBL 0x20E /* Alternate Time Base Lower */
68 #define SPRN_ATBU 0x20F /* Alternate Time Base Upper */
71 static inline unsigned long long get_cpu_clock(void)
73 unsigned long long rval;
85 static inline unsigned long long get_cpu_clock(void)
87 unsigned int tbl, tbu0, tbu1;
88 unsigned long long ret;
91 if (arch_flags & ARCH_FLAG_1) {
92 tbu0 = mfspr(SPRN_ATBU);
93 tbl = mfspr(SPRN_ATBL);
94 tbu1 = mfspr(SPRN_ATBU);
96 tbu0 = mfspr(SPRN_TBRU);
97 tbl = mfspr(SPRN_TBRL);
98 tbu1 = mfspr(SPRN_TBRU);
100 } while (tbu0 != tbu1);
102 ret = (((unsigned long long)tbu0) << 32) | tbl;
108 static void atb_child(void)
110 arch_flags |= ARCH_FLAG_1;
115 static void atb_clocktest(void)
122 else if (pid != -1) {
126 if (pid == -1 || !WIFEXITED(status))
127 arch_flags &= ~ARCH_FLAG_1;
129 arch_flags |= ARCH_FLAG_1;
134 #define ARCH_HAVE_INIT
135 extern int tsc_reliable;
137 static inline int arch_init(char *envp[])
146 #define ARCH_HAVE_FFZ
149 * We don't have it on all platforms, lets comment this out until we
150 * can handle it more intelligently.
152 * #define ARCH_HAVE_CPU_CLOCK
156 * Let's have it defined for ppc64
160 #define ARCH_HAVE_CPU_CLOCK