4 #define FIO_ARCH (arch_ia64)
6 #ifndef __NR_ioprio_set
7 #define __NR_ioprio_set 1274
8 #define __NR_ioprio_get 1275
11 #ifndef __NR_fadvise64
12 #define __NR_fadvise64 1234
15 #ifndef __NR_sys_splice
16 #define __NR_sys_splice 1297
17 #define __NR_sys_tee 1301
18 #define __NR_sys_vmsplice 1302
22 #define __NR_preadv2 1348
25 #define __NR_pwritev2 1349
28 #define nop asm volatile ("hint @pause" ::: "memory");
29 #define read_barrier() asm volatile ("mf" ::: "memory")
30 #define write_barrier() asm volatile ("mf" ::: "memory")
32 #define ia64_popcnt(x) \
34 unsigned long ia64_intri_res; \
35 asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
39 static inline unsigned long arch_ffz(unsigned long bitmask)
41 return ia64_popcnt(bitmask & (~bitmask - 1));
44 static inline unsigned long long get_cpu_clock(void)
46 unsigned long long ret;
48 __asm__ __volatile__("mov %0=ar.itc" : "=r" (ret) : : "memory");
52 #define ARCH_HAVE_INIT
53 extern int tsc_reliable;
54 static inline int arch_init(char *envp[])
61 #define ARCH_HAVE_CPU_CLOCK