4 #define FIO_ARCH (arch_arm)
6 #ifndef __NR_ioprio_set
7 #define __NR_ioprio_set 314
8 #define __NR_ioprio_get 315
11 #ifndef __NR_fadvise64
12 #define __NR_fadvise64 270
15 #ifndef __NR_sys_splice
16 #define __NR_sys_splice 340
17 #define __NR_sys_tee 342
18 #define __NR_sys_vmsplice 343
21 #if defined (__ARM_ARCH_4__) || defined (__ARM_ARCH_4T__) || defined (__ARM_ARCH_5__) || defined (__ARM_ARCH_5T__) || defined (__ARM_ARCH_5TE__) || defined (__ARM_ARCH_5TEJ__)
22 #define nop __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t")
23 #define read_barrier() __asm__ __volatile__ ("" : : : "memory")
24 #define write_barrier() __asm__ __volatile__ ("" : : : "memory")
25 #elif defined(__ARM_ARCH_7A__)
26 #define nop __asm__ __volatile__ ("nop")
27 #define read_barrier() __sync_synchronize()
28 #define write_barrier() __sync_synchronize()