9 #define FIO_ARCH (arch_aarch64)
11 #define nop do { __asm__ __volatile__ ("yield"); } while (0)
12 #define read_barrier() do { __sync_synchronize(); } while (0)
13 #define write_barrier() do { __sync_synchronize(); } while (0)
15 static inline int arch_ffz(unsigned long bitmask)
17 unsigned long count, reversed_bits;
18 if (~bitmask == 0) /* ffz() in lib/ffz.h does this. */
21 __asm__ __volatile__ ("rbit %1, %2\n"
23 "=r"(count), "=&r"(reversed_bits) :
30 #define isb() asm volatile("isb" : : : "memory")
32 static inline unsigned long long get_cpu_clock(void)
37 asm volatile("mrs %0, cntvct_el0" : "=r" (val));
40 #define ARCH_HAVE_CPU_CLOCK
42 #define ARCH_HAVE_INIT
43 extern bool tsc_reliable;
44 static inline int arch_init(char *envp[])
50 #define __do_syscallN(...) ({ \
59 #define __do_syscall0(__n) ({ \
60 register long x8 __asm__("x8") = __n; \
61 register long x0 __asm__("x0"); \
63 __do_syscallN("r" (x8)); \
66 #define __do_syscall1(__n, __a) ({ \
67 register long x8 __asm__("x8") = __n; \
68 register __typeof__(__a) x0 __asm__("x0") = __a; \
70 __do_syscallN("r" (x8), "0" (x0)); \
73 #define __do_syscall2(__n, __a, __b) ({ \
74 register long x8 __asm__("x8") = __n; \
75 register __typeof__(__a) x0 __asm__("x0") = __a; \
76 register __typeof__(__b) x1 __asm__("x1") = __b; \
78 __do_syscallN("r" (x8), "0" (x0), "r" (x1)); \
81 #define __do_syscall3(__n, __a, __b, __c) ({ \
82 register long x8 __asm__("x8") = __n; \
83 register __typeof__(__a) x0 __asm__("x0") = __a; \
84 register __typeof__(__b) x1 __asm__("x1") = __b; \
85 register __typeof__(__c) x2 __asm__("x2") = __c; \
87 __do_syscallN("r" (x8), "0" (x0), "r" (x1), "r" (x2)); \
90 #define __do_syscall4(__n, __a, __b, __c, __d) ({ \
91 register long x8 __asm__("x8") = __n; \
92 register __typeof__(__a) x0 __asm__("x0") = __a; \
93 register __typeof__(__b) x1 __asm__("x1") = __b; \
94 register __typeof__(__c) x2 __asm__("x2") = __c; \
95 register __typeof__(__d) x3 __asm__("x3") = __d; \
97 __do_syscallN("r" (x8), "0" (x0), "r" (x1), "r" (x2), "r" (x3));\
100 #define __do_syscall5(__n, __a, __b, __c, __d, __e) ({ \
101 register long x8 __asm__("x8") = __n; \
102 register __typeof__(__a) x0 __asm__("x0") = __a; \
103 register __typeof__(__b) x1 __asm__("x1") = __b; \
104 register __typeof__(__c) x2 __asm__("x2") = __c; \
105 register __typeof__(__d) x3 __asm__("x3") = __d; \
106 register __typeof__(__e) x4 __asm__("x4") = __e; \
108 __do_syscallN("r" (x8), "0" (x0), "r" (x1), "r" (x2), "r" (x3), \
112 #define __do_syscall6(__n, __a, __b, __c, __d, __e, __f) ({ \
113 register long x8 __asm__("x8") = __n; \
114 register __typeof__(__a) x0 __asm__("x0") = __a; \
115 register __typeof__(__b) x1 __asm__("x1") = __b; \
116 register __typeof__(__c) x2 __asm__("x2") = __c; \
117 register __typeof__(__d) x3 __asm__("x3") = __d; \
118 register __typeof__(__e) x4 __asm__("x4") = __e; \
119 register __typeof__(__f) x5 __asm__("x5") = __f; \
121 __do_syscallN("r" (x8), "0" (x0), "r" (x1), "r" (x2), "r" (x3), \
122 "r" (x4), "r"(x5)); \
125 #define FIO_ARCH_HAS_SYSCALL