Commit | Line | Data |
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1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
16e3887f MH |
2 | /* |
3 | * | |
4 | * Bluetooth HCI UART driver for Intel devices | |
5 | * | |
6 | * Copyright (C) 2015 Intel Corporation | |
16e3887f MH |
7 | */ |
8 | ||
9 | #include <linux/kernel.h> | |
10 | #include <linux/errno.h> | |
11 | #include <linux/skbuff.h> | |
ca93cee5 | 12 | #include <linux/firmware.h> |
1ab1f239 | 13 | #include <linux/module.h> |
ca93cee5 | 14 | #include <linux/wait.h> |
1ab1f239 LP |
15 | #include <linux/tty.h> |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/gpio/consumer.h> | |
18 | #include <linux/acpi.h> | |
765ea3ab | 19 | #include <linux/interrupt.h> |
74cdad37 | 20 | #include <linux/pm_runtime.h> |
16e3887f MH |
21 | |
22 | #include <net/bluetooth/bluetooth.h> | |
23 | #include <net/bluetooth/hci_core.h> | |
24 | ||
25 | #include "hci_uart.h" | |
ca93cee5 LP |
26 | #include "btintel.h" |
27 | ||
28 | #define STATE_BOOTLOADER 0 | |
29 | #define STATE_DOWNLOADING 1 | |
30 | #define STATE_FIRMWARE_LOADED 2 | |
31 | #define STATE_FIRMWARE_FAILED 3 | |
32 | #define STATE_BOOTING 4 | |
b98469f4 LP |
33 | #define STATE_LPM_ENABLED 5 |
34 | #define STATE_TX_ACTIVE 6 | |
89436546 LP |
35 | #define STATE_SUSPENDED 7 |
36 | #define STATE_LPM_TRANSACTION 8 | |
b98469f4 | 37 | |
89436546 | 38 | #define HCI_LPM_WAKE_PKT 0xf0 |
b98469f4 LP |
39 | #define HCI_LPM_PKT 0xf1 |
40 | #define HCI_LPM_MAX_SIZE 10 | |
41 | #define HCI_LPM_HDR_SIZE HCI_EVENT_HDR_SIZE | |
42 | ||
43 | #define LPM_OP_TX_NOTIFY 0x00 | |
89436546 LP |
44 | #define LPM_OP_SUSPEND_ACK 0x02 |
45 | #define LPM_OP_RESUME_ACK 0x03 | |
b98469f4 | 46 | |
74cdad37 LP |
47 | #define LPM_SUSPEND_DELAY_MS 1000 |
48 | ||
b98469f4 LP |
49 | struct hci_lpm_pkt { |
50 | __u8 opcode; | |
51 | __u8 dlen; | |
7c369483 | 52 | __u8 data[]; |
b98469f4 | 53 | } __packed; |
ca93cee5 | 54 | |
1ab1f239 LP |
55 | struct intel_device { |
56 | struct list_head list; | |
57 | struct platform_device *pdev; | |
58 | struct gpio_desc *reset; | |
aa6802df LP |
59 | struct hci_uart *hu; |
60 | struct mutex hu_lock; | |
765ea3ab | 61 | int irq; |
1ab1f239 LP |
62 | }; |
63 | ||
64 | static LIST_HEAD(intel_device_list); | |
67c8bde0 | 65 | static DEFINE_MUTEX(intel_device_list_lock); |
1ab1f239 | 66 | |
ca93cee5 LP |
67 | struct intel_data { |
68 | struct sk_buff *rx_skb; | |
69 | struct sk_buff_head txq; | |
74cdad37 LP |
70 | struct work_struct busy_work; |
71 | struct hci_uart *hu; | |
ca93cee5 LP |
72 | unsigned long flags; |
73 | }; | |
74 | ||
ff289559 LP |
75 | static u8 intel_convert_speed(unsigned int speed) |
76 | { | |
77 | switch (speed) { | |
78 | case 9600: | |
79 | return 0x00; | |
80 | case 19200: | |
81 | return 0x01; | |
82 | case 38400: | |
83 | return 0x02; | |
84 | case 57600: | |
85 | return 0x03; | |
86 | case 115200: | |
87 | return 0x04; | |
88 | case 230400: | |
89 | return 0x05; | |
90 | case 460800: | |
91 | return 0x06; | |
92 | case 921600: | |
93 | return 0x07; | |
94 | case 1843200: | |
95 | return 0x08; | |
96 | case 3250000: | |
97 | return 0x09; | |
98 | case 2000000: | |
99 | return 0x0a; | |
100 | case 3000000: | |
101 | return 0x0b; | |
102 | default: | |
103 | return 0xff; | |
104 | } | |
105 | } | |
106 | ||
1ab1f239 LP |
107 | static int intel_wait_booting(struct hci_uart *hu) |
108 | { | |
109 | struct intel_data *intel = hu->priv; | |
110 | int err; | |
111 | ||
112 | err = wait_on_bit_timeout(&intel->flags, STATE_BOOTING, | |
113 | TASK_INTERRUPTIBLE, | |
114 | msecs_to_jiffies(1000)); | |
115 | ||
f0a70a04 | 116 | if (err == -EINTR) { |
f44e78a5 | 117 | bt_dev_err(hu->hdev, "Device boot interrupted"); |
1ab1f239 LP |
118 | return -EINTR; |
119 | } | |
120 | ||
121 | if (err) { | |
f44e78a5 | 122 | bt_dev_err(hu->hdev, "Device boot timeout"); |
1ab1f239 LP |
123 | return -ETIMEDOUT; |
124 | } | |
125 | ||
126 | return err; | |
127 | } | |
128 | ||
a9cb0fe4 | 129 | #ifdef CONFIG_PM |
89436546 LP |
130 | static int intel_wait_lpm_transaction(struct hci_uart *hu) |
131 | { | |
132 | struct intel_data *intel = hu->priv; | |
133 | int err; | |
134 | ||
135 | err = wait_on_bit_timeout(&intel->flags, STATE_LPM_TRANSACTION, | |
136 | TASK_INTERRUPTIBLE, | |
137 | msecs_to_jiffies(1000)); | |
138 | ||
f0a70a04 | 139 | if (err == -EINTR) { |
89436546 LP |
140 | bt_dev_err(hu->hdev, "LPM transaction interrupted"); |
141 | return -EINTR; | |
142 | } | |
143 | ||
144 | if (err) { | |
145 | bt_dev_err(hu->hdev, "LPM transaction timeout"); | |
146 | return -ETIMEDOUT; | |
147 | } | |
148 | ||
149 | return err; | |
150 | } | |
151 | ||
152 | static int intel_lpm_suspend(struct hci_uart *hu) | |
153 | { | |
154 | static const u8 suspend[] = { 0x01, 0x01, 0x01 }; | |
155 | struct intel_data *intel = hu->priv; | |
156 | struct sk_buff *skb; | |
157 | ||
158 | if (!test_bit(STATE_LPM_ENABLED, &intel->flags) || | |
159 | test_bit(STATE_SUSPENDED, &intel->flags)) | |
160 | return 0; | |
161 | ||
162 | if (test_bit(STATE_TX_ACTIVE, &intel->flags)) | |
163 | return -EAGAIN; | |
164 | ||
165 | bt_dev_dbg(hu->hdev, "Suspending"); | |
166 | ||
167 | skb = bt_skb_alloc(sizeof(suspend), GFP_KERNEL); | |
168 | if (!skb) { | |
169 | bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet"); | |
170 | return -ENOMEM; | |
171 | } | |
172 | ||
59ae1d12 | 173 | skb_put_data(skb, suspend, sizeof(suspend)); |
618e8bc2 | 174 | hci_skb_pkt_type(skb) = HCI_LPM_PKT; |
89436546 LP |
175 | |
176 | set_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
177 | ||
30e945fb LP |
178 | /* LPM flow is a priority, enqueue packet at list head */ |
179 | skb_queue_head(&intel->txq, skb); | |
89436546 LP |
180 | hci_uart_tx_wakeup(hu); |
181 | ||
182 | intel_wait_lpm_transaction(hu); | |
183 | /* Even in case of failure, continue and test the suspended flag */ | |
184 | ||
185 | clear_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
186 | ||
187 | if (!test_bit(STATE_SUSPENDED, &intel->flags)) { | |
188 | bt_dev_err(hu->hdev, "Device suspend error"); | |
189 | return -EINVAL; | |
190 | } | |
191 | ||
192 | bt_dev_dbg(hu->hdev, "Suspended"); | |
193 | ||
194 | hci_uart_set_flow_control(hu, true); | |
195 | ||
196 | return 0; | |
197 | } | |
198 | ||
199 | static int intel_lpm_resume(struct hci_uart *hu) | |
200 | { | |
201 | struct intel_data *intel = hu->priv; | |
202 | struct sk_buff *skb; | |
203 | ||
204 | if (!test_bit(STATE_LPM_ENABLED, &intel->flags) || | |
205 | !test_bit(STATE_SUSPENDED, &intel->flags)) | |
206 | return 0; | |
207 | ||
208 | bt_dev_dbg(hu->hdev, "Resuming"); | |
209 | ||
210 | hci_uart_set_flow_control(hu, false); | |
211 | ||
212 | skb = bt_skb_alloc(0, GFP_KERNEL); | |
213 | if (!skb) { | |
214 | bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet"); | |
215 | return -ENOMEM; | |
216 | } | |
217 | ||
618e8bc2 | 218 | hci_skb_pkt_type(skb) = HCI_LPM_WAKE_PKT; |
89436546 LP |
219 | |
220 | set_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
221 | ||
30e945fb LP |
222 | /* LPM flow is a priority, enqueue packet at list head */ |
223 | skb_queue_head(&intel->txq, skb); | |
89436546 LP |
224 | hci_uart_tx_wakeup(hu); |
225 | ||
226 | intel_wait_lpm_transaction(hu); | |
227 | /* Even in case of failure, continue and test the suspended flag */ | |
228 | ||
229 | clear_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
230 | ||
231 | if (test_bit(STATE_SUSPENDED, &intel->flags)) { | |
232 | bt_dev_err(hu->hdev, "Device resume error"); | |
233 | return -EINVAL; | |
234 | } | |
235 | ||
236 | bt_dev_dbg(hu->hdev, "Resumed"); | |
237 | ||
238 | return 0; | |
239 | } | |
a9cb0fe4 | 240 | #endif /* CONFIG_PM */ |
89436546 LP |
241 | |
242 | static int intel_lpm_host_wake(struct hci_uart *hu) | |
243 | { | |
244 | static const u8 lpm_resume_ack[] = { LPM_OP_RESUME_ACK, 0x00 }; | |
245 | struct intel_data *intel = hu->priv; | |
246 | struct sk_buff *skb; | |
247 | ||
248 | hci_uart_set_flow_control(hu, false); | |
249 | ||
250 | clear_bit(STATE_SUSPENDED, &intel->flags); | |
251 | ||
252 | skb = bt_skb_alloc(sizeof(lpm_resume_ack), GFP_KERNEL); | |
253 | if (!skb) { | |
254 | bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet"); | |
255 | return -ENOMEM; | |
256 | } | |
257 | ||
59ae1d12 | 258 | skb_put_data(skb, lpm_resume_ack, sizeof(lpm_resume_ack)); |
618e8bc2 | 259 | hci_skb_pkt_type(skb) = HCI_LPM_PKT; |
89436546 | 260 | |
30e945fb LP |
261 | /* LPM flow is a priority, enqueue packet at list head */ |
262 | skb_queue_head(&intel->txq, skb); | |
89436546 LP |
263 | hci_uart_tx_wakeup(hu); |
264 | ||
265 | bt_dev_dbg(hu->hdev, "Resumed by controller"); | |
266 | ||
267 | return 0; | |
268 | } | |
269 | ||
765ea3ab LP |
270 | static irqreturn_t intel_irq(int irq, void *dev_id) |
271 | { | |
272 | struct intel_device *idev = dev_id; | |
273 | ||
274 | dev_info(&idev->pdev->dev, "hci_intel irq\n"); | |
275 | ||
aa6802df LP |
276 | mutex_lock(&idev->hu_lock); |
277 | if (idev->hu) | |
278 | intel_lpm_host_wake(idev->hu); | |
279 | mutex_unlock(&idev->hu_lock); | |
280 | ||
74cdad37 LP |
281 | /* Host/Controller are now LPM resumed, trigger a new delayed suspend */ |
282 | pm_runtime_get(&idev->pdev->dev); | |
283 | pm_runtime_mark_last_busy(&idev->pdev->dev); | |
284 | pm_runtime_put_autosuspend(&idev->pdev->dev); | |
285 | ||
765ea3ab LP |
286 | return IRQ_HANDLED; |
287 | } | |
288 | ||
1ab1f239 LP |
289 | static int intel_set_power(struct hci_uart *hu, bool powered) |
290 | { | |
7dbbd692 | 291 | struct intel_device *idev; |
1ab1f239 LP |
292 | int err = -ENODEV; |
293 | ||
dcb9cfaa JH |
294 | if (!hu->tty->dev) |
295 | return err; | |
296 | ||
67c8bde0 | 297 | mutex_lock(&intel_device_list_lock); |
1ab1f239 | 298 | |
7dbbd692 | 299 | list_for_each_entry(idev, &intel_device_list, list) { |
1ab1f239 LP |
300 | /* tty device and pdev device should share the same parent |
301 | * which is the UART port. | |
302 | */ | |
303 | if (hu->tty->dev->parent != idev->pdev->dev.parent) | |
304 | continue; | |
305 | ||
306 | if (!idev->reset) { | |
307 | err = -ENOTSUPP; | |
308 | break; | |
309 | } | |
310 | ||
311 | BT_INFO("hu %p, Switching compatible pm device (%s) to %u", | |
312 | hu, dev_name(&idev->pdev->dev), powered); | |
313 | ||
314 | gpiod_set_value(idev->reset, powered); | |
765ea3ab | 315 | |
aa6802df LP |
316 | /* Provide to idev a hu reference which is used to run LPM |
317 | * transactions (lpm suspend/resume) from PM callbacks. | |
318 | * hu needs to be protected against concurrent removing during | |
319 | * these PM ops. | |
320 | */ | |
321 | mutex_lock(&idev->hu_lock); | |
322 | idev->hu = powered ? hu : NULL; | |
323 | mutex_unlock(&idev->hu_lock); | |
324 | ||
765ea3ab LP |
325 | if (idev->irq < 0) |
326 | break; | |
327 | ||
328 | if (powered && device_can_wakeup(&idev->pdev->dev)) { | |
329 | err = devm_request_threaded_irq(&idev->pdev->dev, | |
330 | idev->irq, NULL, | |
331 | intel_irq, | |
332 | IRQF_ONESHOT, | |
333 | "bt-host-wake", idev); | |
334 | if (err) { | |
335 | BT_ERR("hu %p, unable to allocate irq-%d", | |
336 | hu, idev->irq); | |
337 | break; | |
338 | } | |
339 | ||
340 | device_wakeup_enable(&idev->pdev->dev); | |
74cdad37 LP |
341 | |
342 | pm_runtime_set_active(&idev->pdev->dev); | |
343 | pm_runtime_use_autosuspend(&idev->pdev->dev); | |
344 | pm_runtime_set_autosuspend_delay(&idev->pdev->dev, | |
345 | LPM_SUSPEND_DELAY_MS); | |
346 | pm_runtime_enable(&idev->pdev->dev); | |
765ea3ab LP |
347 | } else if (!powered && device_may_wakeup(&idev->pdev->dev)) { |
348 | devm_free_irq(&idev->pdev->dev, idev->irq, idev); | |
349 | device_wakeup_disable(&idev->pdev->dev); | |
74cdad37 LP |
350 | |
351 | pm_runtime_disable(&idev->pdev->dev); | |
765ea3ab | 352 | } |
1ab1f239 LP |
353 | } |
354 | ||
67c8bde0 | 355 | mutex_unlock(&intel_device_list_lock); |
1ab1f239 LP |
356 | |
357 | return err; | |
358 | } | |
359 | ||
74cdad37 LP |
360 | static void intel_busy_work(struct work_struct *work) |
361 | { | |
74cdad37 LP |
362 | struct intel_data *intel = container_of(work, struct intel_data, |
363 | busy_work); | |
7dbbd692 | 364 | struct intel_device *idev; |
74cdad37 | 365 | |
dcb9cfaa JH |
366 | if (!intel->hu->tty->dev) |
367 | return; | |
368 | ||
74cdad37 LP |
369 | /* Link is busy, delay the suspend */ |
370 | mutex_lock(&intel_device_list_lock); | |
7dbbd692 | 371 | list_for_each_entry(idev, &intel_device_list, list) { |
74cdad37 LP |
372 | if (intel->hu->tty->dev->parent == idev->pdev->dev.parent) { |
373 | pm_runtime_get(&idev->pdev->dev); | |
374 | pm_runtime_mark_last_busy(&idev->pdev->dev); | |
375 | pm_runtime_put_autosuspend(&idev->pdev->dev); | |
376 | break; | |
377 | } | |
378 | } | |
379 | mutex_unlock(&intel_device_list_lock); | |
380 | } | |
381 | ||
ca93cee5 LP |
382 | static int intel_open(struct hci_uart *hu) |
383 | { | |
384 | struct intel_data *intel; | |
385 | ||
386 | BT_DBG("hu %p", hu); | |
387 | ||
b36a1552 VD |
388 | if (!hci_uart_has_flow_control(hu)) |
389 | return -EOPNOTSUPP; | |
390 | ||
ca93cee5 LP |
391 | intel = kzalloc(sizeof(*intel), GFP_KERNEL); |
392 | if (!intel) | |
393 | return -ENOMEM; | |
394 | ||
395 | skb_queue_head_init(&intel->txq); | |
74cdad37 LP |
396 | INIT_WORK(&intel->busy_work, intel_busy_work); |
397 | ||
398 | intel->hu = hu; | |
ca93cee5 LP |
399 | |
400 | hu->priv = intel; | |
1ab1f239 LP |
401 | |
402 | if (!intel_set_power(hu, true)) | |
403 | set_bit(STATE_BOOTING, &intel->flags); | |
404 | ||
ca93cee5 LP |
405 | return 0; |
406 | } | |
407 | ||
408 | static int intel_close(struct hci_uart *hu) | |
409 | { | |
410 | struct intel_data *intel = hu->priv; | |
411 | ||
412 | BT_DBG("hu %p", hu); | |
413 | ||
74cdad37 LP |
414 | cancel_work_sync(&intel->busy_work); |
415 | ||
1ab1f239 LP |
416 | intel_set_power(hu, false); |
417 | ||
ca93cee5 LP |
418 | skb_queue_purge(&intel->txq); |
419 | kfree_skb(intel->rx_skb); | |
420 | kfree(intel); | |
421 | ||
422 | hu->priv = NULL; | |
423 | return 0; | |
424 | } | |
425 | ||
426 | static int intel_flush(struct hci_uart *hu) | |
427 | { | |
428 | struct intel_data *intel = hu->priv; | |
429 | ||
430 | BT_DBG("hu %p", hu); | |
431 | ||
432 | skb_queue_purge(&intel->txq); | |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
437 | static int inject_cmd_complete(struct hci_dev *hdev, __u16 opcode) | |
438 | { | |
439 | struct sk_buff *skb; | |
440 | struct hci_event_hdr *hdr; | |
441 | struct hci_ev_cmd_complete *evt; | |
442 | ||
f6ebfc24 | 443 | skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_KERNEL); |
ca93cee5 LP |
444 | if (!skb) |
445 | return -ENOMEM; | |
446 | ||
4df864c1 | 447 | hdr = skb_put(skb, sizeof(*hdr)); |
ca93cee5 LP |
448 | hdr->evt = HCI_EV_CMD_COMPLETE; |
449 | hdr->plen = sizeof(*evt) + 1; | |
450 | ||
4df864c1 | 451 | evt = skb_put(skb, sizeof(*evt)); |
ca93cee5 LP |
452 | evt->ncmd = 0x01; |
453 | evt->opcode = cpu_to_le16(opcode); | |
454 | ||
634fef61 | 455 | skb_put_u8(skb, 0x00); |
ca93cee5 | 456 | |
618e8bc2 | 457 | hci_skb_pkt_type(skb) = HCI_EVENT_PKT; |
ca93cee5 LP |
458 | |
459 | return hci_recv_frame(hdev, skb); | |
460 | } | |
461 | ||
ff289559 LP |
462 | static int intel_set_baudrate(struct hci_uart *hu, unsigned int speed) |
463 | { | |
464 | struct intel_data *intel = hu->priv; | |
465 | struct hci_dev *hdev = hu->hdev; | |
466 | u8 speed_cmd[] = { 0x06, 0xfc, 0x01, 0x00 }; | |
467 | struct sk_buff *skb; | |
1ab1f239 LP |
468 | int err; |
469 | ||
470 | /* This can be the first command sent to the chip, check | |
471 | * that the controller is ready. | |
472 | */ | |
473 | err = intel_wait_booting(hu); | |
474 | ||
475 | clear_bit(STATE_BOOTING, &intel->flags); | |
476 | ||
477 | /* In case of timeout, try to continue anyway */ | |
2be1149e | 478 | if (err && err != -ETIMEDOUT) |
1ab1f239 | 479 | return err; |
ff289559 | 480 | |
f44e78a5 | 481 | bt_dev_info(hdev, "Change controller speed to %d", speed); |
ff289559 LP |
482 | |
483 | speed_cmd[3] = intel_convert_speed(speed); | |
484 | if (speed_cmd[3] == 0xff) { | |
f44e78a5 | 485 | bt_dev_err(hdev, "Unsupported speed"); |
ff289559 LP |
486 | return -EINVAL; |
487 | } | |
488 | ||
489 | /* Device will not accept speed change if Intel version has not been | |
490 | * previously requested. | |
491 | */ | |
a0c38245 | 492 | skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_CMD_TIMEOUT); |
ff289559 | 493 | if (IS_ERR(skb)) { |
f44e78a5 LP |
494 | bt_dev_err(hdev, "Reading Intel version information failed (%ld)", |
495 | PTR_ERR(skb)); | |
ff289559 LP |
496 | return PTR_ERR(skb); |
497 | } | |
498 | kfree_skb(skb); | |
499 | ||
500 | skb = bt_skb_alloc(sizeof(speed_cmd), GFP_KERNEL); | |
501 | if (!skb) { | |
f44e78a5 | 502 | bt_dev_err(hdev, "Failed to alloc memory for baudrate packet"); |
ff289559 LP |
503 | return -ENOMEM; |
504 | } | |
505 | ||
59ae1d12 | 506 | skb_put_data(skb, speed_cmd, sizeof(speed_cmd)); |
618e8bc2 | 507 | hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; |
ff289559 LP |
508 | |
509 | hci_uart_set_flow_control(hu, true); | |
510 | ||
511 | skb_queue_tail(&intel->txq, skb); | |
512 | hci_uart_tx_wakeup(hu); | |
513 | ||
514 | /* wait 100ms to change baudrate on controller side */ | |
515 | msleep(100); | |
516 | ||
517 | hci_uart_set_baudrate(hu, speed); | |
518 | hci_uart_set_flow_control(hu, false); | |
519 | ||
520 | return 0; | |
521 | } | |
522 | ||
ca93cee5 LP |
523 | static int intel_setup(struct hci_uart *hu) |
524 | { | |
ca93cee5 LP |
525 | struct intel_data *intel = hu->priv; |
526 | struct hci_dev *hdev = hu->hdev; | |
527 | struct sk_buff *skb; | |
6c483de1 | 528 | struct intel_version ver; |
faf174d2 | 529 | struct intel_boot_params params; |
7dbbd692 | 530 | struct intel_device *idev; |
ca93cee5 | 531 | const struct firmware *fw; |
ca93cee5 | 532 | char fwname[64]; |
e5889af6 | 533 | u32 boot_param; |
ca93cee5 LP |
534 | ktime_t calltime, delta, rettime; |
535 | unsigned long long duration; | |
ff289559 LP |
536 | unsigned int init_speed, oper_speed; |
537 | int speed_change = 0; | |
ca93cee5 LP |
538 | int err; |
539 | ||
f44e78a5 | 540 | bt_dev_dbg(hdev, "start intel_setup"); |
ca93cee5 | 541 | |
6d2e50d2 | 542 | hu->hdev->set_diag = btintel_set_diag; |
35ab8150 MH |
543 | hu->hdev->set_bdaddr = btintel_set_bdaddr; |
544 | ||
04d729b8 THJA |
545 | /* Set the default boot parameter to 0x0 and it is updated to |
546 | * SKU specific boot parameter after reading Intel_Write_Boot_Params | |
547 | * command while downloading the firmware. | |
548 | */ | |
549 | boot_param = 0x00000000; | |
e5889af6 | 550 | |
ca93cee5 LP |
551 | calltime = ktime_get(); |
552 | ||
ff289559 LP |
553 | if (hu->init_speed) |
554 | init_speed = hu->init_speed; | |
555 | else | |
556 | init_speed = hu->proto->init_speed; | |
557 | ||
558 | if (hu->oper_speed) | |
559 | oper_speed = hu->oper_speed; | |
560 | else | |
561 | oper_speed = hu->proto->oper_speed; | |
562 | ||
563 | if (oper_speed && init_speed && oper_speed != init_speed) | |
564 | speed_change = 1; | |
565 | ||
1ab1f239 LP |
566 | /* Check that the controller is ready */ |
567 | err = intel_wait_booting(hu); | |
568 | ||
569 | clear_bit(STATE_BOOTING, &intel->flags); | |
570 | ||
571 | /* In case of timeout, try to continue anyway */ | |
2be1149e | 572 | if (err && err != -ETIMEDOUT) |
1ab1f239 LP |
573 | return err; |
574 | ||
ca93cee5 LP |
575 | set_bit(STATE_BOOTLOADER, &intel->flags); |
576 | ||
577 | /* Read the Intel version information to determine if the device | |
578 | * is in bootloader mode or if it already has operational firmware | |
579 | * loaded. | |
580 | */ | |
7086b36b CIK |
581 | err = btintel_read_version(hdev, &ver); |
582 | if (err) | |
ca93cee5 | 583 | return err; |
ca93cee5 LP |
584 | |
585 | /* The hardware platform number has a fixed value of 0x37 and | |
586 | * for now only accept this single value. | |
587 | */ | |
6c483de1 | 588 | if (ver.hw_platform != 0x37) { |
f44e78a5 | 589 | bt_dev_err(hdev, "Unsupported Intel hardware platform (%u)", |
6c483de1 | 590 | ver.hw_platform); |
ca93cee5 LP |
591 | return -EINVAL; |
592 | } | |
593 | ||
9268834b THJA |
594 | /* Check for supported iBT hardware variants of this firmware |
595 | * loading method. | |
596 | * | |
597 | * This check has been put in place to ensure correct forward | |
598 | * compatibility options when newer hardware variants come along. | |
599 | */ | |
600 | switch (ver.hw_variant) { | |
601 | case 0x0b: /* LnP */ | |
602 | case 0x0c: /* WsP */ | |
6c7bb7eb | 603 | case 0x12: /* ThP */ |
9268834b THJA |
604 | break; |
605 | default: | |
f44e78a5 | 606 | bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)", |
6c483de1 | 607 | ver.hw_variant); |
ca93cee5 LP |
608 | return -EINVAL; |
609 | } | |
610 | ||
6c483de1 | 611 | btintel_version_info(hdev, &ver); |
ca93cee5 LP |
612 | |
613 | /* The firmware variant determines if the device is in bootloader | |
614 | * mode or is running operational firmware. The value 0x06 identifies | |
615 | * the bootloader and the value 0x23 identifies the operational | |
616 | * firmware. | |
617 | * | |
618 | * When the operational firmware is already present, then only | |
619 | * the check for valid Bluetooth device address is needed. This | |
620 | * determines if the device will be added as configured or | |
621 | * unconfigured controller. | |
622 | * | |
623 | * It is not possible to use the Secure Boot Parameters in this | |
624 | * case since that command is only available in bootloader mode. | |
625 | */ | |
6c483de1 | 626 | if (ver.fw_variant == 0x23) { |
ca93cee5 LP |
627 | clear_bit(STATE_BOOTLOADER, &intel->flags); |
628 | btintel_check_bdaddr(hdev); | |
629 | return 0; | |
630 | } | |
631 | ||
632 | /* If the device is not in bootloader mode, then the only possible | |
633 | * choice is to return an error and abort the device initialization. | |
634 | */ | |
6c483de1 | 635 | if (ver.fw_variant != 0x06) { |
f44e78a5 | 636 | bt_dev_err(hdev, "Unsupported Intel firmware variant (%u)", |
6c483de1 | 637 | ver.fw_variant); |
ca93cee5 LP |
638 | return -ENODEV; |
639 | } | |
640 | ||
ca93cee5 LP |
641 | /* Read the secure boot parameters to identify the operating |
642 | * details of the bootloader. | |
643 | */ | |
faf174d2 THJA |
644 | err = btintel_read_boot_params(hdev, ¶ms); |
645 | if (err) | |
ca93cee5 | 646 | return err; |
ca93cee5 LP |
647 | |
648 | /* It is required that every single firmware fragment is acknowledged | |
649 | * with a command complete event. If the boot parameters indicate | |
650 | * that this bootloader does not send them, then abort the setup. | |
651 | */ | |
faf174d2 | 652 | if (params.limited_cce != 0x00) { |
f44e78a5 | 653 | bt_dev_err(hdev, "Unsupported Intel firmware loading method (%u)", |
faf174d2 | 654 | params.limited_cce); |
ca93cee5 LP |
655 | return -EINVAL; |
656 | } | |
657 | ||
658 | /* If the OTP has no valid Bluetooth device address, then there will | |
659 | * also be no valid address for the operational firmware. | |
660 | */ | |
faf174d2 | 661 | if (!bacmp(¶ms.otp_bdaddr, BDADDR_ANY)) { |
f44e78a5 | 662 | bt_dev_info(hdev, "No device address configured"); |
ca93cee5 LP |
663 | set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks); |
664 | } | |
665 | ||
666 | /* With this Intel bootloader only the hardware variant and device | |
965651c1 THJA |
667 | * revision information are used to select the right firmware for SfP |
668 | * and WsP. | |
ca93cee5 | 669 | * |
b7da6a69 THJA |
670 | * The firmware filename is ibt-<hw_variant>-<dev_revid>.sfi. |
671 | * | |
672 | * Currently the supported hardware variants are: | |
673 | * 11 (0x0b) for iBT 3.0 (LnP/SfP) | |
965651c1 THJA |
674 | * 12 (0x0c) for iBT 3.5 (WsP) |
675 | * | |
676 | * For ThP/JfP and for future SKU's, the FW name varies based on HW | |
677 | * variant, HW revision and FW revision, as these are dependent on CNVi | |
678 | * and RF Combination. | |
679 | * | |
680 | * 18 (0x12) for iBT3.5 (ThP/JfP) | |
681 | * | |
682 | * The firmware file name for these will be | |
683 | * ibt-<hw_variant>-<hw_revision>-<fw_revision>.sfi. | |
684 | * | |
ca93cee5 | 685 | */ |
965651c1 THJA |
686 | switch (ver.hw_variant) { |
687 | case 0x0b: /* SfP */ | |
688 | case 0x0c: /* WsP */ | |
689 | snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.sfi", | |
0cc62caf | 690 | ver.hw_variant, le16_to_cpu(params.dev_revid)); |
965651c1 THJA |
691 | break; |
692 | case 0x12: /* ThP */ | |
693 | snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.sfi", | |
0cc62caf | 694 | ver.hw_variant, ver.hw_revision, ver.fw_revision); |
965651c1 THJA |
695 | break; |
696 | default: | |
697 | bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)", | |
698 | ver.hw_variant); | |
699 | return -EINVAL; | |
700 | } | |
ca93cee5 LP |
701 | |
702 | err = request_firmware(&fw, fwname, &hdev->dev); | |
703 | if (err < 0) { | |
f44e78a5 LP |
704 | bt_dev_err(hdev, "Failed to load Intel firmware file (%d)", |
705 | err); | |
ca93cee5 LP |
706 | return err; |
707 | } | |
708 | ||
f44e78a5 | 709 | bt_dev_info(hdev, "Found device firmware: %s", fwname); |
ca93cee5 | 710 | |
1cfbabdd | 711 | /* Save the DDC file name for later */ |
965651c1 THJA |
712 | switch (ver.hw_variant) { |
713 | case 0x0b: /* SfP */ | |
714 | case 0x0c: /* WsP */ | |
715 | snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.ddc", | |
0cc62caf | 716 | ver.hw_variant, le16_to_cpu(params.dev_revid)); |
965651c1 THJA |
717 | break; |
718 | case 0x12: /* ThP */ | |
719 | snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.ddc", | |
0cc62caf | 720 | ver.hw_variant, ver.hw_revision, ver.fw_revision); |
965651c1 THJA |
721 | break; |
722 | default: | |
723 | bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)", | |
724 | ver.hw_variant); | |
725 | return -EINVAL; | |
726 | } | |
1cfbabdd | 727 | |
ca93cee5 | 728 | if (fw->size < 644) { |
f44e78a5 LP |
729 | bt_dev_err(hdev, "Invalid size of firmware file (%zu)", |
730 | fw->size); | |
ca93cee5 LP |
731 | err = -EBADF; |
732 | goto done; | |
733 | } | |
734 | ||
735 | set_bit(STATE_DOWNLOADING, &intel->flags); | |
736 | ||
fbbe83c5 | 737 | /* Start firmware downloading and get boot parameter */ |
ac056546 | 738 | err = btintel_download_firmware(hdev, &ver, fw, &boot_param); |
fbbe83c5 | 739 | if (err < 0) |
ca93cee5 | 740 | goto done; |
ca93cee5 LP |
741 | |
742 | set_bit(STATE_FIRMWARE_LOADED, &intel->flags); | |
743 | ||
f44e78a5 | 744 | bt_dev_info(hdev, "Waiting for firmware download to complete"); |
ca93cee5 LP |
745 | |
746 | /* Before switching the device into operational mode and with that | |
747 | * booting the loaded firmware, wait for the bootloader notification | |
748 | * that all fragments have been successfully received. | |
749 | * | |
750 | * When the event processing receives the notification, then the | |
751 | * STATE_DOWNLOADING flag will be cleared. | |
752 | * | |
753 | * The firmware loading should not take longer than 5 seconds | |
754 | * and thus just timeout if that happens and fail the setup | |
755 | * of this device. | |
756 | */ | |
757 | err = wait_on_bit_timeout(&intel->flags, STATE_DOWNLOADING, | |
758 | TASK_INTERRUPTIBLE, | |
759 | msecs_to_jiffies(5000)); | |
f0a70a04 | 760 | if (err == -EINTR) { |
f44e78a5 | 761 | bt_dev_err(hdev, "Firmware loading interrupted"); |
ca93cee5 LP |
762 | err = -EINTR; |
763 | goto done; | |
764 | } | |
765 | ||
766 | if (err) { | |
f44e78a5 | 767 | bt_dev_err(hdev, "Firmware loading timeout"); |
ca93cee5 LP |
768 | err = -ETIMEDOUT; |
769 | goto done; | |
770 | } | |
771 | ||
772 | if (test_bit(STATE_FIRMWARE_FAILED, &intel->flags)) { | |
f44e78a5 | 773 | bt_dev_err(hdev, "Firmware loading failed"); |
ca93cee5 LP |
774 | err = -ENOEXEC; |
775 | goto done; | |
776 | } | |
777 | ||
778 | rettime = ktime_get(); | |
779 | delta = ktime_sub(rettime, calltime); | |
780 | duration = (unsigned long long) ktime_to_ns(delta) >> 10; | |
781 | ||
f44e78a5 | 782 | bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration); |
ca93cee5 LP |
783 | |
784 | done: | |
785 | release_firmware(fw); | |
786 | ||
ac056546 LAD |
787 | /* Check if there was an error and if is not -EALREADY which means the |
788 | * firmware has already been loaded. | |
789 | */ | |
790 | if (err < 0 && err != -EALREADY) | |
ca93cee5 LP |
791 | return err; |
792 | ||
ff289559 LP |
793 | /* We need to restore the default speed before Intel reset */ |
794 | if (speed_change) { | |
795 | err = intel_set_baudrate(hu, init_speed); | |
796 | if (err) | |
797 | return err; | |
798 | } | |
799 | ||
ca93cee5 LP |
800 | calltime = ktime_get(); |
801 | ||
802 | set_bit(STATE_BOOTING, &intel->flags); | |
803 | ||
e5889af6 THJA |
804 | err = btintel_send_intel_reset(hdev, boot_param); |
805 | if (err) | |
806 | return err; | |
ca93cee5 LP |
807 | |
808 | /* The bootloader will not indicate when the device is ready. This | |
809 | * is done by the operational firmware sending bootup notification. | |
810 | * | |
811 | * Booting into operational firmware should not take longer than | |
812 | * 1 second. However if that happens, then just fail the setup | |
813 | * since something went wrong. | |
814 | */ | |
f44e78a5 | 815 | bt_dev_info(hdev, "Waiting for device to boot"); |
ca93cee5 | 816 | |
1ab1f239 LP |
817 | err = intel_wait_booting(hu); |
818 | if (err) | |
819 | return err; | |
ca93cee5 | 820 | |
1ab1f239 | 821 | clear_bit(STATE_BOOTING, &intel->flags); |
ca93cee5 LP |
822 | |
823 | rettime = ktime_get(); | |
824 | delta = ktime_sub(rettime, calltime); | |
825 | duration = (unsigned long long) ktime_to_ns(delta) >> 10; | |
826 | ||
f44e78a5 | 827 | bt_dev_info(hdev, "Device booted in %llu usecs", duration); |
ca93cee5 | 828 | |
31eff267 LP |
829 | /* Enable LPM if matching pdev with wakeup enabled, set TX active |
830 | * until further LPM TX notification. | |
831 | */ | |
67c8bde0 | 832 | mutex_lock(&intel_device_list_lock); |
7dbbd692 | 833 | list_for_each_entry(idev, &intel_device_list, list) { |
dcb9cfaa JH |
834 | if (!hu->tty->dev) |
835 | break; | |
7dbbd692 AS |
836 | if (hu->tty->dev->parent == idev->pdev->dev.parent) { |
837 | if (device_may_wakeup(&idev->pdev->dev)) { | |
31eff267 LP |
838 | set_bit(STATE_LPM_ENABLED, &intel->flags); |
839 | set_bit(STATE_TX_ACTIVE, &intel->flags); | |
840 | } | |
b98469f4 LP |
841 | break; |
842 | } | |
843 | } | |
67c8bde0 | 844 | mutex_unlock(&intel_device_list_lock); |
b98469f4 | 845 | |
1cfbabdd LP |
846 | /* Ignore errors, device can work without DDC parameters */ |
847 | btintel_load_ddc_config(hdev, fwname); | |
848 | ||
ff289559 LP |
849 | skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_CMD_TIMEOUT); |
850 | if (IS_ERR(skb)) | |
851 | return PTR_ERR(skb); | |
852 | kfree_skb(skb); | |
853 | ||
854 | if (speed_change) { | |
855 | err = intel_set_baudrate(hu, oper_speed); | |
856 | if (err) | |
857 | return err; | |
858 | } | |
859 | ||
f44e78a5 | 860 | bt_dev_info(hdev, "Setup complete"); |
ff289559 | 861 | |
ca93cee5 LP |
862 | clear_bit(STATE_BOOTLOADER, &intel->flags); |
863 | ||
864 | return 0; | |
865 | } | |
866 | ||
867 | static int intel_recv_event(struct hci_dev *hdev, struct sk_buff *skb) | |
868 | { | |
869 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
870 | struct intel_data *intel = hu->priv; | |
871 | struct hci_event_hdr *hdr; | |
872 | ||
1ab1f239 LP |
873 | if (!test_bit(STATE_BOOTLOADER, &intel->flags) && |
874 | !test_bit(STATE_BOOTING, &intel->flags)) | |
ca93cee5 LP |
875 | goto recv; |
876 | ||
877 | hdr = (void *)skb->data; | |
878 | ||
879 | /* When the firmware loading completes the device sends | |
880 | * out a vendor specific event indicating the result of | |
881 | * the firmware loading. | |
882 | */ | |
883 | if (skb->len == 7 && hdr->evt == 0xff && hdr->plen == 0x05 && | |
884 | skb->data[2] == 0x06) { | |
885 | if (skb->data[3] != 0x00) | |
886 | set_bit(STATE_FIRMWARE_FAILED, &intel->flags); | |
887 | ||
888 | if (test_and_clear_bit(STATE_DOWNLOADING, &intel->flags) && | |
dff6d593 | 889 | test_bit(STATE_FIRMWARE_LOADED, &intel->flags)) |
ca93cee5 | 890 | wake_up_bit(&intel->flags, STATE_DOWNLOADING); |
ca93cee5 LP |
891 | |
892 | /* When switching to the operational firmware the device | |
893 | * sends a vendor specific event indicating that the bootup | |
894 | * completed. | |
895 | */ | |
896 | } else if (skb->len == 9 && hdr->evt == 0xff && hdr->plen == 0x07 && | |
897 | skb->data[2] == 0x02) { | |
dff6d593 | 898 | if (test_and_clear_bit(STATE_BOOTING, &intel->flags)) |
ca93cee5 | 899 | wake_up_bit(&intel->flags, STATE_BOOTING); |
ca93cee5 LP |
900 | } |
901 | recv: | |
902 | return hci_recv_frame(hdev, skb); | |
903 | } | |
904 | ||
b98469f4 LP |
905 | static void intel_recv_lpm_notify(struct hci_dev *hdev, int value) |
906 | { | |
907 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
908 | struct intel_data *intel = hu->priv; | |
909 | ||
f44e78a5 | 910 | bt_dev_dbg(hdev, "TX idle notification (%d)", value); |
b98469f4 | 911 | |
74cdad37 | 912 | if (value) { |
b98469f4 | 913 | set_bit(STATE_TX_ACTIVE, &intel->flags); |
74cdad37 LP |
914 | schedule_work(&intel->busy_work); |
915 | } else { | |
b98469f4 | 916 | clear_bit(STATE_TX_ACTIVE, &intel->flags); |
74cdad37 | 917 | } |
b98469f4 LP |
918 | } |
919 | ||
920 | static int intel_recv_lpm(struct hci_dev *hdev, struct sk_buff *skb) | |
921 | { | |
922 | struct hci_lpm_pkt *lpm = (void *)skb->data; | |
89436546 LP |
923 | struct hci_uart *hu = hci_get_drvdata(hdev); |
924 | struct intel_data *intel = hu->priv; | |
b98469f4 LP |
925 | |
926 | switch (lpm->opcode) { | |
927 | case LPM_OP_TX_NOTIFY: | |
1b197574 LP |
928 | if (lpm->dlen < 1) { |
929 | bt_dev_err(hu->hdev, "Invalid LPM notification packet"); | |
930 | break; | |
931 | } | |
932 | intel_recv_lpm_notify(hdev, lpm->data[0]); | |
b98469f4 | 933 | break; |
89436546 LP |
934 | case LPM_OP_SUSPEND_ACK: |
935 | set_bit(STATE_SUSPENDED, &intel->flags); | |
dff6d593 | 936 | if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) |
89436546 | 937 | wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION); |
89436546 LP |
938 | break; |
939 | case LPM_OP_RESUME_ACK: | |
940 | clear_bit(STATE_SUSPENDED, &intel->flags); | |
dff6d593 | 941 | if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) |
89436546 | 942 | wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION); |
89436546 | 943 | break; |
b98469f4 | 944 | default: |
f44e78a5 | 945 | bt_dev_err(hdev, "Unknown LPM opcode (%02x)", lpm->opcode); |
b98469f4 LP |
946 | break; |
947 | } | |
948 | ||
949 | kfree_skb(skb); | |
950 | ||
951 | return 0; | |
952 | } | |
953 | ||
954 | #define INTEL_RECV_LPM \ | |
955 | .type = HCI_LPM_PKT, \ | |
956 | .hlen = HCI_LPM_HDR_SIZE, \ | |
957 | .loff = 1, \ | |
958 | .lsize = 1, \ | |
959 | .maxlen = HCI_LPM_MAX_SIZE | |
960 | ||
ca93cee5 | 961 | static const struct h4_recv_pkt intel_recv_pkts[] = { |
b98469f4 LP |
962 | { H4_RECV_ACL, .recv = hci_recv_frame }, |
963 | { H4_RECV_SCO, .recv = hci_recv_frame }, | |
964 | { H4_RECV_EVENT, .recv = intel_recv_event }, | |
965 | { INTEL_RECV_LPM, .recv = intel_recv_lpm }, | |
ca93cee5 LP |
966 | }; |
967 | ||
968 | static int intel_recv(struct hci_uart *hu, const void *data, int count) | |
969 | { | |
970 | struct intel_data *intel = hu->priv; | |
971 | ||
972 | if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) | |
973 | return -EUNATCH; | |
974 | ||
975 | intel->rx_skb = h4_recv_buf(hu->hdev, intel->rx_skb, data, count, | |
976 | intel_recv_pkts, | |
977 | ARRAY_SIZE(intel_recv_pkts)); | |
978 | if (IS_ERR(intel->rx_skb)) { | |
979 | int err = PTR_ERR(intel->rx_skb); | |
f44e78a5 | 980 | bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); |
ca93cee5 LP |
981 | intel->rx_skb = NULL; |
982 | return err; | |
983 | } | |
984 | ||
985 | return count; | |
986 | } | |
987 | ||
988 | static int intel_enqueue(struct hci_uart *hu, struct sk_buff *skb) | |
989 | { | |
990 | struct intel_data *intel = hu->priv; | |
7dbbd692 | 991 | struct intel_device *idev; |
ca93cee5 LP |
992 | |
993 | BT_DBG("hu %p skb %p", hu, skb); | |
994 | ||
dcb9cfaa JH |
995 | if (!hu->tty->dev) |
996 | goto out_enqueue; | |
997 | ||
74cdad37 LP |
998 | /* Be sure our controller is resumed and potential LPM transaction |
999 | * completed before enqueuing any packet. | |
1000 | */ | |
1001 | mutex_lock(&intel_device_list_lock); | |
7dbbd692 | 1002 | list_for_each_entry(idev, &intel_device_list, list) { |
74cdad37 LP |
1003 | if (hu->tty->dev->parent == idev->pdev->dev.parent) { |
1004 | pm_runtime_get_sync(&idev->pdev->dev); | |
1005 | pm_runtime_mark_last_busy(&idev->pdev->dev); | |
1006 | pm_runtime_put_autosuspend(&idev->pdev->dev); | |
1007 | break; | |
1008 | } | |
1009 | } | |
1010 | mutex_unlock(&intel_device_list_lock); | |
dcb9cfaa | 1011 | out_enqueue: |
ca93cee5 LP |
1012 | skb_queue_tail(&intel->txq, skb); |
1013 | ||
1014 | return 0; | |
1015 | } | |
1016 | ||
1017 | static struct sk_buff *intel_dequeue(struct hci_uart *hu) | |
1018 | { | |
1019 | struct intel_data *intel = hu->priv; | |
1020 | struct sk_buff *skb; | |
1021 | ||
1022 | skb = skb_dequeue(&intel->txq); | |
1023 | if (!skb) | |
1024 | return skb; | |
1025 | ||
1026 | if (test_bit(STATE_BOOTLOADER, &intel->flags) && | |
618e8bc2 | 1027 | (hci_skb_pkt_type(skb) == HCI_COMMAND_PKT)) { |
ca93cee5 LP |
1028 | struct hci_command_hdr *cmd = (void *)skb->data; |
1029 | __u16 opcode = le16_to_cpu(cmd->opcode); | |
1030 | ||
1031 | /* When the 0xfc01 command is issued to boot into | |
1032 | * the operational firmware, it will actually not | |
1033 | * send a command complete event. To keep the flow | |
1034 | * control working inject that event here. | |
1035 | */ | |
1036 | if (opcode == 0xfc01) | |
1037 | inject_cmd_complete(hu->hdev, opcode); | |
1038 | } | |
1039 | ||
1040 | /* Prepend skb with frame type */ | |
618e8bc2 | 1041 | memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); |
ca93cee5 LP |
1042 | |
1043 | return skb; | |
1044 | } | |
1045 | ||
1046 | static const struct hci_uart_proto intel_proto = { | |
1047 | .id = HCI_UART_INTEL, | |
1048 | .name = "Intel", | |
aee61f7a | 1049 | .manufacturer = 2, |
ca93cee5 | 1050 | .init_speed = 115200, |
ff289559 | 1051 | .oper_speed = 3000000, |
ca93cee5 LP |
1052 | .open = intel_open, |
1053 | .close = intel_close, | |
1054 | .flush = intel_flush, | |
1055 | .setup = intel_setup, | |
ff289559 | 1056 | .set_baudrate = intel_set_baudrate, |
ca93cee5 LP |
1057 | .recv = intel_recv, |
1058 | .enqueue = intel_enqueue, | |
1059 | .dequeue = intel_dequeue, | |
1060 | }; | |
1061 | ||
1ab1f239 LP |
1062 | #ifdef CONFIG_ACPI |
1063 | static const struct acpi_device_id intel_acpi_match[] = { | |
1064 | { "INT33E1", 0 }, | |
c6db0143 AS |
1065 | { "INT33E3", 0 }, |
1066 | { } | |
1ab1f239 LP |
1067 | }; |
1068 | MODULE_DEVICE_TABLE(acpi, intel_acpi_match); | |
1ab1f239 LP |
1069 | #endif |
1070 | ||
74cdad37 | 1071 | #ifdef CONFIG_PM |
f7552473 | 1072 | static int intel_suspend_device(struct device *dev) |
aa6802df LP |
1073 | { |
1074 | struct intel_device *idev = dev_get_drvdata(dev); | |
1075 | ||
aa6802df LP |
1076 | mutex_lock(&idev->hu_lock); |
1077 | if (idev->hu) | |
1078 | intel_lpm_suspend(idev->hu); | |
1079 | mutex_unlock(&idev->hu_lock); | |
1080 | ||
1081 | return 0; | |
1082 | } | |
1083 | ||
f7552473 | 1084 | static int intel_resume_device(struct device *dev) |
aa6802df LP |
1085 | { |
1086 | struct intel_device *idev = dev_get_drvdata(dev); | |
1087 | ||
aa6802df LP |
1088 | mutex_lock(&idev->hu_lock); |
1089 | if (idev->hu) | |
1090 | intel_lpm_resume(idev->hu); | |
1091 | mutex_unlock(&idev->hu_lock); | |
1092 | ||
1093 | return 0; | |
1094 | } | |
1095 | #endif | |
1096 | ||
f7552473 LP |
1097 | #ifdef CONFIG_PM_SLEEP |
1098 | static int intel_suspend(struct device *dev) | |
1099 | { | |
1100 | struct intel_device *idev = dev_get_drvdata(dev); | |
1101 | ||
1102 | if (device_may_wakeup(dev)) | |
1103 | enable_irq_wake(idev->irq); | |
1104 | ||
1105 | return intel_suspend_device(dev); | |
1106 | } | |
1107 | ||
1108 | static int intel_resume(struct device *dev) | |
1109 | { | |
1110 | struct intel_device *idev = dev_get_drvdata(dev); | |
1111 | ||
1112 | if (device_may_wakeup(dev)) | |
1113 | disable_irq_wake(idev->irq); | |
1114 | ||
1115 | return intel_resume_device(dev); | |
1116 | } | |
1117 | #endif | |
1118 | ||
aa6802df LP |
1119 | static const struct dev_pm_ops intel_pm_ops = { |
1120 | SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume) | |
f7552473 | 1121 | SET_RUNTIME_PM_OPS(intel_suspend_device, intel_resume_device, NULL) |
aa6802df LP |
1122 | }; |
1123 | ||
4a59d433 AS |
1124 | static const struct acpi_gpio_params reset_gpios = { 0, 0, false }; |
1125 | static const struct acpi_gpio_params host_wake_gpios = { 1, 0, false }; | |
1126 | ||
1127 | static const struct acpi_gpio_mapping acpi_hci_intel_gpios[] = { | |
c6db0143 AS |
1128 | { "reset-gpios", &reset_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO }, |
1129 | { "host-wake-gpios", &host_wake_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO }, | |
1130 | { } | |
4a59d433 AS |
1131 | }; |
1132 | ||
1ab1f239 LP |
1133 | static int intel_probe(struct platform_device *pdev) |
1134 | { | |
1135 | struct intel_device *idev; | |
4a59d433 | 1136 | int ret; |
1ab1f239 LP |
1137 | |
1138 | idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL); | |
1139 | if (!idev) | |
1140 | return -ENOMEM; | |
1141 | ||
aa6802df LP |
1142 | mutex_init(&idev->hu_lock); |
1143 | ||
1ab1f239 LP |
1144 | idev->pdev = pdev; |
1145 | ||
4a59d433 AS |
1146 | ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, acpi_hci_intel_gpios); |
1147 | if (ret) | |
1148 | dev_dbg(&pdev->dev, "Unable to add GPIO mapping table\n"); | |
1149 | ||
32b9ccbc | 1150 | idev->reset = devm_gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW); |
1ab1f239 LP |
1151 | if (IS_ERR(idev->reset)) { |
1152 | dev_err(&pdev->dev, "Unable to retrieve gpio\n"); | |
1153 | return PTR_ERR(idev->reset); | |
1154 | } | |
1155 | ||
765ea3ab LP |
1156 | idev->irq = platform_get_irq(pdev, 0); |
1157 | if (idev->irq < 0) { | |
1158 | struct gpio_desc *host_wake; | |
1159 | ||
1160 | dev_err(&pdev->dev, "No IRQ, falling back to gpio-irq\n"); | |
1161 | ||
32b9ccbc | 1162 | host_wake = devm_gpiod_get(&pdev->dev, "host-wake", GPIOD_IN); |
765ea3ab LP |
1163 | if (IS_ERR(host_wake)) { |
1164 | dev_err(&pdev->dev, "Unable to retrieve IRQ\n"); | |
1165 | goto no_irq; | |
1166 | } | |
1167 | ||
1168 | idev->irq = gpiod_to_irq(host_wake); | |
1169 | if (idev->irq < 0) { | |
1170 | dev_err(&pdev->dev, "No corresponding irq for gpio\n"); | |
1171 | goto no_irq; | |
1172 | } | |
1173 | } | |
1174 | ||
1175 | /* Only enable wake-up/irq when controller is powered */ | |
1176 | device_set_wakeup_capable(&pdev->dev, true); | |
1177 | device_wakeup_disable(&pdev->dev); | |
1178 | ||
1179 | no_irq: | |
1ab1f239 LP |
1180 | platform_set_drvdata(pdev, idev); |
1181 | ||
1182 | /* Place this instance on the device list */ | |
67c8bde0 | 1183 | mutex_lock(&intel_device_list_lock); |
1ab1f239 | 1184 | list_add_tail(&idev->list, &intel_device_list); |
67c8bde0 | 1185 | mutex_unlock(&intel_device_list_lock); |
1ab1f239 | 1186 | |
765ea3ab LP |
1187 | dev_info(&pdev->dev, "registered, gpio(%d)/irq(%d).\n", |
1188 | desc_to_gpio(idev->reset), idev->irq); | |
1ab1f239 LP |
1189 | |
1190 | return 0; | |
1191 | } | |
1192 | ||
1193 | static int intel_remove(struct platform_device *pdev) | |
1194 | { | |
1195 | struct intel_device *idev = platform_get_drvdata(pdev); | |
1196 | ||
765ea3ab LP |
1197 | device_wakeup_disable(&pdev->dev); |
1198 | ||
67c8bde0 | 1199 | mutex_lock(&intel_device_list_lock); |
1ab1f239 | 1200 | list_del(&idev->list); |
67c8bde0 | 1201 | mutex_unlock(&intel_device_list_lock); |
1ab1f239 LP |
1202 | |
1203 | dev_info(&pdev->dev, "unregistered.\n"); | |
1204 | ||
1205 | return 0; | |
1206 | } | |
1207 | ||
1208 | static struct platform_driver intel_driver = { | |
1209 | .probe = intel_probe, | |
1210 | .remove = intel_remove, | |
1211 | .driver = { | |
1212 | .name = "hci_intel", | |
1213 | .acpi_match_table = ACPI_PTR(intel_acpi_match), | |
aa6802df | 1214 | .pm = &intel_pm_ops, |
1ab1f239 LP |
1215 | }, |
1216 | }; | |
1217 | ||
ca93cee5 LP |
1218 | int __init intel_init(void) |
1219 | { | |
ab2d2a98 JJ |
1220 | int err; |
1221 | ||
1222 | err = platform_driver_register(&intel_driver); | |
1223 | if (err) | |
1224 | return err; | |
1ab1f239 | 1225 | |
ca93cee5 LP |
1226 | return hci_uart_register_proto(&intel_proto); |
1227 | } | |
1228 | ||
1229 | int __exit intel_deinit(void) | |
1230 | { | |
1ab1f239 LP |
1231 | platform_driver_unregister(&intel_driver); |
1232 | ||
ca93cee5 LP |
1233 | return hci_uart_unregister_proto(&intel_proto); |
1234 | } |