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a4e1a86a TK |
1 | #ifndef ARCH_X86_64_H |
2 | #define ARCH_X86_64_H | |
ebac4655 | 3 | |
9a2d78b3 JA |
4 | #ifndef __NR_sys_io_uring_setup |
5 | #define __NR_sys_io_uring_setup 335 | |
ebec344d | 6 | #endif |
9a2d78b3 JA |
7 | #ifndef __NR_sys_io_uring_enter |
8 | #define __NR_sys_io_uring_enter 336 | |
52885fa2 | 9 | #endif |
ebec344d | 10 | |
6b13c710 JA |
11 | static inline void do_cpuid(unsigned int *eax, unsigned int *ebx, |
12 | unsigned int *ecx, unsigned int *edx) | |
13 | { | |
14 | asm volatile("cpuid" | |
8afbf874 | 15 | : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx) |
6b13c710 JA |
16 | : "0" (*eax), "2" (*ecx) |
17 | : "memory"); | |
18 | } | |
19 | ||
c473a9bd | 20 | #include "arch-x86-common.h" /* IWYU pragma: export */ |
fa80feae | 21 | |
cca84643 | 22 | #define FIO_ARCH (arch_x86_64) |
ebac4655 | 23 | |
cb25df61 JA |
24 | #define FIO_HUGE_PAGE 2097152 |
25 | ||
db6defc7 | 26 | #define nop __asm__ __volatile__("rep;nop": : :"memory") |
44c47feb JA |
27 | #define read_barrier() __asm__ __volatile__("lfence":::"memory") |
28 | #define write_barrier() __asm__ __volatile__("sfence":::"memory") | |
ebac4655 | 29 | |
0ce8b119 | 30 | static inline unsigned long arch_ffz(unsigned long bitmask) |
8f7e39dd | 31 | { |
0ce8b119 | 32 | __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask)); |
8f7e39dd JA |
33 | return bitmask; |
34 | } | |
c223da83 JA |
35 | |
36 | static inline unsigned long long get_cpu_clock(void) | |
37 | { | |
38 | unsigned int lo, hi; | |
39 | ||
40 | __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi)); | |
41 | return ((unsigned long long) hi << 32ULL) | lo; | |
42 | } | |
43 | ||
21df44a2 | 44 | #define ARCH_HAVE_FFZ |
2f68124f | 45 | #define ARCH_HAVE_SSE4_2 |
c223da83 | 46 | #define ARCH_HAVE_CPU_CLOCK |
bffad86f | 47 | #define ARCH_HAVE_IOURING |
8f7e39dd | 48 | |
16dc0710 JA |
49 | #define RDRAND_LONG ".byte 0x48,0x0f,0xc7,0xf0" |
50 | #define RDSEED_LONG ".byte 0x48,0x0f,0xc7,0xf8" | |
51 | #define RDRAND_RETRY 100 | |
52 | ||
53 | static inline int arch_rand_long(unsigned long *val) | |
54 | { | |
55 | int ok; | |
56 | ||
57 | asm volatile("1: " RDRAND_LONG "\n\t" | |
58 | "jc 2f\n\t" | |
59 | "decl %0\n\t" | |
60 | "jnz 1b\n\t" | |
61 | "2:" | |
62 | : "=r" (ok), "=a" (*val) | |
63 | : "0" (RDRAND_RETRY)); | |
64 | ||
65 | return ok; | |
66 | } | |
67 | ||
68 | static inline int arch_rand_seed(unsigned long *seed) | |
69 | { | |
70 | unsigned char ok; | |
71 | ||
72 | asm volatile(RDSEED_LONG "\n\t" | |
73 | "setc %0" | |
74 | : "=qm" (ok), "=a" (*seed)); | |
75 | ||
76 | return 0; | |
77 | } | |
78 | ||
ebac4655 | 79 | #endif |