Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6: (23 commits)
  at_hdmac: Rework suspend_late()/resume_early()
  PM: Reset transition_started at dpm_resume_noirq
  PM: Update kerneldoc comments in drivers/base/power/main.c
  PM: Add convenience macro to make switching to dev_pm_ops less error-prone
  hp-wmi: Switch driver to dev_pm_ops
  floppy: Switch driver to dev_pm_ops
  PM: Trivial fixes
  PM / Hibernate / Memory hotplug: Always use for_each_populated_zone()
  PM/Hibernate: Do not try to allocate too much memory too hard (rev. 2)
  PM/Hibernate: Do not release preallocated memory unnecessarily (rev. 2)
  PM/Hibernate: Rework shrinking of memory
  PM: Fix typo in label name s/Platofrm_finish/Platform_finish/
  PM: Run-time PM platform device bus support
  PM: Introduce core framework for run-time PM of I/O devices (rev. 17)
  Driver Core: Make PM operations a const pointer
  PM: Remove platform device suspend_late()/resume_early() V2
  USB: Rework musb suspend()/resume_early()
  I2C: Rework i2c-s3c2410 suspend_late()/resume() V2
  I2C: Rework i2c-pxa suspend_late()/resume_early()
  DMA: Rework txx9dmac suspend_late()/resume_early()
  ...

Fix trivial conflict in drivers/base/platform.c (due to same
constification patch being merged in both sides, along with some other
PM work in the PM branch)

diff --combined arch/arm/plat-omap/gpio.c
index fd21937fe110073648fb537cf94ac52fc1bc5f34,50b19a3027bcb1822c93ab35dc7675f0f72b0b8c..176c86e5531d62f01376beb693cee0b55eb7cbc4
--- 1/arch/arm/plat-omap/gpio.c
--- 2/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@@ -138,32 -138,6 +138,32 @@@
  #define OMAP24XX_GPIO_CLEARDATAOUT    0x0090
  #define OMAP24XX_GPIO_SETDATAOUT      0x0094
  
 +#define OMAP4_GPIO_REVISION           0x0000
 +#define OMAP4_GPIO_SYSCONFIG          0x0010
 +#define OMAP4_GPIO_EOI                        0x0020
 +#define OMAP4_GPIO_IRQSTATUSRAW0      0x0024
 +#define OMAP4_GPIO_IRQSTATUSRAW1      0x0028
 +#define OMAP4_GPIO_IRQSTATUS0         0x002c
 +#define OMAP4_GPIO_IRQSTATUS1         0x0030
 +#define OMAP4_GPIO_IRQSTATUSSET0      0x0034
 +#define OMAP4_GPIO_IRQSTATUSSET1      0x0038
 +#define OMAP4_GPIO_IRQSTATUSCLR0      0x003c
 +#define OMAP4_GPIO_IRQSTATUSCLR1      0x0040
 +#define OMAP4_GPIO_IRQWAKEN0          0x0044
 +#define OMAP4_GPIO_IRQWAKEN1          0x0048
 +#define OMAP4_GPIO_SYSSTATUS          0x0104
 +#define OMAP4_GPIO_CTRL                       0x0130
 +#define OMAP4_GPIO_OE                 0x0134
 +#define OMAP4_GPIO_DATAIN             0x0138
 +#define OMAP4_GPIO_DATAOUT            0x013c
 +#define OMAP4_GPIO_LEVELDETECT0               0x0140
 +#define OMAP4_GPIO_LEVELDETECT1               0x0144
 +#define OMAP4_GPIO_RISINGDETECT               0x0148
 +#define OMAP4_GPIO_FALLINGDETECT      0x014c
 +#define OMAP4_GPIO_DEBOUNCENABLE      0x0150
 +#define OMAP4_GPIO_DEBOUNCINGTIME     0x0154
 +#define OMAP4_GPIO_CLEARDATAOUT               0x0190
 +#define OMAP4_GPIO_SETDATAOUT         0x0194
  /*
   * omap34xx specific GPIO registers
   */
@@@ -412,15 -386,11 +412,15 @@@ static void _set_gpio_direction(struct 
                reg += OMAP850_GPIO_DIR_CONTROL;
                break;
  #endif
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                      defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                reg += OMAP24XX_GPIO_OE;
                break;
 +#endif
 +#if defined(CONFIG_ARCH_OMAP4)
 +      case METHOD_GPIO_24XX:
 +              reg += OMAP4_GPIO_OE;
 +              break;
  #endif
        default:
                WARN_ON(1);
@@@ -489,7 -459,8 +489,7 @@@ static void _set_gpio_dataout(struct gp
                        l &= ~(1 << gpio);
                break;
  #endif
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                      defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                if (enable)
                        reg += OMAP24XX_GPIO_SETDATAOUT;
@@@ -497,15 -468,6 +497,15 @@@
                        reg += OMAP24XX_GPIO_CLEARDATAOUT;
                l = 1 << gpio;
                break;
 +#endif
 +#ifdef CONFIG_ARCH_OMAP4
 +      case METHOD_GPIO_24XX:
 +              if (enable)
 +                      reg += OMAP4_GPIO_SETDATAOUT;
 +              else
 +                      reg += OMAP4_GPIO_CLEARDATAOUT;
 +              l = 1 << gpio;
 +              break;
  #endif
        default:
                WARN_ON(1);
@@@ -547,15 -509,11 +547,15 @@@ static int _get_gpio_datain(struct gpio
                reg += OMAP850_GPIO_DATA_INPUT;
                break;
  #endif
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                      defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                reg += OMAP24XX_GPIO_DATAIN;
                break;
 +#endif
 +#ifdef CONFIG_ARCH_OMAP4
 +      case METHOD_GPIO_24XX:
 +              reg += OMAP4_GPIO_DATAIN;
 +              break;
  #endif
        default:
                return -EINVAL;
@@@ -631,11 -589,7 +631,11 @@@ void omap_set_gpio_debounce(int gpio, i
  
        bank = get_gpio_bank(gpio);
        reg = bank->base;
 +#ifdef CONFIG_ARCH_OMAP4
 +      reg += OMAP4_GPIO_DEBOUNCENABLE;
 +#else
        reg += OMAP24XX_GPIO_DEBOUNCE_EN;
 +#endif
  
        spin_lock_irqsave(&bank->lock, flags);
        val = __raw_readl(reg);
@@@ -672,11 -626,7 +672,11 @@@ void omap_set_gpio_debounce_time(int gp
        reg = bank->base;
  
        enc_time &= 0xff;
 +#ifdef CONFIG_ARCH_OMAP4
 +      reg += OMAP4_GPIO_DEBOUNCINGTIME;
 +#else
        reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
 +#endif
        __raw_writel(enc_time, reg);
  }
  EXPORT_SYMBOL(omap_set_gpio_debounce_time);
@@@ -688,46 -638,23 +688,46 @@@ static inline void set_24xx_gpio_trigge
  {
        void __iomem *base = bank->base;
        u32 gpio_bit = 1 << gpio;
 +      u32 val;
  
 -      MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
 -              trigger & IRQ_TYPE_LEVEL_LOW);
 -      MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
 -              trigger & IRQ_TYPE_LEVEL_HIGH);
 -      MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
 -              trigger & IRQ_TYPE_EDGE_RISING);
 -      MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
 -              trigger & IRQ_TYPE_EDGE_FALLING);
 -
 +      if (cpu_is_omap44xx()) {
 +              MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
 +                      trigger & IRQ_TYPE_LEVEL_LOW);
 +              MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
 +                      trigger & IRQ_TYPE_LEVEL_HIGH);
 +              MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
 +                      trigger & IRQ_TYPE_EDGE_RISING);
 +              MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
 +                      trigger & IRQ_TYPE_EDGE_FALLING);
 +      } else {
 +              MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
 +                      trigger & IRQ_TYPE_LEVEL_LOW);
 +              MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
 +                      trigger & IRQ_TYPE_LEVEL_HIGH);
 +              MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
 +                      trigger & IRQ_TYPE_EDGE_RISING);
 +              MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
 +                      trigger & IRQ_TYPE_EDGE_FALLING);
 +      }
        if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
 -              if (trigger != 0)
 -                      __raw_writel(1 << gpio, bank->base
 +              if (cpu_is_omap44xx()) {
 +                      if (trigger != 0)
 +                              __raw_writel(1 << gpio, bank->base+
 +                                              OMAP4_GPIO_IRQWAKEN0);
 +                      else {
 +                              val = __raw_readl(bank->base +
 +                                                      OMAP4_GPIO_IRQWAKEN0);
 +                              __raw_writel(val & (~(1 << gpio)), bank->base +
 +                                                       OMAP4_GPIO_IRQWAKEN0);
 +                      }
 +              } else {
 +                      if (trigger != 0)
 +                              __raw_writel(1 << gpio, bank->base
                                        + OMAP24XX_GPIO_SETWKUENA);
 -              else
 -                      __raw_writel(1 << gpio, bank->base
 +                      else
 +                              __raw_writel(1 << gpio, bank->base
                                        + OMAP24XX_GPIO_CLEARWKUENA);
 +              }
        } else {
                if (trigger != 0)
                        bank->enabled_non_wakeup_gpios |= gpio_bit;
@@@ -735,15 -662,9 +735,15 @@@
                        bank->enabled_non_wakeup_gpios &= ~gpio_bit;
        }
  
 -      bank->level_mask =
 -              __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
 -              __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
 +      if (cpu_is_omap44xx()) {
 +              bank->level_mask =
 +                      __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
 +                      __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
 +      } else {
 +              bank->level_mask =
 +                      __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
 +                      __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
 +      }
  }
  #endif
  
@@@ -907,15 -828,11 +907,15 @@@ static void _clear_gpio_irqbank(struct 
                reg += OMAP850_GPIO_INT_STATUS;
                break;
  #endif
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                              defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                reg += OMAP24XX_GPIO_IRQSTATUS1;
                break;
 +#endif
 +#if defined(CONFIG_ARCH_OMAP4)
 +      case METHOD_GPIO_24XX:
 +              reg += OMAP4_GPIO_IRQSTATUS0;
 +              break;
  #endif
        default:
                WARN_ON(1);
@@@ -926,16 -843,12 +926,16 @@@
        /* Workaround for clearing DSP GPIO interrupts to allow retention */
  #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
 -      if (cpu_is_omap24xx() || cpu_is_omap34xx())
 +#endif
 +#if defined(CONFIG_ARCH_OMAP4)
 +      reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
 +#endif
 +      if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
                __raw_writel(gpio_mask, reg);
  
        /* Flush posted write for the irq status to avoid spurious interrupts */
        __raw_readl(reg);
 -#endif
 +      }
  }
  
  static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
@@@ -985,17 -898,12 +985,17 @@@ static u32 _get_gpio_irqbank_mask(struc
                inv = 1;
                break;
  #endif
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                              defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                reg += OMAP24XX_GPIO_IRQENABLE1;
                mask = 0xffffffff;
                break;
 +#endif
 +#if defined(CONFIG_ARCH_OMAP4)
 +      case METHOD_GPIO_24XX:
 +              reg += OMAP4_GPIO_IRQSTATUSSET0;
 +              mask = 0xffffffff;
 +              break;
  #endif
        default:
                WARN_ON(1);
@@@ -1064,7 -972,8 +1064,7 @@@ static void _enable_gpio_irqbank(struc
                        l |= gpio_mask;
                break;
  #endif
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -              defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                if (enable)
                        reg += OMAP24XX_GPIO_SETIRQENABLE1;
@@@ -1072,15 -981,6 +1072,15 @@@
                        reg += OMAP24XX_GPIO_CLEARIRQENABLE1;
                l = gpio_mask;
                break;
 +#endif
 +#ifdef CONFIG_ARCH_OMAP4
 +      case METHOD_GPIO_24XX:
 +              if (enable)
 +                      reg += OMAP4_GPIO_IRQSTATUSSET0;
 +              else
 +                      reg += OMAP4_GPIO_IRQSTATUSCLR0;
 +              l = gpio_mask;
 +              break;
  #endif
        default:
                WARN_ON(1);
@@@ -1257,13 -1157,10 +1257,13 @@@ static void gpio_irq_handler(unsigned i
        if (bank->method == METHOD_GPIO_850)
                isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
  #endif
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                              defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        if (bank->method == METHOD_GPIO_24XX)
                isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
 +#endif
 +#if defined(CONFIG_ARCH_OMAP4)
 +      if (bank->method == METHOD_GPIO_24XX)
 +              isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0;
  #endif
        while(1) {
                u32 isr_saved, level_mask = 0;
@@@ -1418,8 -1315,9 +1418,9 @@@ static struct irq_chip mpuio_irq_chip 
  
  #include <linux/platform_device.h>
  
- static int omap_mpuio_suspend_late(struct platform_device *pdev, pm_message_t mesg)
+ static int omap_mpuio_suspend_noirq(struct device *dev)
  {
+       struct platform_device *pdev = to_platform_device(dev);
        struct gpio_bank        *bank = platform_get_drvdata(pdev);
        void __iomem            *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
        unsigned long           flags;
@@@ -1432,8 -1330,9 +1433,9 @@@
        return 0;
  }
  
- static int omap_mpuio_resume_early(struct platform_device *pdev)
+ static int omap_mpuio_resume_noirq(struct device *dev)
  {
+       struct platform_device *pdev = to_platform_device(dev);
        struct gpio_bank        *bank = platform_get_drvdata(pdev);
        void __iomem            *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
        unsigned long           flags;
@@@ -1445,14 -1344,18 +1447,18 @@@
        return 0;
  }
  
+ static struct dev_pm_ops omap_mpuio_dev_pm_ops = {
+       .suspend_noirq = omap_mpuio_suspend_noirq,
+       .resume_noirq = omap_mpuio_resume_noirq,
+ };
+ 
  /* use platform_driver for this, now that there's no longer any
   * point to sys_device (other than not disturbing old code).
   */
  static struct platform_driver omap_mpuio_driver = {
-       .suspend_late   = omap_mpuio_suspend_late,
-       .resume_early   = omap_mpuio_resume_early,
        .driver         = {
                .name   = "mpuio",
+               .pm     = &omap_mpuio_dev_pm_ops,
        },
  };
  
@@@ -1741,7 -1644,7 +1747,7 @@@ static int __init _omap_gpio_init(void
  
                gpio_bank_count = OMAP34XX_NR_GPIOS;
                gpio_bank = gpio_bank_44xx;
 -              rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
 +              rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
                printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n",
                        (rev >> 4) & 0x0f, rev & 0x0f);
        }
@@@ -1775,16 -1678,7 +1781,16 @@@
                        static const u32 non_wakeup_gpios[] = {
                                0xe203ffc0, 0x08700040
                        };
 -
 +              if (cpu_is_omap44xx()) {
 +                      __raw_writel(0xffffffff, bank->base +
 +                                              OMAP4_GPIO_IRQSTATUSCLR0);
 +                      __raw_writew(0x0015, bank->base +
 +                                              OMAP4_GPIO_SYSCONFIG);
 +                      __raw_writel(0x00000000, bank->base +
 +                                               OMAP4_GPIO_DEBOUNCENABLE);
 +                      /* Initialize interface clock ungated, module enabled */
 +                      __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
 +              } else {
                        __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1);
                        __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1);
                        __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG);
@@@ -1792,12 -1686,12 +1798,12 @@@
  
                        /* Initialize interface clock ungated, module enabled */
                        __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
 +              }
                        if (i < ARRAY_SIZE(non_wakeup_gpios))
                                bank->non_wakeup_gpios = non_wakeup_gpios[i];
                        gpio_count = 32;
                }
  #endif
 -
                /* REVISIT eventually switch from OMAP-specific gpio structs
                 * over to the generic ones
                 */
@@@ -1883,19 -1777,13 +1889,19 @@@ static int omap_gpio_suspend(struct sys
                        wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
                        break;
  #endif
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                              defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                case METHOD_GPIO_24XX:
                        wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
                        wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
                        wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
                        break;
 +#endif
 +#ifdef CONFIG_ARCH_OMAP4
 +              case METHOD_GPIO_24XX:
 +                      wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
 +                      wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
 +                      wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
 +                      break;
  #endif
                default:
                        continue;
@@@ -1931,17 -1819,12 +1937,17 @@@ static int omap_gpio_resume(struct sys_
                        wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
                        break;
  #endif
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                      defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                case METHOD_GPIO_24XX:
                        wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
                        wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
                        break;
 +#endif
 +#ifdef CONFIG_ARCH_OMAP4
 +              case METHOD_GPIO_24XX:
 +                      wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
 +                      wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
 +                      break;
  #endif
                default:
                        continue;
@@@ -1986,28 -1869,20 +1992,28 @@@ void omap2_gpio_prepare_for_retention(v
  
                if (!(bank->enabled_non_wakeup_gpios))
                        continue;
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                              defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
                l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
                l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
 +#endif
 +#ifdef CONFIG_ARCH_OMAP4
 +              bank->saved_datain = __raw_readl(bank->base +
 +                                                      OMAP4_GPIO_DATAIN);
 +              l1 = __raw_readl(bank->base + OMAP4_GPIO_FALLINGDETECT);
 +              l2 = __raw_readl(bank->base + OMAP4_GPIO_RISINGDETECT);
  #endif
                bank->saved_fallingdetect = l1;
                bank->saved_risingdetect = l2;
                l1 &= ~bank->enabled_non_wakeup_gpios;
                l2 &= ~bank->enabled_non_wakeup_gpios;
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                      defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
                __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
 +#endif
 +#ifdef CONFIG_ARCH_OMAP4
 +              __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
 +              __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
  #endif
                c++;
        }
@@@ -2030,49 -1905,33 +2036,49 @@@ void omap2_gpio_resume_after_retention(
  
                if (!(bank->enabled_non_wakeup_gpios))
                        continue;
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                      defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                __raw_writel(bank->saved_fallingdetect,
                                 bank->base + OMAP24XX_GPIO_FALLINGDETECT);
                __raw_writel(bank->saved_risingdetect,
                                 bank->base + OMAP24XX_GPIO_RISINGDETECT);
 +              l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
 +#endif
 +#ifdef CONFIG_ARCH_OMAP4
 +              __raw_writel(bank->saved_fallingdetect,
 +                               bank->base + OMAP4_GPIO_FALLINGDETECT);
 +              __raw_writel(bank->saved_risingdetect,
 +                               bank->base + OMAP4_GPIO_RISINGDETECT);
 +              l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
  #endif
                /* Check if any of the non-wakeup interrupt GPIOs have changed
                 * state.  If so, generate an IRQ by software.  This is
                 * horribly racy, but it's the best we can do to work around
                 * this silicon bug. */
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                      defined(CONFIG_ARCH_OMAP4)
 -              l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
 -#endif
                l ^= bank->saved_datain;
                l &= bank->non_wakeup_gpios;
                if (l) {
                        u32 old0, old1;
 -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
 -                      defined(CONFIG_ARCH_OMAP4)
 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                        old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                        old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
                        __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                        __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
                        __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                        __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
 +#endif
 +#ifdef CONFIG_ARCH_OMAP4
 +                      old0 = __raw_readl(bank->base +
 +                                              OMAP4_GPIO_LEVELDETECT0);
 +                      old1 = __raw_readl(bank->base +
 +                                              OMAP4_GPIO_LEVELDETECT1);
 +                      __raw_writel(old0 | l, bank->base +
 +                                              OMAP4_GPIO_LEVELDETECT0);
 +                      __raw_writel(old1 | l, bank->base +
 +                                              OMAP4_GPIO_LEVELDETECT1);
 +                      __raw_writel(old0, bank->base +
 +                                              OMAP4_GPIO_LEVELDETECT0);
 +                      __raw_writel(old1, bank->base +
 +                                              OMAP4_GPIO_LEVELDETECT1);
  #endif
                }
        }