arm64: dts: marvell: add CP110 uart peripherals

The CP110 component has 4 uart peripherals. All of them use the same clock
gate for slow peripherals that is shared with the i2c and spi peripherals.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
index c57bf666162202e92d7f936019554ffd73651496..9513e461c4410fea8e55d8494bd03b06b5477e83 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
@@ -298,6 +298,46 @@
                        status = "disabled";
                };
 
+               CP110_LABEL(uart0): serial@702000 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x702000 0x100>;
+                       reg-shift = <2>;
+                       interrupts = <ICU_GRP_NSR 122 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-io-width = <1>;
+                       clocks = <&CP110_LABEL(clk) 1 21>;
+                       status = "disabled";
+               };
+
+               CP110_LABEL(uart1): serial@702100 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x702100 0x100>;
+                       reg-shift = <2>;
+                       interrupts = <ICU_GRP_NSR 123 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-io-width = <1>;
+                       clocks = <&CP110_LABEL(clk) 1 21>;
+                       status = "disabled";
+               };
+
+               CP110_LABEL(uart2): serial@702200 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x702200 0x100>;
+                       reg-shift = <2>;
+                       interrupts = <ICU_GRP_NSR 124 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-io-width = <1>;
+                       clocks = <&CP110_LABEL(clk) 1 21>;
+                       status = "disabled";
+               };
+
+               CP110_LABEL(uart3): serial@702300 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x702300 0x100>;
+                       reg-shift = <2>;
+                       interrupts = <ICU_GRP_NSR 125 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-io-width = <1>;
+                       clocks = <&CP110_LABEL(clk) 1 21>;
+                       status = "disabled";
+               };
+
                CP110_LABEL(nand): nand@720000 {
                        /*
                        * Due to the limitation of the pins available