MIPS: Avoid potential hazard on Context register
authorRalf Baechle <ralf@linux-mips.org>
Tue, 13 Oct 2009 21:23:28 +0000 (23:23 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 2 Nov 2009 11:00:07 +0000 (12:00 +0100)
set_saved_sp reads Context register. Avoid reading stale value from
earlier incomplete write.

Issue found and fixed for head.S by Chris Dearman <chris@mips.com>.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mmu_context.h
arch/mips/kernel/head.S

index ed331c2e48826c6a87cb0c9c1823d419b85264c8..6083db586500ba14e22f94acab819f40e13a158f 100644 (file)
@@ -16,6 +16,7 @@
 #include <linux/smp.h>
 #include <linux/slab.h>
 #include <asm/cacheflush.h>
+#include <asm/hazards.h>
 #include <asm/tlbflush.h>
 #ifdef CONFIG_MIPS_MT_SMTC
 #include <asm/mipsmtregs.h>
@@ -36,11 +37,13 @@ extern unsigned long pgd_current[];
 #ifdef CONFIG_32BIT
 #define TLBMISS_HANDLER_SETUP()                                                \
        write_c0_context((unsigned long) smp_processor_id() << 25);     \
+       back_to_back_c0_hazard();                                       \
        TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 #endif
 #ifdef CONFIG_64BIT
 #define TLBMISS_HANDLER_SETUP()                                                \
        write_c0_context((unsigned long) smp_processor_id() << 26);     \
+       back_to_back_c0_hazard();                                       \
        TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 #endif
 
index 531ce7b1612479305c05602def67bd7e100f7992..ea695d9605e99e1bda75ca3573722a9a3819973f 100644 (file)
@@ -191,6 +191,7 @@ NESTED(kernel_entry, 16, sp)                        # kernel entry point
        /* Set the SP after an empty pt_regs.  */
        PTR_LI          sp, _THREAD_SIZE - 32 - PT_SIZE
        PTR_ADDU        sp, $28
+       back_to_back_c0_hazard
        set_saved_sp    sp, t0, t1
        PTR_SUBU        sp, 4 * SZREG           # init stack pointer