drm/amdgpu/powerplay/smu7: enable mclk switching if monitors are synced

If DC has synced the displays, we can enable mclk switching to
save power.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 3c1084de5d59fe8ed36ab0aa98b14965139eeab9..34f95e0e3ea45a32a89fe55b343d5c49fdedeed7 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -2956,9 +2956,10 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
        if (hwmgr->display_config->num_display == 0)
                disable_mclk_switching = false;
        else
-               disable_mclk_switching = ((1 < hwmgr->display_config->num_display) ||
-                                         disable_mclk_switching_for_frame_lock ||
-                                         smu7_vblank_too_short(hwmgr, hwmgr->display_config->min_vblank_time));
+               disable_mclk_switching = ((1 < hwmgr->display_config->num_display) &&
+                                         !hwmgr->display_config->multi_monitor_in_sync) ||
+                       disable_mclk_switching_for_frame_lock ||
+                       smu7_vblank_too_short(hwmgr, hwmgr->display_config->min_vblank_time);
 
        sclk = smu7_ps->performance_levels[0].engine_clock;
        mclk = smu7_ps->performance_levels[0].memory_clock;