arm64: Handle erratum 1418040 as a superset of erratum 1188873

We already mitigate erratum 1188873 affecting Cortex-A76 and
Neoverse-N1 r0p0 to r2p0. It turns out that revisions r0p0 to
r3p1 of the same cores are affected by erratum 1418040, which
has the same workaround as 1188873.

Let's expand the range of affected revisions to match 1418040,
and repaint all occurences of 1188873 to 1418040. Whilst we're
there, do a bit of reformating in silicon-errata.txt and drop
a now unnecessary dependency on ARM_ARCH_TIMER_OOL_WORKAROUND.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt
index b29a32805ad0ffe528d0b35aa2062dbfa4d0d3f1..2735462d59588cba9a182a35f09c589994c730a6 100644 (file)
--- a/Documentation/arm64/silicon-errata.txt
+++ b/Documentation/arm64/silicon-errata.txt
@@ -58,14 +58,14 @@ stable kernels.
 | ARM            | Cortex-A72      | #853709         | N/A                         |
 | ARM            | Cortex-A73      | #858921         | ARM64_ERRATUM_858921        |
 | ARM            | Cortex-A55      | #1024718        | ARM64_ERRATUM_1024718       |
-| ARM            | Cortex-A76      | #1188873        | ARM64_ERRATUM_1188873       |
+| ARM            | Cortex-A76      | #1188873,1418040| ARM64_ERRATUM_1418040       |
 | ARM            | Cortex-A76      | #1165522        | ARM64_ERRATUM_1165522       |
 | ARM            | Cortex-A76      | #1286807        | ARM64_ERRATUM_1286807       |
-| ARM            | Neoverse-N1     | #1188873        | ARM64_ERRATUM_1188873       |
 | ARM            | Cortex-A76      | #1463225        | ARM64_ERRATUM_1463225       |
-| ARM            | MMU-500         | #841119,#826419 | N/A                         |
+| ARM            | Neoverse-N1     | #1188873,1418040| ARM64_ERRATUM_1418040       |
+| ARM            | MMU-500         | #841119,826419  | N/A                         |
 |                |                 |                 |                             |
-| Cavium         | ThunderX ITS    | #22375, #24313  | CAVIUM_ERRATUM_22375        |
+| Cavium         | ThunderX ITS    | #22375,24313    | CAVIUM_ERRATUM_22375        |
 | Cavium         | ThunderX ITS    | #23144          | CAVIUM_ERRATUM_23144        |
 | Cavium         | ThunderX GICv3  | #23154          | CAVIUM_ERRATUM_23154        |
 | Cavium         | ThunderX Core   | #27456          | CAVIUM_ERRATUM_27456        |

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 5d99f492869b80db7b9257ab439d1411ad853311..6a9544606da38bcf92f405fb9e41601de69ac218 100644 (file)
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -475,16 +475,15 @@ config ARM64_ERRATUM_1024718
 
          If unsure, say Y.
 
-config ARM64_ERRATUM_1188873
+config ARM64_ERRATUM_1418040
        bool "Cortex-A76/Neoverse-N1: MRC read following MRRC read of specific Generic Timer in AArch32 might give incorrect result"
        default y
        depends on COMPAT
-       select ARM_ARCH_TIMER_OOL_WORKAROUND
        help
          This option adds a workaround for ARM Cortex-A76/Neoverse-N1
-         erratum 1188873.
+         errata 1188873 and 1418040.
 
-         Affected Cortex-A76/Neoverse-N1 cores (r0p0, r1p0, r2p0) could
+         Affected Cortex-A76/Neoverse-N1 cores (r0p0 to r3p1) could
          cause register corruption when accessing the timer registers
          from AArch32 userspace.
 

diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
index 73faee64e498c1e0eb5abd6e702f37c967549f16..33401ebc187cf6fad738e18dc8f4035fe609bb7d 100644 (file)
--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -53,7 +53,7 @@
 #define ARM64_HAS_STAGE2_FWB                   32
 #define ARM64_HAS_CRC32                                33
 #define ARM64_SSBS                             34
-#define ARM64_WORKAROUND_1188873               35
+#define ARM64_WORKAROUND_1418040               35
 #define ARM64_HAS_SB                           36
 #define ARM64_WORKAROUND_1165522               37
 #define ARM64_HAS_ADDRESS_AUTH_ARCH            38

diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index ac6432bfc1e4f950d46f0cb3b91a7afabf24a3bc..d61beedba101025c65c12698d64cbdc32db78f48 100644 (file)
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -698,12 +698,16 @@ static const struct midr_range workaround_clean_cache[] = {
 };
 #endif
 
-#ifdef CONFIG_ARM64_ERRATUM_1188873
-static const struct midr_range erratum_1188873_list[] = {
-       /* Cortex-A76 r0p0 to r2p0 */
-       MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 2, 0),
-       /* Neoverse-N1 r0p0 to r2p0 */
-       MIDR_RANGE(MIDR_NEOVERSE_N1, 0, 0, 2, 0),
+#ifdef CONFIG_ARM64_ERRATUM_1418040
+/*
+ * - 1188873 affects r0p0 to r2p0
+ * - 1418040 affects r0p0 to r3p1
+ */
+static const struct midr_range erratum_1418040_list[] = {
+       /* Cortex-A76 r0p0 to r3p1 */
+       MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 1),
+       /* Neoverse-N1 r0p0 to r3p1 */
+       MIDR_RANGE(MIDR_NEOVERSE_N1, 0, 0, 3, 1),
        {},
 };
 #endif
@@ -825,11 +829,11 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
                .matches = has_ssbd_mitigation,
                .midr_range_list = arm64_ssb_cpus,
        },
-#ifdef CONFIG_ARM64_ERRATUM_1188873
+#ifdef CONFIG_ARM64_ERRATUM_1418040
        {
-               .desc = "ARM erratum 1188873",
-               .capability = ARM64_WORKAROUND_1188873,
-               ERRATA_MIDR_RANGE_LIST(erratum_1188873_list),
+               .desc = "ARM erratum 1418040",
+               .capability = ARM64_WORKAROUND_1418040,
+               ERRATA_MIDR_RANGE_LIST(erratum_1418040_list),
        },
 #endif
 #ifdef CONFIG_ARM64_ERRATUM_1165522

diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 1a7811b7e3c4611fc132d44996955e7632a6876a..cd0c7af8e4a83454e2a5c0d36d28fab4f8241afc 100644 (file)
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -336,8 +336,8 @@ alternative_if ARM64_WORKAROUND_845719
 alternative_else_nop_endif
 #endif
 3:
-#ifdef CONFIG_ARM64_ERRATUM_1188873
-alternative_if_not ARM64_WORKAROUND_1188873
+#ifdef CONFIG_ARM64_ERRATUM_1418040
+alternative_if_not ARM64_WORKAROUND_1418040
        b       4f
 alternative_else_nop_endif
        /*