drm/amdgpu: add new BIF 4.1 register for BACO
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 15 Feb 2019 19:40:26 +0000 (14:40 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Oct 2019 19:55:31 +0000 (15:55 -0400)
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_d.h
drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h

index a761ba07f937333f7207de92726ec6e25a1a7172..fce965984e760cf532abe70cf34c93a906386d39 100644 (file)
@@ -27,6 +27,7 @@
 #define mmMM_INDEX                                                              0x0
 #define mmMM_INDEX_HI                                                           0x6
 #define mmMM_DATA                                                               0x1
+#define mmCC_BIF_BX_FUSESTRAP0                                                 0x14D7
 #define mmBUS_CNTL                                                              0x1508
 #define mmCONFIG_CNTL                                                           0x1509
 #define mmCONFIG_MEMSIZE                                                        0x150a
index 8fbfd0261d276e667dad30291e986d6f917bc26f..39cc4880beb47e7c5349b457088c375f1e5fa4b9 100644 (file)
@@ -32,6 +32,8 @@
 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
 #define MM_DATA__MM_DATA_MASK 0xffffffff
 #define MM_DATA__MM_DATA__SHIFT 0x0
+#define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK    0x2
+#define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT  0x1
 #define BUS_CNTL__BIOS_ROM_WRT_EN_MASK 0x1
 #define BUS_CNTL__BIOS_ROM_WRT_EN__SHIFT 0x0
 #define BUS_CNTL__BIOS_ROM_DIS_MASK 0x2