drm/amdgpu/atomfirmware: simplify the interface to get vram info

fetch both the vram type and width in one function call.  This
avoids having to parse the same data table twice to get the two
pieces of data.

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index 9feccec2ea5d747fd3b9cfe0627c2fd322a4e070..19913c39588bdbb96056d339a9d4fc399c994271 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -169,9 +169,8 @@ static int convert_atom_mem_type_to_vram_type(struct amdgpu_device *adev,
        return vram_type;
 }
 
-static int
-amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
-                                 int *vram_width, int *vram_type)
+int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
+                                     int *vram_width, int *vram_type)
 {
        struct amdgpu_mode_info *mode_info = &adev->mode_info;
        int index, i = 0;
@@ -185,7 +184,6 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
        u32 mem_channel_width;
        u32 module_id;
 
-
        if (adev->flags & AMD_IS_APU)
                index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
                                                    integratedsysteminfo);
@@ -261,34 +259,6 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
        return 0;
 }
 
-/*
- * Return vram width from integrated system info table, if available,
- * or 0 if not.
- */
-int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev)
-{
-       int vram_width = 0, vram_type = 0;
-       int r = amdgpu_atomfirmware_get_vram_info(adev, &vram_width, &vram_type);
-       if (r)
-               return 0;
-
-       return vram_width;
-}
-
-/*
- * Return vram type from either integrated system info table
- * or umc info table, if available, or 0 (TYPE_UNKNOWN) if not
- */
-int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev)
-{
-       int vram_width = 0, vram_type = 0;
-       int r = amdgpu_atomfirmware_get_vram_info(adev, &vram_width, &vram_type);
-       if (r)
-               return 0;
-
-       return vram_type;
-}
-
 /*
  * Return true if vbios enabled ecc by default, if umc info table is available
  * or false if ecc is not enabled or umc info table is not available

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
index 5ec6f92f353cbf8da8e4b6f7130d6c9aaa4d7c9a..82819f03e4441477a87f9eea47b34c069aabc5f2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
@@ -29,8 +29,8 @@
 bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev);
 void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
 int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
-int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev);
-int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev);
+int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
+                                     int *vram_width, int *vram_type);
 int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
 int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);
 bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 0a11d78d1fb286c1f4d4bc41b5c34c2184f67735..cb3f61873baaab3248233300dfe356feb5f41e29 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -539,17 +539,6 @@ static void gmc_v10_0_vram_gtt_location(struct amdgpu_device *adev,
  */
 static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
 {
-       int chansize, numchan;
-
-       if (!amdgpu_emu_mode)
-               adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
-       else {
-               /* hard code vram_width for emulation */
-               chansize = 128;
-               numchan = 1;
-               adev->gmc.vram_width = numchan * chansize;
-       }
-
        /* Could aper size report 0 ? */
        adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
        adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
@@ -635,7 +624,7 @@ static unsigned gmc_v10_0_get_vbios_fb_size(struct amdgpu_device *adev)
 
 static int gmc_v10_0_sw_init(void *handle)
 {
-       int r;
+       int r, vram_width = 0, vram_type = 0;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        gfxhub_v2_0_init(adev);
@@ -643,7 +632,13 @@ static int gmc_v10_0_sw_init(void *handle)
 
        spin_lock_init(&adev->gmc.invalidate_lock);
 
-       adev->gmc.vram_type = amdgpu_atomfirmware_get_vram_type(adev);
+       r = amdgpu_atomfirmware_get_vram_info(adev, &vram_width, &vram_type);
+       if (!amdgpu_emu_mode)
+               adev->gmc.vram_width = vram_width;
+       else
+               adev->gmc.vram_width = 1 * 128; /* numchan * chansize */
+
+       adev->gmc.vram_type = vram_type;
        switch (adev->asic_type) {
        case CHIP_NAVI10:
        case CHIP_NAVI14:

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 6102deaa03cafef346a5dada69ec5ae29e9885cb..b4451a58743c1b5cda68955d2655ce8066297869 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -895,30 +895,8 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
  */
 static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
 {
-       int chansize, numchan;
        int r;
 
-       if (amdgpu_sriov_vf(adev)) {
-               /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
-                * and DF related registers is not readable, seems hardcord is the
-                * only way to set the correct vram_width
-                */
-               adev->gmc.vram_width = 2048;
-       } else if (amdgpu_emu_mode != 1) {
-               adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
-       }
-
-       if (!adev->gmc.vram_width) {
-               /* hbm memory channel size */
-               if (adev->flags & AMD_IS_APU)
-                       chansize = 64;
-               else
-                       chansize = 128;
-
-               numchan = adev->df_funcs->get_hbm_channel_number(adev);
-               adev->gmc.vram_width = numchan * chansize;
-       }
-
        /* size in MB on si */
        adev->gmc.mc_vram_size =
                adev->nbio.funcs->get_memsize(adev) * 1024ULL * 1024ULL;
@@ -1033,7 +1011,7 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
 
 static int gmc_v9_0_sw_init(void *handle)
 {
-       int r;
+       int r, vram_width = 0, vram_type = 0;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        gfxhub_v1_0_init(adev);
@@ -1044,7 +1022,30 @@ static int gmc_v9_0_sw_init(void *handle)
 
        spin_lock_init(&adev->gmc.invalidate_lock);
 
-       adev->gmc.vram_type = amdgpu_atomfirmware_get_vram_type(adev);
+       r = amdgpu_atomfirmware_get_vram_info(adev, &vram_width, &vram_type);
+       if (amdgpu_sriov_vf(adev))
+               /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
+                * and DF related registers is not readable, seems hardcord is the
+                * only way to set the correct vram_width
+                */
+               adev->gmc.vram_width = 2048;
+       else if (amdgpu_emu_mode != 1)
+               adev->gmc.vram_width = vram_width;
+
+       if (!adev->gmc.vram_width) {
+               int chansize, numchan;
+
+               /* hbm memory channel size */
+               if (adev->flags & AMD_IS_APU)
+                       chansize = 64;
+               else
+                       chansize = 128;
+
+               numchan = adev->df_funcs->get_hbm_channel_number(adev);
+               adev->gmc.vram_width = numchan * chansize;
+       }
+
+       adev->gmc.vram_type = vram_type;
        switch (adev->asic_type) {
        case CHIP_RAVEN:
                adev->num_vmhubs = 2;