pinctrl: sh-pfc: r8a77965: Add PWM pins, groups and functions
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Fri, 23 Mar 2018 11:31:46 +0000 (20:31 +0900)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 16 May 2018 11:31:31 +0000 (13:31 +0200)
This patch adds PWM{0,1,2,3,4,5,6} pins, groups and functions to
R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/sh-pfc/pfc-r8a77965.c

index 54461ebd5db19dc6eac5a6db1737b59ca4ab7060..3771b2d10f39a0a72fb6993b0e4c1d78d59fde0d 100644 (file)
@@ -2404,6 +2404,105 @@ static const unsigned int msiof3_rxd_e_mux[] = {
        MSIOF3_RXD_E_MARK,
 };
 
+/* - PWM0 --------------------------------------------------------------------*/
+static const unsigned int pwm0_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 6),
+};
+static const unsigned int pwm0_mux[] = {
+       PWM0_MARK,
+};
+/* - PWM1 --------------------------------------------------------------------*/
+static const unsigned int pwm1_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 7),
+};
+static const unsigned int pwm1_a_mux[] = {
+       PWM1_A_MARK,
+};
+static const unsigned int pwm1_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 8),
+};
+static const unsigned int pwm1_b_mux[] = {
+       PWM1_B_MARK,
+};
+/* - PWM2 --------------------------------------------------------------------*/
+static const unsigned int pwm2_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 8),
+};
+static const unsigned int pwm2_a_mux[] = {
+       PWM2_A_MARK,
+};
+static const unsigned int pwm2_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 11),
+};
+static const unsigned int pwm2_b_mux[] = {
+       PWM2_B_MARK,
+};
+/* - PWM3 --------------------------------------------------------------------*/
+static const unsigned int pwm3_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 0),
+};
+static const unsigned int pwm3_a_mux[] = {
+       PWM3_A_MARK,
+};
+static const unsigned int pwm3_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 2),
+};
+static const unsigned int pwm3_b_mux[] = {
+       PWM3_B_MARK,
+};
+/* - PWM4 --------------------------------------------------------------------*/
+static const unsigned int pwm4_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 1),
+};
+static const unsigned int pwm4_a_mux[] = {
+       PWM4_A_MARK,
+};
+static const unsigned int pwm4_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 3),
+};
+static const unsigned int pwm4_b_mux[] = {
+       PWM4_B_MARK,
+};
+/* - PWM5 --------------------------------------------------------------------*/
+static const unsigned int pwm5_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 2),
+};
+static const unsigned int pwm5_a_mux[] = {
+       PWM5_A_MARK,
+};
+static const unsigned int pwm5_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 4),
+};
+static const unsigned int pwm5_b_mux[] = {
+       PWM5_B_MARK,
+};
+/* - PWM6 --------------------------------------------------------------------*/
+static const unsigned int pwm6_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 3),
+};
+static const unsigned int pwm6_a_mux[] = {
+       PWM6_A_MARK,
+};
+static const unsigned int pwm6_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 5),
+};
+static const unsigned int pwm6_b_mux[] = {
+       PWM6_B_MARK,
+};
+
 /* - SCIF0 ------------------------------------------------------------------ */
 static const unsigned int scif0_data_pins[] = {
        /* RX, TX */
@@ -2762,6 +2861,19 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(msiof3_ss2_e),
        SH_PFC_PIN_GROUP(msiof3_txd_e),
        SH_PFC_PIN_GROUP(msiof3_rxd_e),
+       SH_PFC_PIN_GROUP(pwm0),
+       SH_PFC_PIN_GROUP(pwm1_a),
+       SH_PFC_PIN_GROUP(pwm1_b),
+       SH_PFC_PIN_GROUP(pwm2_a),
+       SH_PFC_PIN_GROUP(pwm2_b),
+       SH_PFC_PIN_GROUP(pwm3_a),
+       SH_PFC_PIN_GROUP(pwm3_b),
+       SH_PFC_PIN_GROUP(pwm4_a),
+       SH_PFC_PIN_GROUP(pwm4_b),
+       SH_PFC_PIN_GROUP(pwm5_a),
+       SH_PFC_PIN_GROUP(pwm5_b),
+       SH_PFC_PIN_GROUP(pwm6_a),
+       SH_PFC_PIN_GROUP(pwm6_b),
        SH_PFC_PIN_GROUP(scif0_data),
        SH_PFC_PIN_GROUP(scif0_clk),
        SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -2930,6 +3042,40 @@ static const char * const msiof3_groups[] = {
        "msiof3_rxd_e",
 };
 
+static const char * const pwm0_groups[] = {
+       "pwm0",
+};
+
+static const char * const pwm1_groups[] = {
+       "pwm1_a",
+       "pwm1_b",
+};
+
+static const char * const pwm2_groups[] = {
+       "pwm2_a",
+       "pwm2_b",
+};
+
+static const char * const pwm3_groups[] = {
+       "pwm3_a",
+       "pwm3_b",
+};
+
+static const char * const pwm4_groups[] = {
+       "pwm4_a",
+       "pwm4_b",
+};
+
+static const char * const pwm5_groups[] = {
+       "pwm5_a",
+       "pwm5_b",
+};
+
+static const char * const pwm6_groups[] = {
+       "pwm6_a",
+       "pwm6_b",
+};
+
 static const char * const scif0_groups[] = {
        "scif0_data",
        "scif0_clk",
@@ -2998,6 +3144,13 @@ static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(msiof1),
        SH_PFC_FUNCTION(msiof2),
        SH_PFC_FUNCTION(msiof3),
+       SH_PFC_FUNCTION(pwm0),
+       SH_PFC_FUNCTION(pwm1),
+       SH_PFC_FUNCTION(pwm2),
+       SH_PFC_FUNCTION(pwm3),
+       SH_PFC_FUNCTION(pwm4),
+       SH_PFC_FUNCTION(pwm5),
+       SH_PFC_FUNCTION(pwm6),
        SH_PFC_FUNCTION(scif0),
        SH_PFC_FUNCTION(scif1),
        SH_PFC_FUNCTION(scif2),