arm64: dts: renesas: r8a77990-ebisu: Add BD9571 PMIC

This patch adds the regulator definition required for operation of
S2RAM.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
index fb50f4fa8b9d71dd4a95fbc903c8e5cc87431fdf..18a99d2e1ea5a648208c54bf02e522ef93674107 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
@@ -449,6 +449,26 @@
        };
 };
 
+&i2c_dvfs {
+       status = "okay";
+
+       clock-frequency = <400000>;
+
+       pmic: pmic@30 {
+               pinctrl-0 = <&irq0_pins>;
+               pinctrl-names = "default";
+
+               compatible = "rohm,bd9571mwv";
+               reg = <0x30>;
+               interrupt-parent = <&intc_ex>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+};
+
 &lvds0 {
        status = "okay";
 
@@ -511,6 +531,11 @@
                function = "du";
        };
 
+       irq0_pins: irq0 {
+               groups = "intc_ex_irq0";
+               function = "intc_ex";
+       };
+
        pwm3_pins: pwm3 {
                groups = "pwm3_b";
                function = "pwm3";