KVM: arm/arm64: vgic: Reevaluate level sensitive interrupts on enable
authorAlexandru Elisei <alexandru.elisei@arm.com>
Wed, 7 Aug 2019 09:53:20 +0000 (10:53 +0100)
committerMarc Zyngier <maz@kernel.org>
Fri, 9 Aug 2019 07:07:26 +0000 (08:07 +0100)
A HW mapped level sensitive interrupt asserted by a device will not be put
into the ap_list if it is disabled at the VGIC level. When it is enabled
again, it will be inserted into the ap_list and written to a list register
on guest entry regardless of the state of the device.

We could argue that this can also happen on real hardware, when the command
to enable the interrupt reached the GIC before the device had the chance to
de-assert the interrupt signal; however, we emulate the distributor and
redistributors in software and we can do better than that.

Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
virt/kvm/arm/vgic/vgic-mmio.c

index 3ba7278fb533be5acdba3c339358039eb6b472e0..44efc2ff863f4b903075d55476e4374862c619dd 100644 (file)
@@ -113,6 +113,22 @@ void vgic_mmio_write_senable(struct kvm_vcpu *vcpu,
                struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
 
                raw_spin_lock_irqsave(&irq->irq_lock, flags);
+               if (vgic_irq_is_mapped_level(irq)) {
+                       bool was_high = irq->line_level;
+
+                       /*
+                        * We need to update the state of the interrupt because
+                        * the guest might have changed the state of the device
+                        * while the interrupt was disabled at the VGIC level.
+                        */
+                       irq->line_level = vgic_get_phys_line_level(irq);
+                       /*
+                        * Deactivate the physical interrupt so the GIC will let
+                        * us know when it is asserted again.
+                        */
+                       if (!irq->active && was_high && !irq->line_level)
+                               vgic_irq_set_phys_active(irq, false);
+               }
                irq->enabled = true;
                vgic_queue_irq_unlock(vcpu->kvm, irq, flags);