sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include "hda_codec.h"
  43 #include "hda_local.h"
  44 #include "hda_jack.h"
  45
  46 static bool static_hdmi_pcm;
  47 module_param(static_hdmi_pcm, bool, 0644);
  48 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  49
  50 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  51 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  52 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  53 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  54 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  55 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  56                                 || is_skylake(codec) || is_broxton(codec) \
  57                                 || is_kabylake(codec))
  58
  59 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  60 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  61 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  62
  63 struct hdmi_spec_per_cvt {
  64         hda_nid_t cvt_nid;
  65         int assigned;
  66         unsigned int channels_min;
  67         unsigned int channels_max;
  68         u32 rates;
  69         u64 formats;
  70         unsigned int maxbps;
  71 };
  72
  73 /* max. connections to a widget */
  74 #define HDA_MAX_CONNECTIONS     32
  75
  76 struct hdmi_spec_per_pin {
  77         hda_nid_t pin_nid;
  78         int num_mux_nids;
  79         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  80         int mux_idx;
  81         hda_nid_t cvt_nid;
  82
  83         struct hda_codec *codec;
  84         struct hdmi_eld sink_eld;
  85         struct mutex lock;
  86         struct delayed_work work;
  87         struct snd_kcontrol *eld_ctl;
  88         struct snd_jack *acomp_jack; /* jack via audio component */
  89         int repoll_count;
  90         bool setup; /* the stream has been set up by prepare callback */
  91         int channels; /* current number of channels */
  92         bool non_pcm;
  93         bool chmap_set;         /* channel-map override by ALSA API? */
  94         unsigned char chmap[8]; /* ALSA API channel-map */
  95 #ifdef CONFIG_SND_PROC_FS
  96         struct snd_info_entry *proc_entry;
  97 #endif
  98 };
  99
 100 struct cea_channel_speaker_allocation;
 101
 102 /* operations used by generic code that can be overridden by patches */
 103 struct hdmi_ops {
 104         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 105                            unsigned char *buf, int *eld_size);
 106
 107         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
 108         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 109                                     int asp_slot);
 110         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 111                                     int asp_slot, int channel);
 112
 113         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 114                                     int ca, int active_channels, int conn_type);
 115
 116         /* enable/disable HBR (HD passthrough) */
 117         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 118
 119         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 120                             hda_nid_t pin_nid, u32 stream_tag, int format);
 121
 122         /* Helpers for producing the channel map TLVs. These can be overridden
 123          * for devices that have non-standard mapping requirements. */
 124         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 125                                                  int channels);
 126         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 127                                        unsigned int *chmap, int channels);
 128
 129         /* check that the user-given chmap is supported */
 130         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 131 };
 132
 133 struct hdmi_spec {
 134         int num_cvts;
 135         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 136         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 137
 138         int num_pins;
 139         struct snd_array pins; /* struct hdmi_spec_per_pin */
 140         struct hda_pcm *pcm_rec[16];
 141         unsigned int channels_max; /* max over all cvts */
 142
 143         struct hdmi_eld temp_eld;
 144         struct hdmi_ops ops;
 145
 146         bool dyn_pin_out;
 147
 148         /*
 149          * Non-generic VIA/NVIDIA specific
 150          */
 151         struct hda_multi_out multiout;
 152         struct hda_pcm_stream pcm_playback;
 153
 154         /* i915/powerwell (Haswell+/Valleyview+) specific */
 155         struct i915_audio_component_audio_ops i915_audio_ops;
 156         bool i915_bound; /* was i915 bound in this driver? */
 157 };
 158
 159 #ifdef CONFIG_SND_HDA_I915
 160 #define codec_has_acomp(codec) \
 161         ((codec)->bus->core.audio_component != NULL)
 162 #else
 163 #define codec_has_acomp(codec)  false
 164 #endif
 165
 166 struct hdmi_audio_infoframe {
 167         u8 type; /* 0x84 */
 168         u8 ver;  /* 0x01 */
 169         u8 len;  /* 0x0a */
 170
 171         u8 checksum;
 172
 173         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 174         u8 SS01_SF24;
 175         u8 CXT04;
 176         u8 CA;
 177         u8 LFEPBL01_LSV36_DM_INH7;
 178 };
 179
 180 struct dp_audio_infoframe {
 181         u8 type; /* 0x84 */
 182         u8 len;  /* 0x1b */
 183         u8 ver;  /* 0x11 << 2 */
 184
 185         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 186         u8 SS01_SF24;
 187         u8 CXT04;
 188         u8 CA;
 189         u8 LFEPBL01_LSV36_DM_INH7;
 190 };
 191
 192 union audio_infoframe {
 193         struct hdmi_audio_infoframe hdmi;
 194         struct dp_audio_infoframe dp;
 195         u8 bytes[0];
 196 };
 197
 198 /*
 199  * CEA speaker placement:
 200  *
 201  *        FLH       FCH        FRH
 202  *  FLW    FL  FLC   FC   FRC   FR   FRW
 203  *
 204  *                                  LFE
 205  *                     TC
 206  *
 207  *          RL  RLC   RC   RRC   RR
 208  *
 209  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 210  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 211  */
 212 enum cea_speaker_placement {
 213         FL  = (1 <<  0),        /* Front Left           */
 214         FC  = (1 <<  1),        /* Front Center         */
 215         FR  = (1 <<  2),        /* Front Right          */
 216         FLC = (1 <<  3),        /* Front Left Center    */
 217         FRC = (1 <<  4),        /* Front Right Center   */
 218         RL  = (1 <<  5),        /* Rear Left            */
 219         RC  = (1 <<  6),        /* Rear Center          */
 220         RR  = (1 <<  7),        /* Rear Right           */
 221         RLC = (1 <<  8),        /* Rear Left Center     */
 222         RRC = (1 <<  9),        /* Rear Right Center    */
 223         LFE = (1 << 10),        /* Low Frequency Effect */
 224         FLW = (1 << 11),        /* Front Left Wide      */
 225         FRW = (1 << 12),        /* Front Right Wide     */
 226         FLH = (1 << 13),        /* Front Left High      */
 227         FCH = (1 << 14),        /* Front Center High    */
 228         FRH = (1 << 15),        /* Front Right High     */
 229         TC  = (1 << 16),        /* Top Center           */
 230 };
 231
 232 /*
 233  * ELD SA bits in the CEA Speaker Allocation data block
 234  */
 235 static int eld_speaker_allocation_bits[] = {
 236         [0] = FL | FR,
 237         [1] = LFE,
 238         [2] = FC,
 239         [3] = RL | RR,
 240         [4] = RC,
 241         [5] = FLC | FRC,
 242         [6] = RLC | RRC,
 243         /* the following are not defined in ELD yet */
 244         [7] = FLW | FRW,
 245         [8] = FLH | FRH,
 246         [9] = TC,
 247         [10] = FCH,
 248 };
 249
 250 struct cea_channel_speaker_allocation {
 251         int ca_index;
 252         int speakers[8];
 253
 254         /* derived values, just for convenience */
 255         int channels;
 256         int spk_mask;
 257 };
 258
 259 /*
 260  * ALSA sequence is:
 261  *
 262  *       surround40   surround41   surround50   surround51   surround71
 263  * ch0   front left   =            =            =            =
 264  * ch1   front right  =            =            =            =
 265  * ch2   rear left    =            =            =            =
 266  * ch3   rear right   =            =            =            =
 267  * ch4                LFE          center       center       center
 268  * ch5                                          LFE          LFE
 269  * ch6                                                       side left
 270  * ch7                                                       side right
 271  *
 272  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 273  */
 274 static int hdmi_channel_mapping[0x32][8] = {
 275         /* stereo */
 276         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 277         /* 2.1 */
 278         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 279         /* Dolby Surround */
 280         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 281         /* surround40 */
 282         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 283         /* 4ch */
 284         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 285         /* surround41 */
 286         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 287         /* surround50 */
 288         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 289         /* surround51 */
 290         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 291         /* 7.1 */
 292         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 293 };
 294
 295 /*
 296  * This is an ordered list!
 297  *
 298  * The preceding ones have better chances to be selected by
 299  * hdmi_channel_allocation().
 300  */
 301 static struct cea_channel_speaker_allocation channel_allocations[] = {
 302 /*                        channel:   7     6    5    4    3     2    1    0  */
 303 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 304                                  /* 2.1 */
 305 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 306                                  /* Dolby Surround */
 307 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 308                                  /* surround40 */
 309 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 310                                  /* surround41 */
 311 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 312                                  /* surround50 */
 313 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 314                                  /* surround51 */
 315 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 316                                  /* 6.1 */
 317 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 318                                  /* surround71 */
 319 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 320
 321 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 322 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 323 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 324 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 325 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 326 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 327 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 328 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 329 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 330 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 331 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 332 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 333 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 334 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 335 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 336 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 337 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 338 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 339 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 340 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 341 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 342 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 343 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 344 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 345 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 346 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 347 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 348 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 349 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 350 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 351 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 352 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 353 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 354 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 355 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 356 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 357 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 358 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 359 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 360 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 361 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 362 };
 363
 364
 365 /*
 366  * HDMI routines
 367  */
 368
 369 #define get_pin(spec, idx) \
 370         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 371 #define get_cvt(spec, idx) \
 372         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 373 #define get_pcm_rec(spec, idx)  ((spec)->pcm_rec[idx])
 374
 375 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 376 {
 377         struct hdmi_spec *spec = codec->spec;
 378         int pin_idx;
 379
 380         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 381                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 382                         return pin_idx;
 383
 384         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 385         return -EINVAL;
 386 }
 387
 388 static int hinfo_to_pin_index(struct hda_codec *codec,
 389                               struct hda_pcm_stream *hinfo)
 390 {
 391         struct hdmi_spec *spec = codec->spec;
 392         int pin_idx;
 393
 394         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 395                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
 396                         return pin_idx;
 397
 398         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 399         return -EINVAL;
 400 }
 401
 402 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 403 {
 404         struct hdmi_spec *spec = codec->spec;
 405         int cvt_idx;
 406
 407         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 408                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 409                         return cvt_idx;
 410
 411         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 412         return -EINVAL;
 413 }
 414
 415 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 416                         struct snd_ctl_elem_info *uinfo)
 417 {
 418         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 419         struct hdmi_spec *spec = codec->spec;
 420         struct hdmi_spec_per_pin *per_pin;
 421         struct hdmi_eld *eld;
 422         int pin_idx;
 423
 424         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 425
 426         pin_idx = kcontrol->private_value;
 427         per_pin = get_pin(spec, pin_idx);
 428         eld = &per_pin->sink_eld;
 429
 430         mutex_lock(&per_pin->lock);
 431         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 432         mutex_unlock(&per_pin->lock);
 433
 434         return 0;
 435 }
 436
 437 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 438                         struct snd_ctl_elem_value *ucontrol)
 439 {
 440         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 441         struct hdmi_spec *spec = codec->spec;
 442         struct hdmi_spec_per_pin *per_pin;
 443         struct hdmi_eld *eld;
 444         int pin_idx;
 445
 446         pin_idx = kcontrol->private_value;
 447         per_pin = get_pin(spec, pin_idx);
 448         eld = &per_pin->sink_eld;
 449
 450         mutex_lock(&per_pin->lock);
 451         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 452                 mutex_unlock(&per_pin->lock);
 453                 snd_BUG();
 454                 return -EINVAL;
 455         }
 456
 457         memset(ucontrol->value.bytes.data, 0,
 458                ARRAY_SIZE(ucontrol->value.bytes.data));
 459         if (eld->eld_valid)
 460                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 461                        eld->eld_size);
 462         mutex_unlock(&per_pin->lock);
 463
 464         return 0;
 465 }
 466
 467 static struct snd_kcontrol_new eld_bytes_ctl = {
 468         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 469         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 470         .name = "ELD",
 471         .info = hdmi_eld_ctl_info,
 472         .get = hdmi_eld_ctl_get,
 473 };
 474
 475 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 476                         int device)
 477 {
 478         struct snd_kcontrol *kctl;
 479         struct hdmi_spec *spec = codec->spec;
 480         int err;
 481
 482         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 483         if (!kctl)
 484                 return -ENOMEM;
 485         kctl->private_value = pin_idx;
 486         kctl->id.device = device;
 487
 488         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 489         if (err < 0)
 490                 return err;
 491
 492         get_pin(spec, pin_idx)->eld_ctl = kctl;
 493         return 0;
 494 }
 495
 496 #ifdef BE_PARANOID
 497 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 498                                 int *packet_index, int *byte_index)
 499 {
 500         int val;
 501
 502         val = snd_hda_codec_read(codec, pin_nid, 0,
 503                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 504
 505         *packet_index = val >> 5;
 506         *byte_index = val & 0x1f;
 507 }
 508 #endif
 509
 510 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 511                                 int packet_index, int byte_index)
 512 {
 513         int val;
 514
 515         val = (packet_index << 5) | (byte_index & 0x1f);
 516
 517         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 518 }
 519
 520 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 521                                 unsigned char val)
 522 {
 523         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 524 }
 525
 526 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 527 {
 528         struct hdmi_spec *spec = codec->spec;
 529         int pin_out;
 530
 531         /* Unmute */
 532         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 533                 snd_hda_codec_write(codec, pin_nid, 0,
 534                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 535
 536         if (spec->dyn_pin_out)
 537                 /* Disable pin out until stream is active */
 538                 pin_out = 0;
 539         else
 540                 /* Enable pin out: some machines with GM965 gets broken output
 541                  * when the pin is disabled or changed while using with HDMI
 542                  */
 543                 pin_out = PIN_OUT;
 544
 545         snd_hda_codec_write(codec, pin_nid, 0,
 546                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 547 }
 548
 549 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 550 {
 551         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 552                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 553 }
 554
 555 static void hdmi_set_channel_count(struct hda_codec *codec,
 556                                    hda_nid_t cvt_nid, int chs)
 557 {
 558         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 559                 snd_hda_codec_write(codec, cvt_nid, 0,
 560                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 561 }
 562
 563 /*
 564  * ELD proc files
 565  */
 566
 567 #ifdef CONFIG_SND_PROC_FS
 568 static void print_eld_info(struct snd_info_entry *entry,
 569                            struct snd_info_buffer *buffer)
 570 {
 571         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 572
 573         mutex_lock(&per_pin->lock);
 574         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 575         mutex_unlock(&per_pin->lock);
 576 }
 577
 578 static void write_eld_info(struct snd_info_entry *entry,
 579                            struct snd_info_buffer *buffer)
 580 {
 581         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 582
 583         mutex_lock(&per_pin->lock);
 584         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 585         mutex_unlock(&per_pin->lock);
 586 }
 587
 588 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 589 {
 590         char name[32];
 591         struct hda_codec *codec = per_pin->codec;
 592         struct snd_info_entry *entry;
 593         int err;
 594
 595         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 596         err = snd_card_proc_new(codec->card, name, &entry);
 597         if (err < 0)
 598                 return err;
 599
 600         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 601         entry->c.text.write = write_eld_info;
 602         entry->mode |= S_IWUSR;
 603         per_pin->proc_entry = entry;
 604
 605         return 0;
 606 }
 607
 608 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 609 {
 610         if (!per_pin->codec->bus->shutdown) {
 611                 snd_info_free_entry(per_pin->proc_entry);
 612                 per_pin->proc_entry = NULL;
 613         }
 614 }
 615 #else
 616 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 617                                int index)
 618 {
 619         return 0;
 620 }
 621 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 622 {
 623 }
 624 #endif
 625
 626 /*
 627  * Channel mapping routines
 628  */
 629
 630 /*
 631  * Compute derived values in channel_allocations[].
 632  */
 633 static void init_channel_allocations(void)
 634 {
 635         int i, j;
 636         struct cea_channel_speaker_allocation *p;
 637
 638         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 639                 p = channel_allocations + i;
 640                 p->channels = 0;
 641                 p->spk_mask = 0;
 642                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 643                         if (p->speakers[j]) {
 644                                 p->channels++;
 645                                 p->spk_mask |= p->speakers[j];
 646                         }
 647         }
 648 }
 649
 650 static int get_channel_allocation_order(int ca)
 651 {
 652         int i;
 653
 654         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 655                 if (channel_allocations[i].ca_index == ca)
 656                         break;
 657         }
 658         return i;
 659 }
 660
 661 /*
 662  * The transformation takes two steps:
 663  *
 664  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 665  *            spk_mask => (channel_allocations[])         => ai->CA
 666  *
 667  * TODO: it could select the wrong CA from multiple candidates.
 668 */
 669 static int hdmi_channel_allocation(struct hda_codec *codec,
 670                                    struct hdmi_eld *eld, int channels)
 671 {
 672         int i;
 673         int ca = 0;
 674         int spk_mask = 0;
 675         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 676
 677         /*
 678          * CA defaults to 0 for basic stereo audio
 679          */
 680         if (channels <= 2)
 681                 return 0;
 682
 683         /*
 684          * expand ELD's speaker allocation mask
 685          *
 686          * ELD tells the speaker mask in a compact(paired) form,
 687          * expand ELD's notions to match the ones used by Audio InfoFrame.
 688          */
 689         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 690                 if (eld->info.spk_alloc & (1 << i))
 691                         spk_mask |= eld_speaker_allocation_bits[i];
 692         }
 693
 694         /* search for the first working match in the CA table */
 695         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 696                 if (channels == channel_allocations[i].channels &&
 697                     (spk_mask & channel_allocations[i].spk_mask) ==
 698                                 channel_allocations[i].spk_mask) {
 699                         ca = channel_allocations[i].ca_index;
 700                         break;
 701                 }
 702         }
 703
 704         if (!ca) {
 705                 /* if there was no match, select the regular ALSA channel
 706                  * allocation with the matching number of channels */
 707                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 708                         if (channels == channel_allocations[i].channels) {
 709                                 ca = channel_allocations[i].ca_index;
 710                                 break;
 711                         }
 712                 }
 713         }
 714
 715         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 716         codec_dbg(codec, "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 717                     ca, channels, buf);
 718
 719         return ca;
 720 }
 721
 722 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 723                                        hda_nid_t pin_nid)
 724 {
 725 #ifdef CONFIG_SND_DEBUG_VERBOSE
 726         struct hdmi_spec *spec = codec->spec;
 727         int i;
 728         int channel;
 729
 730         for (i = 0; i < 8; i++) {
 731                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 732                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
 733                                                 channel, i);
 734         }
 735 #endif
 736 }
 737
 738 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 739                                        hda_nid_t pin_nid,
 740                                        bool non_pcm,
 741                                        int ca)
 742 {
 743         struct hdmi_spec *spec = codec->spec;
 744         struct cea_channel_speaker_allocation *ch_alloc;
 745         int i;
 746         int err;
 747         int order;
 748         int non_pcm_mapping[8];
 749
 750         order = get_channel_allocation_order(ca);
 751         ch_alloc = &channel_allocations[order];
 752
 753         if (hdmi_channel_mapping[ca][1] == 0) {
 754                 int hdmi_slot = 0;
 755                 /* fill actual channel mappings in ALSA channel (i) order */
 756                 for (i = 0; i < ch_alloc->channels; i++) {
 757                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 758                                 hdmi_slot++; /* skip zero slots */
 759
 760                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 761                 }
 762                 /* fill the rest of the slots with ALSA channel 0xf */
 763                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 764                         if (!ch_alloc->speakers[7 - hdmi_slot])
 765                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 766         }
 767
 768         if (non_pcm) {
 769                 for (i = 0; i < ch_alloc->channels; i++)
 770                         non_pcm_mapping[i] = (i << 4) | i;
 771                 for (; i < 8; i++)
 772                         non_pcm_mapping[i] = (0xf << 4) | i;
 773         }
 774
 775         for (i = 0; i < 8; i++) {
 776                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 777                 int hdmi_slot = slotsetup & 0x0f;
 778                 int channel = (slotsetup & 0xf0) >> 4;
 779                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 780                 if (err) {
 781                         codec_dbg(codec, "HDMI: channel mapping failed\n");
 782                         break;
 783                 }
 784         }
 785 }
 786
 787 struct channel_map_table {
 788         unsigned char map;              /* ALSA API channel map position */
 789         int spk_mask;                   /* speaker position bit mask */
 790 };
 791
 792 static struct channel_map_table map_tables[] = {
 793         { SNDRV_CHMAP_FL,       FL },
 794         { SNDRV_CHMAP_FR,       FR },
 795         { SNDRV_CHMAP_RL,       RL },
 796         { SNDRV_CHMAP_RR,       RR },
 797         { SNDRV_CHMAP_LFE,      LFE },
 798         { SNDRV_CHMAP_FC,       FC },
 799         { SNDRV_CHMAP_RLC,      RLC },
 800         { SNDRV_CHMAP_RRC,      RRC },
 801         { SNDRV_CHMAP_RC,       RC },
 802         { SNDRV_CHMAP_FLC,      FLC },
 803         { SNDRV_CHMAP_FRC,      FRC },
 804         { SNDRV_CHMAP_TFL,      FLH },
 805         { SNDRV_CHMAP_TFR,      FRH },
 806         { SNDRV_CHMAP_FLW,      FLW },
 807         { SNDRV_CHMAP_FRW,      FRW },
 808         { SNDRV_CHMAP_TC,       TC },
 809         { SNDRV_CHMAP_TFC,      FCH },
 810         {} /* terminator */
 811 };
 812
 813 /* from ALSA API channel position to speaker bit mask */
 814 static int to_spk_mask(unsigned char c)
 815 {
 816         struct channel_map_table *t = map_tables;
 817         for (; t->map; t++) {
 818                 if (t->map == c)
 819                         return t->spk_mask;
 820         }
 821         return 0;
 822 }
 823
 824 /* from ALSA API channel position to CEA slot */
 825 static int to_cea_slot(int ordered_ca, unsigned char pos)
 826 {
 827         int mask = to_spk_mask(pos);
 828         int i;
 829
 830         if (mask) {
 831                 for (i = 0; i < 8; i++) {
 832                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 833                                 return i;
 834                 }
 835         }
 836
 837         return -1;
 838 }
 839
 840 /* from speaker bit mask to ALSA API channel position */
 841 static int spk_to_chmap(int spk)
 842 {
 843         struct channel_map_table *t = map_tables;
 844         for (; t->map; t++) {
 845                 if (t->spk_mask == spk)
 846                         return t->map;
 847         }
 848         return 0;
 849 }
 850
 851 /* from CEA slot to ALSA API channel position */
 852 static int from_cea_slot(int ordered_ca, unsigned char slot)
 853 {
 854         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 855
 856         return spk_to_chmap(mask);
 857 }
 858
 859 /* get the CA index corresponding to the given ALSA API channel map */
 860 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 861 {
 862         int i, spks = 0, spk_mask = 0;
 863
 864         for (i = 0; i < chs; i++) {
 865                 int mask = to_spk_mask(map[i]);
 866                 if (mask) {
 867                         spk_mask |= mask;
 868                         spks++;
 869                 }
 870         }
 871
 872         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 873                 if ((chs == channel_allocations[i].channels ||
 874                      spks == channel_allocations[i].channels) &&
 875                     (spk_mask & channel_allocations[i].spk_mask) ==
 876                                 channel_allocations[i].spk_mask)
 877                         return channel_allocations[i].ca_index;
 878         }
 879         return -1;
 880 }
 881
 882 /* set up the channel slots for the given ALSA API channel map */
 883 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 884                                              hda_nid_t pin_nid,
 885                                              int chs, unsigned char *map,
 886                                              int ca)
 887 {
 888         struct hdmi_spec *spec = codec->spec;
 889         int ordered_ca = get_channel_allocation_order(ca);
 890         int alsa_pos, hdmi_slot;
 891         int assignments[8] = {[0 ... 7] = 0xf};
 892
 893         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 894
 895                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 896
 897                 if (hdmi_slot < 0)
 898                         continue; /* unassigned channel */
 899
 900                 assignments[hdmi_slot] = alsa_pos;
 901         }
 902
 903         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 904                 int err;
 905
 906                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 907                                                      assignments[hdmi_slot]);
 908                 if (err)
 909                         return -EINVAL;
 910         }
 911         return 0;
 912 }
 913
 914 /* store ALSA API channel map from the current default map */
 915 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 916 {
 917         int i;
 918         int ordered_ca = get_channel_allocation_order(ca);
 919         for (i = 0; i < 8; i++) {
 920                 if (i < channel_allocations[ordered_ca].channels)
 921                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 922                 else
 923                         map[i] = 0;
 924         }
 925 }
 926
 927 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 928                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 929                                        int channels, unsigned char *map,
 930                                        bool chmap_set)
 931 {
 932         if (!non_pcm && chmap_set) {
 933                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 934                                                   channels, map, ca);
 935         } else {
 936                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 937                 hdmi_setup_fake_chmap(map, ca);
 938         }
 939
 940         hdmi_debug_channel_mapping(codec, pin_nid);
 941 }
 942
 943 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 944                                      int asp_slot, int channel)
 945 {
 946         return snd_hda_codec_write(codec, pin_nid, 0,
 947                                    AC_VERB_SET_HDMI_CHAN_SLOT,
 948                                    (channel << 4) | asp_slot);
 949 }
 950
 951 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 952                                      int asp_slot)
 953 {
 954         return (snd_hda_codec_read(codec, pin_nid, 0,
 955                                    AC_VERB_GET_HDMI_CHAN_SLOT,
 956                                    asp_slot) & 0xf0) >> 4;
 957 }
 958
 959 /*
 960  * Audio InfoFrame routines
 961  */
 962
 963 /*
 964  * Enable Audio InfoFrame Transmission
 965  */
 966 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 967                                        hda_nid_t pin_nid)
 968 {
 969         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 970         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 971                                                 AC_DIPXMIT_BEST);
 972 }
 973
 974 /*
 975  * Disable Audio InfoFrame Transmission
 976  */
 977 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 978                                       hda_nid_t pin_nid)
 979 {
 980         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 981         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 982                                                 AC_DIPXMIT_DISABLE);
 983 }
 984
 985 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 986 {
 987 #ifdef CONFIG_SND_DEBUG_VERBOSE
 988         int i;
 989         int size;
 990
 991         size = snd_hdmi_get_eld_size(codec, pin_nid);
 992         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 993
 994         for (i = 0; i < 8; i++) {
 995                 size = snd_hda_codec_read(codec, pin_nid, 0,
 996                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 997                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 998         }
 999 #endif
1000 }
1001
1002 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
1003 {
1004 #ifdef BE_PARANOID
1005         int i, j;
1006         int size;
1007         int pi, bi;
1008         for (i = 0; i < 8; i++) {
1009                 size = snd_hda_codec_read(codec, pin_nid, 0,
1010                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1011                 if (size == 0)
1012                         continue;
1013
1014                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
1015                 for (j = 1; j < 1000; j++) {
1016                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
1017                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
1018                         if (pi != i)
1019                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1020                                                 bi, pi, i);
1021                         if (bi == 0) /* byte index wrapped around */
1022                                 break;
1023                 }
1024                 codec_dbg(codec,
1025                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1026                         i, size, j);
1027         }
1028 #endif
1029 }
1030
1031 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1032 {
1033         u8 *bytes = (u8 *)hdmi_ai;
1034         u8 sum = 0;
1035         int i;
1036
1037         hdmi_ai->checksum = 0;
1038
1039         for (i = 0; i < sizeof(*hdmi_ai); i++)
1040                 sum += bytes[i];
1041
1042         hdmi_ai->checksum = -sum;
1043 }
1044
1045 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1046                                       hda_nid_t pin_nid,
1047                                       u8 *dip, int size)
1048 {
1049         int i;
1050
1051         hdmi_debug_dip_size(codec, pin_nid);
1052         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1053
1054         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1055         for (i = 0; i < size; i++)
1056                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1057 }
1058
1059 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1060                                     u8 *dip, int size)
1061 {
1062         u8 val;
1063         int i;
1064
1065         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1066                                                             != AC_DIPXMIT_BEST)
1067                 return false;
1068
1069         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1070         for (i = 0; i < size; i++) {
1071                 val = snd_hda_codec_read(codec, pin_nid, 0,
1072                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1073                 if (val != dip[i])
1074                         return false;
1075         }
1076
1077         return true;
1078 }
1079
1080 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1081                                      hda_nid_t pin_nid,
1082                                      int ca, int active_channels,
1083                                      int conn_type)
1084 {
1085         union audio_infoframe ai;
1086
1087         memset(&ai, 0, sizeof(ai));
1088         if (conn_type == 0) { /* HDMI */
1089                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1090
1091                 hdmi_ai->type           = 0x84;
1092                 hdmi_ai->ver            = 0x01;
1093                 hdmi_ai->len            = 0x0a;
1094                 hdmi_ai->CC02_CT47      = active_channels - 1;
1095                 hdmi_ai->CA             = ca;
1096                 hdmi_checksum_audio_infoframe(hdmi_ai);
1097         } else if (conn_type == 1) { /* DisplayPort */
1098                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1099
1100                 dp_ai->type             = 0x84;
1101                 dp_ai->len              = 0x1b;
1102                 dp_ai->ver              = 0x11 << 2;
1103                 dp_ai->CC02_CT47        = active_channels - 1;
1104                 dp_ai->CA               = ca;
1105         } else {
1106                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1107                             pin_nid);
1108                 return;
1109         }
1110
1111         /*
1112          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1113          * sizeof(*dp_ai) to avoid partial match/update problems when
1114          * the user switches between HDMI/DP monitors.
1115          */
1116         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1117                                         sizeof(ai))) {
1118                 codec_dbg(codec,
1119                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1120                             pin_nid,
1121                             active_channels, ca);
1122                 hdmi_stop_infoframe_trans(codec, pin_nid);
1123                 hdmi_fill_audio_infoframe(codec, pin_nid,
1124                                             ai.bytes, sizeof(ai));
1125                 hdmi_start_infoframe_trans(codec, pin_nid);
1126         }
1127 }
1128
1129 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1130                                        struct hdmi_spec_per_pin *per_pin,
1131                                        bool non_pcm)
1132 {
1133         struct hdmi_spec *spec = codec->spec;
1134         hda_nid_t pin_nid = per_pin->pin_nid;
1135         int channels = per_pin->channels;
1136         int active_channels;
1137         struct hdmi_eld *eld;
1138         int ca, ordered_ca;
1139
1140         if (!channels)
1141                 return;
1142
1143         if (is_haswell_plus(codec))
1144                 snd_hda_codec_write(codec, pin_nid, 0,
1145                                             AC_VERB_SET_AMP_GAIN_MUTE,
1146                                             AMP_OUT_UNMUTE);
1147
1148         eld = &per_pin->sink_eld;
1149
1150         if (!non_pcm && per_pin->chmap_set)
1151                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1152         else
1153                 ca = hdmi_channel_allocation(codec, eld, channels);
1154         if (ca < 0)
1155                 ca = 0;
1156
1157         ordered_ca = get_channel_allocation_order(ca);
1158         active_channels = channel_allocations[ordered_ca].channels;
1159
1160         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1161
1162         /*
1163          * always configure channel mapping, it may have been changed by the
1164          * user in the meantime
1165          */
1166         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1167                                    channels, per_pin->chmap,
1168                                    per_pin->chmap_set);
1169
1170         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1171                                       eld->info.conn_type);
1172
1173         per_pin->non_pcm = non_pcm;
1174 }
1175
1176 /*
1177  * Unsolicited events
1178  */
1179
1180 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1181
1182 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
1183 {
1184         struct hdmi_spec *spec = codec->spec;
1185         int pin_idx = pin_nid_to_pin_index(codec, nid);
1186
1187         if (pin_idx < 0)
1188                 return;
1189         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1190                 snd_hda_jack_report_sync(codec);
1191 }
1192
1193 static void jack_callback(struct hda_codec *codec,
1194                           struct hda_jack_callback *jack)
1195 {
1196         check_presence_and_report(codec, jack->tbl->nid);
1197 }
1198
1199 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1200 {
1201         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1202         struct hda_jack_tbl *jack;
1203         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1204
1205         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1206         if (!jack)
1207                 return;
1208         jack->jack_dirty = 1;
1209
1210         codec_dbg(codec,
1211                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1212                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1213                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1214
1215         check_presence_and_report(codec, jack->nid);
1216 }
1217
1218 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1219 {
1220         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1221         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1222         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1223         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1224
1225         codec_info(codec,
1226                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1227                 codec->addr,
1228                 tag,
1229                 subtag,
1230                 cp_state,
1231                 cp_ready);
1232
1233         /* TODO */
1234         if (cp_state)
1235                 ;
1236         if (cp_ready)
1237                 ;
1238 }
1239
1240
1241 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1242 {
1243         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1244         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1245
1246         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1247                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1248                 return;
1249         }
1250
1251         if (subtag == 0)
1252                 hdmi_intrinsic_event(codec, res);
1253         else
1254                 hdmi_non_intrinsic_event(codec, res);
1255 }
1256
1257 static void haswell_verify_D0(struct hda_codec *codec,
1258                 hda_nid_t cvt_nid, hda_nid_t nid)
1259 {
1260         int pwr;
1261
1262         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1263          * thus pins could only choose converter 0 for use. Make sure the
1264          * converters are in correct power state */
1265         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1266                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1267
1268         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1269                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1270                                     AC_PWRST_D0);
1271                 msleep(40);
1272                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1273                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1274                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1275         }
1276 }
1277
1278 /*
1279  * Callbacks
1280  */
1281
1282 /* HBR should be Non-PCM, 8 channels */
1283 #define is_hbr_format(format) \
1284         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1285
1286 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1287                               bool hbr)
1288 {
1289         int pinctl, new_pinctl;
1290
1291         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1292                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1293                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1294
1295                 if (pinctl < 0)
1296                         return hbr ? -EINVAL : 0;
1297
1298                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1299                 if (hbr)
1300                         new_pinctl |= AC_PINCTL_EPT_HBR;
1301                 else
1302                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1303
1304                 codec_dbg(codec,
1305                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1306                             pin_nid,
1307                             pinctl == new_pinctl ? "" : "new-",
1308                             new_pinctl);
1309
1310                 if (pinctl != new_pinctl)
1311                         snd_hda_codec_write(codec, pin_nid, 0,
1312                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1313                                             new_pinctl);
1314         } else if (hbr)
1315                 return -EINVAL;
1316
1317         return 0;
1318 }
1319
1320 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1321                               hda_nid_t pin_nid, u32 stream_tag, int format)
1322 {
1323         struct hdmi_spec *spec = codec->spec;
1324         int err;
1325
1326         if (is_haswell_plus(codec))
1327                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1328
1329         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1330
1331         if (err) {
1332                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1333                 return err;
1334         }
1335
1336         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1337         return 0;
1338 }
1339
1340 static int hdmi_choose_cvt(struct hda_codec *codec,
1341                         int pin_idx, int *cvt_id, int *mux_id)
1342 {
1343         struct hdmi_spec *spec = codec->spec;
1344         struct hdmi_spec_per_pin *per_pin;
1345         struct hdmi_spec_per_cvt *per_cvt = NULL;
1346         int cvt_idx, mux_idx = 0;
1347
1348         per_pin = get_pin(spec, pin_idx);
1349
1350         /* Dynamically assign converter to stream */
1351         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1352                 per_cvt = get_cvt(spec, cvt_idx);
1353
1354                 /* Must not already be assigned */
1355                 if (per_cvt->assigned)
1356                         continue;
1357                 /* Must be in pin's mux's list of converters */
1358                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1359                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1360                                 break;
1361                 /* Not in mux list */
1362                 if (mux_idx == per_pin->num_mux_nids)
1363                         continue;
1364                 break;
1365         }
1366
1367         /* No free converters */
1368         if (cvt_idx == spec->num_cvts)
1369                 return -ENODEV;
1370
1371         per_pin->mux_idx = mux_idx;
1372
1373         if (cvt_id)
1374                 *cvt_id = cvt_idx;
1375         if (mux_id)
1376                 *mux_id = mux_idx;
1377
1378         return 0;
1379 }
1380
1381 /* Assure the pin select the right convetor */
1382 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1383                         struct hdmi_spec_per_pin *per_pin)
1384 {
1385         hda_nid_t pin_nid = per_pin->pin_nid;
1386         int mux_idx, curr;
1387
1388         mux_idx = per_pin->mux_idx;
1389         curr = snd_hda_codec_read(codec, pin_nid, 0,
1390                                           AC_VERB_GET_CONNECT_SEL, 0);
1391         if (curr != mux_idx)
1392                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1393                                             AC_VERB_SET_CONNECT_SEL,
1394                                             mux_idx);
1395 }
1396
1397 /* Intel HDMI workaround to fix audio routing issue:
1398  * For some Intel display codecs, pins share the same connection list.
1399  * So a conveter can be selected by multiple pins and playback on any of these
1400  * pins will generate sound on the external display, because audio flows from
1401  * the same converter to the display pipeline. Also muting one pin may make
1402  * other pins have no sound output.
1403  * So this function assures that an assigned converter for a pin is not selected
1404  * by any other pins.
1405  */
1406 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1407                         hda_nid_t pin_nid, int mux_idx)
1408 {
1409         struct hdmi_spec *spec = codec->spec;
1410         hda_nid_t nid;
1411         int cvt_idx, curr;
1412         struct hdmi_spec_per_cvt *per_cvt;
1413
1414         /* configure all pins, including "no physical connection" ones */
1415         for_each_hda_codec_node(nid, codec) {
1416                 unsigned int wid_caps = get_wcaps(codec, nid);
1417                 unsigned int wid_type = get_wcaps_type(wid_caps);
1418
1419                 if (wid_type != AC_WID_PIN)
1420                         continue;
1421
1422                 if (nid == pin_nid)
1423                         continue;
1424
1425                 curr = snd_hda_codec_read(codec, nid, 0,
1426                                           AC_VERB_GET_CONNECT_SEL, 0);
1427                 if (curr != mux_idx)
1428                         continue;
1429
1430                 /* choose an unassigned converter. The conveters in the
1431                  * connection list are in the same order as in the codec.
1432                  */
1433                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1434                         per_cvt = get_cvt(spec, cvt_idx);
1435                         if (!per_cvt->assigned) {
1436                                 codec_dbg(codec,
1437                                           "choose cvt %d for pin nid %d\n",
1438                                         cvt_idx, nid);
1439                                 snd_hda_codec_write_cache(codec, nid, 0,
1440                                             AC_VERB_SET_CONNECT_SEL,
1441                                             cvt_idx);
1442                                 break;
1443                         }
1444                 }
1445         }
1446 }
1447
1448 /*
1449  * HDA PCM callbacks
1450  */
1451 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1452                          struct hda_codec *codec,
1453                          struct snd_pcm_substream *substream)
1454 {
1455         struct hdmi_spec *spec = codec->spec;
1456         struct snd_pcm_runtime *runtime = substream->runtime;
1457         int pin_idx, cvt_idx, mux_idx = 0;
1458         struct hdmi_spec_per_pin *per_pin;
1459         struct hdmi_eld *eld;
1460         struct hdmi_spec_per_cvt *per_cvt = NULL;
1461         int err;
1462
1463         /* Validate hinfo */
1464         pin_idx = hinfo_to_pin_index(codec, hinfo);
1465         if (snd_BUG_ON(pin_idx < 0))
1466                 return -EINVAL;
1467         per_pin = get_pin(spec, pin_idx);
1468         eld = &per_pin->sink_eld;
1469
1470         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1471         if (err < 0)
1472                 return err;
1473
1474         per_cvt = get_cvt(spec, cvt_idx);
1475         /* Claim converter */
1476         per_cvt->assigned = 1;
1477         per_pin->cvt_nid = per_cvt->cvt_nid;
1478         hinfo->nid = per_cvt->cvt_nid;
1479
1480         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1481                             AC_VERB_SET_CONNECT_SEL,
1482                             mux_idx);
1483
1484         /* configure unused pins to choose other converters */
1485         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1486                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1487
1488         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1489
1490         /* Initially set the converter's capabilities */
1491         hinfo->channels_min = per_cvt->channels_min;
1492         hinfo->channels_max = per_cvt->channels_max;
1493         hinfo->rates = per_cvt->rates;
1494         hinfo->formats = per_cvt->formats;
1495         hinfo->maxbps = per_cvt->maxbps;
1496
1497         /* Restrict capabilities by ELD if this isn't disabled */
1498         if (!static_hdmi_pcm && eld->eld_valid) {
1499                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1500                 if (hinfo->channels_min > hinfo->channels_max ||
1501                     !hinfo->rates || !hinfo->formats) {
1502                         per_cvt->assigned = 0;
1503                         hinfo->nid = 0;
1504                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1505                         return -ENODEV;
1506                 }
1507         }
1508
1509         /* Store the updated parameters */
1510         runtime->hw.channels_min = hinfo->channels_min;
1511         runtime->hw.channels_max = hinfo->channels_max;
1512         runtime->hw.formats = hinfo->formats;
1513         runtime->hw.rates = hinfo->rates;
1514
1515         snd_pcm_hw_constraint_step(substream->runtime, 0,
1516                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1517         return 0;
1518 }
1519
1520 /*
1521  * HDA/HDMI auto parsing
1522  */
1523 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1524 {
1525         struct hdmi_spec *spec = codec->spec;
1526         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1527         hda_nid_t pin_nid = per_pin->pin_nid;
1528
1529         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1530                 codec_warn(codec,
1531                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1532                            pin_nid, get_wcaps(codec, pin_nid));
1533                 return -EINVAL;
1534         }
1535
1536         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1537                                                         per_pin->mux_nids,
1538                                                         HDA_MAX_CONNECTIONS);
1539
1540         return 0;
1541 }
1542
1543 /* update per_pin ELD from the given new ELD;
1544  * setup info frame and notification accordingly
1545  */
1546 static void update_eld(struct hda_codec *codec,
1547                        struct hdmi_spec_per_pin *per_pin,
1548                        struct hdmi_eld *eld)
1549 {
1550         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1551         bool old_eld_valid = pin_eld->eld_valid;
1552         bool eld_changed;
1553
1554         if (eld->eld_valid)
1555                 snd_hdmi_show_eld(codec, &eld->info);
1556
1557         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1558         if (eld->eld_valid && pin_eld->eld_valid)
1559                 if (pin_eld->eld_size != eld->eld_size ||
1560                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1561                            eld->eld_size) != 0)
1562                         eld_changed = true;
1563
1564         pin_eld->eld_valid = eld->eld_valid;
1565         pin_eld->eld_size = eld->eld_size;
1566         if (eld->eld_valid)
1567                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1568         pin_eld->info = eld->info;
1569
1570         /*
1571          * Re-setup pin and infoframe. This is needed e.g. when
1572          * - sink is first plugged-in
1573          * - transcoder can change during stream playback on Haswell
1574          *   and this can make HW reset converter selection on a pin.
1575          */
1576         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1577                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1578                         intel_verify_pin_cvt_connect(codec, per_pin);
1579                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1580                                                      per_pin->mux_idx);
1581                 }
1582
1583                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1584         }
1585
1586         if (eld_changed)
1587                 snd_ctl_notify(codec->card,
1588                                SNDRV_CTL_EVENT_MASK_VALUE |
1589                                SNDRV_CTL_EVENT_MASK_INFO,
1590                                &per_pin->eld_ctl->id);
1591 }
1592
1593 /* update ELD and jack state via HD-audio verbs */
1594 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1595                                          int repoll)
1596 {
1597         struct hda_jack_tbl *jack;
1598         struct hda_codec *codec = per_pin->codec;
1599         struct hdmi_spec *spec = codec->spec;
1600         struct hdmi_eld *eld = &spec->temp_eld;
1601         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1602         hda_nid_t pin_nid = per_pin->pin_nid;
1603         /*
1604          * Always execute a GetPinSense verb here, even when called from
1605          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1606          * response's PD bit is not the real PD value, but indicates that
1607          * the real PD value changed. An older version of the HD-audio
1608          * specification worked this way. Hence, we just ignore the data in
1609          * the unsolicited response to avoid custom WARs.
1610          */
1611         int present;
1612         bool ret;
1613         bool do_repoll = false;
1614
1615         snd_hda_power_up_pm(codec);
1616         present = snd_hda_pin_sense(codec, pin_nid);
1617
1618         mutex_lock(&per_pin->lock);
1619         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1620         if (pin_eld->monitor_present)
1621                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1622         else
1623                 eld->eld_valid = false;
1624
1625         codec_dbg(codec,
1626                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1627                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1628
1629         if (eld->eld_valid) {
1630                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1631                                                      &eld->eld_size) < 0)
1632                         eld->eld_valid = false;
1633                 else {
1634                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1635                                                     eld->eld_size) < 0)
1636                                 eld->eld_valid = false;
1637                 }
1638                 if (!eld->eld_valid && repoll)
1639                         do_repoll = true;
1640         }
1641
1642         if (do_repoll)
1643                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1644         else
1645                 update_eld(codec, per_pin, eld);
1646
1647         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1648
1649         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1650         if (jack)
1651                 jack->block_report = !ret;
1652
1653         mutex_unlock(&per_pin->lock);
1654         snd_hda_power_down_pm(codec);
1655         return ret;
1656 }
1657
1658 /* update ELD and jack state via audio component */
1659 static void sync_eld_via_acomp(struct hda_codec *codec,
1660                                struct hdmi_spec_per_pin *per_pin)
1661 {
1662         struct hdmi_spec *spec = codec->spec;
1663         struct hdmi_eld *eld = &spec->temp_eld;
1664         int size;
1665
1666         mutex_lock(&per_pin->lock);
1667         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1668                                       &eld->monitor_present, eld->eld_buffer,
1669                                       ELD_MAX_SIZE);
1670         if (size < 0)
1671                 goto unlock;
1672         if (size > 0) {
1673                 size = min(size, ELD_MAX_SIZE);
1674                 if (snd_hdmi_parse_eld(codec, &eld->info,
1675                                        eld->eld_buffer, size) < 0)
1676                         size = -EINVAL;
1677         }
1678
1679         if (size > 0) {
1680                 eld->eld_valid = true;
1681                 eld->eld_size = size;
1682         } else {
1683                 eld->eld_valid = false;
1684                 eld->eld_size = 0;
1685         }
1686
1687         update_eld(codec, per_pin, eld);
1688         snd_jack_report(per_pin->acomp_jack,
1689                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1690  unlock:
1691         mutex_unlock(&per_pin->lock);
1692 }
1693
1694 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1695 {
1696         struct hda_codec *codec = per_pin->codec;
1697
1698         if (codec_has_acomp(codec)) {
1699                 sync_eld_via_acomp(codec, per_pin);
1700                 return false; /* don't call snd_hda_jack_report_sync() */
1701         } else {
1702                 return hdmi_present_sense_via_verbs(per_pin, repoll);
1703         }
1704 }
1705
1706 static void hdmi_repoll_eld(struct work_struct *work)
1707 {
1708         struct hdmi_spec_per_pin *per_pin =
1709         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1710
1711         if (per_pin->repoll_count++ > 6)
1712                 per_pin->repoll_count = 0;
1713
1714         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1715                 snd_hda_jack_report_sync(per_pin->codec);
1716 }
1717
1718 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1719                                              hda_nid_t nid);
1720
1721 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1722 {
1723         struct hdmi_spec *spec = codec->spec;
1724         unsigned int caps, config;
1725         int pin_idx;
1726         struct hdmi_spec_per_pin *per_pin;
1727         int err;
1728
1729         caps = snd_hda_query_pin_caps(codec, pin_nid);
1730         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1731                 return 0;
1732
1733         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1734         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1735                 return 0;
1736
1737         if (is_haswell_plus(codec))
1738                 intel_haswell_fixup_connect_list(codec, pin_nid);
1739
1740         pin_idx = spec->num_pins;
1741         per_pin = snd_array_new(&spec->pins);
1742         if (!per_pin)
1743                 return -ENOMEM;
1744
1745         per_pin->pin_nid = pin_nid;
1746         per_pin->non_pcm = false;
1747
1748         err = hdmi_read_pin_conn(codec, pin_idx);
1749         if (err < 0)
1750                 return err;
1751
1752         spec->num_pins++;
1753
1754         return 0;
1755 }
1756
1757 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1758 {
1759         struct hdmi_spec *spec = codec->spec;
1760         struct hdmi_spec_per_cvt *per_cvt;
1761         unsigned int chans;
1762         int err;
1763
1764         chans = get_wcaps(codec, cvt_nid);
1765         chans = get_wcaps_channels(chans);
1766
1767         per_cvt = snd_array_new(&spec->cvts);
1768         if (!per_cvt)
1769                 return -ENOMEM;
1770
1771         per_cvt->cvt_nid = cvt_nid;
1772         per_cvt->channels_min = 2;
1773         if (chans <= 16) {
1774                 per_cvt->channels_max = chans;
1775                 if (chans > spec->channels_max)
1776                         spec->channels_max = chans;
1777         }
1778
1779         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1780                                           &per_cvt->rates,
1781                                           &per_cvt->formats,
1782                                           &per_cvt->maxbps);
1783         if (err < 0)
1784                 return err;
1785
1786         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1787                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1788         spec->num_cvts++;
1789
1790         return 0;
1791 }
1792
1793 static int hdmi_parse_codec(struct hda_codec *codec)
1794 {
1795         hda_nid_t nid;
1796         int i, nodes;
1797
1798         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1799         if (!nid || nodes < 0) {
1800                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1801                 return -EINVAL;
1802         }
1803
1804         for (i = 0; i < nodes; i++, nid++) {
1805                 unsigned int caps;
1806                 unsigned int type;
1807
1808                 caps = get_wcaps(codec, nid);
1809                 type = get_wcaps_type(caps);
1810
1811                 if (!(caps & AC_WCAP_DIGITAL))
1812                         continue;
1813
1814                 switch (type) {
1815                 case AC_WID_AUD_OUT:
1816                         hdmi_add_cvt(codec, nid);
1817                         break;
1818                 case AC_WID_PIN:
1819                         hdmi_add_pin(codec, nid);
1820                         break;
1821                 }
1822         }
1823
1824         return 0;
1825 }
1826
1827 /*
1828  */
1829 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1830 {
1831         struct hda_spdif_out *spdif;
1832         bool non_pcm;
1833
1834         mutex_lock(&codec->spdif_mutex);
1835         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1836         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1837         mutex_unlock(&codec->spdif_mutex);
1838         return non_pcm;
1839 }
1840
1841 /*
1842  * HDMI callbacks
1843  */
1844
1845 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1846                                            struct hda_codec *codec,
1847                                            unsigned int stream_tag,
1848                                            unsigned int format,
1849                                            struct snd_pcm_substream *substream)
1850 {
1851         hda_nid_t cvt_nid = hinfo->nid;
1852         struct hdmi_spec *spec = codec->spec;
1853         int pin_idx = hinfo_to_pin_index(codec, hinfo);
1854         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1855         hda_nid_t pin_nid = per_pin->pin_nid;
1856         struct snd_pcm_runtime *runtime = substream->runtime;
1857         bool non_pcm;
1858         int pinctl;
1859
1860         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1861                 /* Verify pin:cvt selections to avoid silent audio after S3.
1862                  * After S3, the audio driver restores pin:cvt selections
1863                  * but this can happen before gfx is ready and such selection
1864                  * is overlooked by HW. Thus multiple pins can share a same
1865                  * default convertor and mute control will affect each other,
1866                  * which can cause a resumed audio playback become silent
1867                  * after S3.
1868                  */
1869                 intel_verify_pin_cvt_connect(codec, per_pin);
1870                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1871         }
1872
1873         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1874         /* Todo: add DP1.2 MST audio support later */
1875         snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
1876
1877         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1878         mutex_lock(&per_pin->lock);
1879         per_pin->channels = substream->runtime->channels;
1880         per_pin->setup = true;
1881
1882         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1883         mutex_unlock(&per_pin->lock);
1884
1885         if (spec->dyn_pin_out) {
1886                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1887                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1888                 snd_hda_codec_write(codec, pin_nid, 0,
1889                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1890                                     pinctl | PIN_OUT);
1891         }
1892
1893         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1894 }
1895
1896 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1897                                              struct hda_codec *codec,
1898                                              struct snd_pcm_substream *substream)
1899 {
1900         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1901         return 0;
1902 }
1903
1904 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1905                           struct hda_codec *codec,
1906                           struct snd_pcm_substream *substream)
1907 {
1908         struct hdmi_spec *spec = codec->spec;
1909         int cvt_idx, pin_idx;
1910         struct hdmi_spec_per_cvt *per_cvt;
1911         struct hdmi_spec_per_pin *per_pin;
1912         int pinctl;
1913
1914         if (hinfo->nid) {
1915                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1916                 if (snd_BUG_ON(cvt_idx < 0))
1917                         return -EINVAL;
1918                 per_cvt = get_cvt(spec, cvt_idx);
1919
1920                 snd_BUG_ON(!per_cvt->assigned);
1921                 per_cvt->assigned = 0;
1922                 hinfo->nid = 0;
1923
1924                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1925                 if (snd_BUG_ON(pin_idx < 0))
1926                         return -EINVAL;
1927                 per_pin = get_pin(spec, pin_idx);
1928
1929                 if (spec->dyn_pin_out) {
1930                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1931                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1932                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1933                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1934                                             pinctl & ~PIN_OUT);
1935                 }
1936
1937                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1938
1939                 mutex_lock(&per_pin->lock);
1940                 per_pin->chmap_set = false;
1941                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1942
1943                 per_pin->setup = false;
1944                 per_pin->channels = 0;
1945                 mutex_unlock(&per_pin->lock);
1946         }
1947
1948         return 0;
1949 }
1950
1951 static const struct hda_pcm_ops generic_ops = {
1952         .open = hdmi_pcm_open,
1953         .close = hdmi_pcm_close,
1954         .prepare = generic_hdmi_playback_pcm_prepare,
1955         .cleanup = generic_hdmi_playback_pcm_cleanup,
1956 };
1957
1958 /*
1959  * ALSA API channel-map control callbacks
1960  */
1961 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1962                                struct snd_ctl_elem_info *uinfo)
1963 {
1964         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1965         struct hda_codec *codec = info->private_data;
1966         struct hdmi_spec *spec = codec->spec;
1967         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1968         uinfo->count = spec->channels_max;
1969         uinfo->value.integer.min = 0;
1970         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1971         return 0;
1972 }
1973
1974 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1975                                                   int channels)
1976 {
1977         /* If the speaker allocation matches the channel count, it is OK.*/
1978         if (cap->channels != channels)
1979                 return -1;
1980
1981         /* all channels are remappable freely */
1982         return SNDRV_CTL_TLVT_CHMAP_VAR;
1983 }
1984
1985 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1986                                         unsigned int *chmap, int channels)
1987 {
1988         int count = 0;
1989         int c;
1990
1991         for (c = 7; c >= 0; c--) {
1992                 int spk = cap->speakers[c];
1993                 if (!spk)
1994                         continue;
1995
1996                 chmap[count++] = spk_to_chmap(spk);
1997         }
1998
1999         WARN_ON(count != channels);
2000 }
2001
2002 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
2003                               unsigned int size, unsigned int __user *tlv)
2004 {
2005         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2006         struct hda_codec *codec = info->private_data;
2007         struct hdmi_spec *spec = codec->spec;
2008         unsigned int __user *dst;
2009         int chs, count = 0;
2010
2011         if (size < 8)
2012                 return -ENOMEM;
2013         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
2014                 return -EFAULT;
2015         size -= 8;
2016         dst = tlv + 2;
2017         for (chs = 2; chs <= spec->channels_max; chs++) {
2018                 int i;
2019                 struct cea_channel_speaker_allocation *cap;
2020                 cap = channel_allocations;
2021                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
2022                         int chs_bytes = chs * 4;
2023                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
2024                         unsigned int tlv_chmap[8];
2025
2026                         if (type < 0)
2027                                 continue;
2028                         if (size < 8)
2029                                 return -ENOMEM;
2030                         if (put_user(type, dst) ||
2031                             put_user(chs_bytes, dst + 1))
2032                                 return -EFAULT;
2033                         dst += 2;
2034                         size -= 8;
2035                         count += 8;
2036                         if (size < chs_bytes)
2037                                 return -ENOMEM;
2038                         size -= chs_bytes;
2039                         count += chs_bytes;
2040                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
2041                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
2042                                 return -EFAULT;
2043                         dst += chs;
2044                 }
2045         }
2046         if (put_user(count, tlv + 1))
2047                 return -EFAULT;
2048         return 0;
2049 }
2050
2051 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
2052                               struct snd_ctl_elem_value *ucontrol)
2053 {
2054         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2055         struct hda_codec *codec = info->private_data;
2056         struct hdmi_spec *spec = codec->spec;
2057         int pin_idx = kcontrol->private_value;
2058         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2059         int i;
2060
2061         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
2062                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
2063         return 0;
2064 }
2065
2066 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
2067                               struct snd_ctl_elem_value *ucontrol)
2068 {
2069         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2070         struct hda_codec *codec = info->private_data;
2071         struct hdmi_spec *spec = codec->spec;
2072         int pin_idx = kcontrol->private_value;
2073         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2074         unsigned int ctl_idx;
2075         struct snd_pcm_substream *substream;
2076         unsigned char chmap[8];
2077         int i, err, ca, prepared = 0;
2078
2079         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2080         substream = snd_pcm_chmap_substream(info, ctl_idx);
2081         if (!substream || !substream->runtime)
2082                 return 0; /* just for avoiding error from alsactl restore */
2083         switch (substream->runtime->status->state) {
2084         case SNDRV_PCM_STATE_OPEN:
2085         case SNDRV_PCM_STATE_SETUP:
2086                 break;
2087         case SNDRV_PCM_STATE_PREPARED:
2088                 prepared = 1;
2089                 break;
2090         default:
2091                 return -EBUSY;
2092         }
2093         memset(chmap, 0, sizeof(chmap));
2094         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2095                 chmap[i] = ucontrol->value.integer.value[i];
2096         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2097                 return 0;
2098         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2099         if (ca < 0)
2100                 return -EINVAL;
2101         if (spec->ops.chmap_validate) {
2102                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2103                 if (err)
2104                         return err;
2105         }
2106         mutex_lock(&per_pin->lock);
2107         per_pin->chmap_set = true;
2108         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2109         if (prepared)
2110                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2111         mutex_unlock(&per_pin->lock);
2112
2113         return 0;
2114 }
2115
2116 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2117 {
2118         struct hdmi_spec *spec = codec->spec;
2119         int pin_idx;
2120
2121         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2122                 struct hda_pcm *info;
2123                 struct hda_pcm_stream *pstr;
2124
2125                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
2126                 if (!info)
2127                         return -ENOMEM;
2128                 spec->pcm_rec[pin_idx] = info;
2129                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2130                 info->own_chmap = true;
2131
2132                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2133                 pstr->substreams = 1;
2134                 pstr->ops = generic_ops;
2135                 /* other pstr fields are set in open */
2136         }
2137
2138         return 0;
2139 }
2140
2141 static void free_acomp_jack_priv(struct snd_jack *jack)
2142 {
2143         struct hdmi_spec_per_pin *per_pin = jack->private_data;
2144
2145         per_pin->acomp_jack = NULL;
2146 }
2147
2148 static int add_acomp_jack_kctl(struct hda_codec *codec,
2149                                struct hdmi_spec_per_pin *per_pin,
2150                                const char *name)
2151 {
2152         struct snd_jack *jack;
2153         int err;
2154
2155         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2156                            true, false);
2157         if (err < 0)
2158                 return err;
2159         per_pin->acomp_jack = jack;
2160         jack->private_data = per_pin;
2161         jack->private_free = free_acomp_jack_priv;
2162         return 0;
2163 }
2164
2165 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2166 {
2167         char hdmi_str[32] = "HDMI/DP";
2168         struct hdmi_spec *spec = codec->spec;
2169         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2170         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2171         bool phantom_jack;
2172
2173         if (pcmdev > 0)
2174                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2175         if (codec_has_acomp(codec))
2176                 return add_acomp_jack_kctl(codec, per_pin, hdmi_str);
2177         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2178         if (phantom_jack)
2179                 strncat(hdmi_str, " Phantom",
2180                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2181
2182         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2183                                      phantom_jack);
2184 }
2185
2186 static int generic_hdmi_build_controls(struct hda_codec *codec)
2187 {
2188         struct hdmi_spec *spec = codec->spec;
2189         int err;
2190         int pin_idx;
2191
2192         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2193                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2194
2195                 err = generic_hdmi_build_jack(codec, pin_idx);
2196                 if (err < 0)
2197                         return err;
2198
2199                 err = snd_hda_create_dig_out_ctls(codec,
2200                                                   per_pin->pin_nid,
2201                                                   per_pin->mux_nids[0],
2202                                                   HDA_PCM_TYPE_HDMI);
2203                 if (err < 0)
2204                         return err;
2205                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2206
2207                 /* add control for ELD Bytes */
2208                 err = hdmi_create_eld_ctl(codec, pin_idx,
2209                                           get_pcm_rec(spec, pin_idx)->device);
2210
2211                 if (err < 0)
2212                         return err;
2213
2214                 hdmi_present_sense(per_pin, 0);
2215         }
2216
2217         /* add channel maps */
2218         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2219                 struct hda_pcm *pcm;
2220                 struct snd_pcm_chmap *chmap;
2221                 struct snd_kcontrol *kctl;
2222                 int i;
2223
2224                 pcm = spec->pcm_rec[pin_idx];
2225                 if (!pcm || !pcm->pcm)
2226                         break;
2227                 err = snd_pcm_add_chmap_ctls(pcm->pcm,
2228                                              SNDRV_PCM_STREAM_PLAYBACK,
2229                                              NULL, 0, pin_idx, &chmap);
2230                 if (err < 0)
2231                         return err;
2232                 /* override handlers */
2233                 chmap->private_data = codec;
2234                 kctl = chmap->kctl;
2235                 for (i = 0; i < kctl->count; i++)
2236                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2237                 kctl->info = hdmi_chmap_ctl_info;
2238                 kctl->get = hdmi_chmap_ctl_get;
2239                 kctl->put = hdmi_chmap_ctl_put;
2240                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2241         }
2242
2243         return 0;
2244 }
2245
2246 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2247 {
2248         struct hdmi_spec *spec = codec->spec;
2249         int pin_idx;
2250
2251         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2252                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2253
2254                 per_pin->codec = codec;
2255                 mutex_init(&per_pin->lock);
2256                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2257                 eld_proc_new(per_pin, pin_idx);
2258         }
2259         return 0;
2260 }
2261
2262 static int generic_hdmi_init(struct hda_codec *codec)
2263 {
2264         struct hdmi_spec *spec = codec->spec;
2265         int pin_idx;
2266
2267         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2268                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2269                 hda_nid_t pin_nid = per_pin->pin_nid;
2270
2271                 hdmi_init_pin(codec, pin_nid);
2272                 if (!codec_has_acomp(codec))
2273                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2274                                 codec->jackpoll_interval > 0 ?
2275                                 jack_callback : NULL);
2276         }
2277         return 0;
2278 }
2279
2280 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2281 {
2282         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2283         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2284 }
2285
2286 static void hdmi_array_free(struct hdmi_spec *spec)
2287 {
2288         snd_array_free(&spec->pins);
2289         snd_array_free(&spec->cvts);
2290 }
2291
2292 static void generic_hdmi_free(struct hda_codec *codec)
2293 {
2294         struct hdmi_spec *spec = codec->spec;
2295         int pin_idx;
2296
2297         if (codec_has_acomp(codec))
2298                 snd_hdac_i915_register_notifier(NULL);
2299
2300         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2301                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2302
2303                 cancel_delayed_work_sync(&per_pin->work);
2304                 eld_proc_free(per_pin);
2305                 if (per_pin->acomp_jack)
2306                         snd_device_free(codec->card, per_pin->acomp_jack);
2307         }
2308
2309         if (spec->i915_bound)
2310                 snd_hdac_i915_exit(&codec->bus->core);
2311         hdmi_array_free(spec);
2312         kfree(spec);
2313 }
2314
2315 #ifdef CONFIG_PM
2316 static int generic_hdmi_resume(struct hda_codec *codec)
2317 {
2318         struct hdmi_spec *spec = codec->spec;
2319         int pin_idx;
2320
2321         codec->patch_ops.init(codec);
2322         regcache_sync(codec->core.regmap);
2323
2324         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2325                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2326                 hdmi_present_sense(per_pin, 1);
2327         }
2328         return 0;
2329 }
2330 #endif
2331
2332 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2333         .init                   = generic_hdmi_init,
2334         .free                   = generic_hdmi_free,
2335         .build_pcms             = generic_hdmi_build_pcms,
2336         .build_controls         = generic_hdmi_build_controls,
2337         .unsol_event            = hdmi_unsol_event,
2338 #ifdef CONFIG_PM
2339         .resume                 = generic_hdmi_resume,
2340 #endif
2341 };
2342
2343 static const struct hdmi_ops generic_standard_hdmi_ops = {
2344         .pin_get_eld                            = snd_hdmi_get_eld,
2345         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2346         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2347         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2348         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2349         .setup_stream                           = hdmi_setup_stream,
2350         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2351         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2352 };
2353
2354
2355 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2356                                              hda_nid_t nid)
2357 {
2358         struct hdmi_spec *spec = codec->spec;
2359         hda_nid_t conns[4];
2360         int nconns;
2361
2362         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2363         if (nconns == spec->num_cvts &&
2364             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2365                 return;
2366
2367         /* override pins connection list */
2368         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2369         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2370 }
2371
2372 #define INTEL_VENDOR_NID 0x08
2373 #define INTEL_GET_VENDOR_VERB 0xf81
2374 #define INTEL_SET_VENDOR_VERB 0x781
2375 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2376 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2377
2378 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2379                                           bool update_tree)
2380 {
2381         unsigned int vendor_param;
2382
2383         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2384                                 INTEL_GET_VENDOR_VERB, 0);
2385         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2386                 return;
2387
2388         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2389         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2390                                 INTEL_SET_VENDOR_VERB, vendor_param);
2391         if (vendor_param == -1)
2392                 return;
2393
2394         if (update_tree)
2395                 snd_hda_codec_update_widgets(codec);
2396 }
2397
2398 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2399 {
2400         unsigned int vendor_param;
2401
2402         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2403                                 INTEL_GET_VENDOR_VERB, 0);
2404         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2405                 return;
2406
2407         /* enable DP1.2 mode */
2408         vendor_param |= INTEL_EN_DP12;
2409         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2410         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2411                                 INTEL_SET_VENDOR_VERB, vendor_param);
2412 }
2413
2414 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2415  * Otherwise you may get severe h/w communication errors.
2416  */
2417 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2418                                 unsigned int power_state)
2419 {
2420         if (power_state == AC_PWRST_D0) {
2421                 intel_haswell_enable_all_pins(codec, false);
2422                 intel_haswell_fixup_enable_dp12(codec);
2423         }
2424
2425         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2426         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2427 }
2428
2429 static void intel_pin_eld_notify(void *audio_ptr, int port)
2430 {
2431         struct hda_codec *codec = audio_ptr;
2432         int pin_nid = port + 0x04;
2433
2434         /* skip notification during system suspend (but not in runtime PM);
2435          * the state will be updated at resume
2436          */
2437         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2438                 return;
2439         /* ditto during suspend/resume process itself */
2440         if (atomic_read(&(codec)->core.in_pm))
2441                 return;
2442
2443         check_presence_and_report(codec, pin_nid);
2444 }
2445
2446 static int patch_generic_hdmi(struct hda_codec *codec)
2447 {
2448         struct hdmi_spec *spec;
2449
2450         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2451         if (spec == NULL)
2452                 return -ENOMEM;
2453
2454         spec->ops = generic_standard_hdmi_ops;
2455         codec->spec = spec;
2456         hdmi_array_init(spec, 4);
2457
2458         /* Try to bind with i915 for any Intel codecs (if not done yet) */
2459         if (!codec_has_acomp(codec) &&
2460             (codec->core.vendor_id >> 16) == 0x8086)
2461                 if (!snd_hdac_i915_init(&codec->bus->core))
2462                         spec->i915_bound = true;
2463
2464         if (is_haswell_plus(codec)) {
2465                 intel_haswell_enable_all_pins(codec, true);
2466                 intel_haswell_fixup_enable_dp12(codec);
2467         }
2468
2469         /* For Valleyview/Cherryview, only the display codec is in the display
2470          * power well and can use link_power ops to request/release the power.
2471          * For Haswell/Broadwell, the controller is also in the power well and
2472          * can cover the codec power request, and so need not set this flag.
2473          * For previous platforms, there is no such power well feature.
2474          */
2475         if (is_valleyview_plus(codec) || is_skylake(codec) ||
2476                         is_broxton(codec))
2477                 codec->core.link_power_control = 1;
2478
2479         if (codec_has_acomp(codec)) {
2480                 codec->depop_delay = 0;
2481                 spec->i915_audio_ops.audio_ptr = codec;
2482                 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2483                 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2484         }
2485
2486         if (hdmi_parse_codec(codec) < 0) {
2487                 if (spec->i915_bound)
2488                         snd_hdac_i915_exit(&codec->bus->core);
2489                 codec->spec = NULL;
2490                 kfree(spec);
2491                 return -EINVAL;
2492         }
2493         codec->patch_ops = generic_hdmi_patch_ops;
2494         if (is_haswell_plus(codec)) {
2495                 codec->patch_ops.set_power_state = haswell_set_power_state;
2496                 codec->dp_mst = true;
2497         }
2498
2499         /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2500         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2501                 codec->auto_runtime_pm = 1;
2502
2503         generic_hdmi_init_per_pins(codec);
2504
2505         init_channel_allocations();
2506
2507         return 0;
2508 }
2509
2510 /*
2511  * Shared non-generic implementations
2512  */
2513
2514 static int simple_playback_build_pcms(struct hda_codec *codec)
2515 {
2516         struct hdmi_spec *spec = codec->spec;
2517         struct hda_pcm *info;
2518         unsigned int chans;
2519         struct hda_pcm_stream *pstr;
2520         struct hdmi_spec_per_cvt *per_cvt;
2521
2522         per_cvt = get_cvt(spec, 0);
2523         chans = get_wcaps(codec, per_cvt->cvt_nid);
2524         chans = get_wcaps_channels(chans);
2525
2526         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2527         if (!info)
2528                 return -ENOMEM;
2529         spec->pcm_rec[0] = info;
2530         info->pcm_type = HDA_PCM_TYPE_HDMI;
2531         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2532         *pstr = spec->pcm_playback;
2533         pstr->nid = per_cvt->cvt_nid;
2534         if (pstr->channels_max <= 2 && chans && chans <= 16)
2535                 pstr->channels_max = chans;
2536
2537         return 0;
2538 }
2539
2540 /* unsolicited event for jack sensing */
2541 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2542                                     unsigned int res)
2543 {
2544         snd_hda_jack_set_dirty_all(codec);
2545         snd_hda_jack_report_sync(codec);
2546 }
2547
2548 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2549  * as long as spec->pins[] is set correctly
2550  */
2551 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2552
2553 static int simple_playback_build_controls(struct hda_codec *codec)
2554 {
2555         struct hdmi_spec *spec = codec->spec;
2556         struct hdmi_spec_per_cvt *per_cvt;
2557         int err;
2558
2559         per_cvt = get_cvt(spec, 0);
2560         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2561                                           per_cvt->cvt_nid,
2562                                           HDA_PCM_TYPE_HDMI);
2563         if (err < 0)
2564                 return err;
2565         return simple_hdmi_build_jack(codec, 0);
2566 }
2567
2568 static int simple_playback_init(struct hda_codec *codec)
2569 {
2570         struct hdmi_spec *spec = codec->spec;
2571         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2572         hda_nid_t pin = per_pin->pin_nid;
2573
2574         snd_hda_codec_write(codec, pin, 0,
2575                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2576         /* some codecs require to unmute the pin */
2577         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2578                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2579                                     AMP_OUT_UNMUTE);
2580         snd_hda_jack_detect_enable(codec, pin);
2581         return 0;
2582 }
2583
2584 static void simple_playback_free(struct hda_codec *codec)
2585 {
2586         struct hdmi_spec *spec = codec->spec;
2587
2588         hdmi_array_free(spec);
2589         kfree(spec);
2590 }
2591
2592 /*
2593  * Nvidia specific implementations
2594  */
2595
2596 #define Nv_VERB_SET_Channel_Allocation          0xF79
2597 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2598 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2599 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2600
2601 #define nvhdmi_master_con_nid_7x        0x04
2602 #define nvhdmi_master_pin_nid_7x        0x05
2603
2604 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2605         /*front, rear, clfe, rear_surr */
2606         0x6, 0x8, 0xa, 0xc,
2607 };
2608
2609 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2610         /* set audio protect on */
2611         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2612         /* enable digital output on pin widget */
2613         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2614         {} /* terminator */
2615 };
2616
2617 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2618         /* set audio protect on */
2619         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2620         /* enable digital output on pin widget */
2621         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2622         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2623         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2624         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2625         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2626         {} /* terminator */
2627 };
2628
2629 #ifdef LIMITED_RATE_FMT_SUPPORT
2630 /* support only the safe format and rate */
2631 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2632 #define SUPPORTED_MAXBPS        16
2633 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2634 #else
2635 /* support all rates and formats */
2636 #define SUPPORTED_RATES \
2637         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2638         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2639          SNDRV_PCM_RATE_192000)
2640 #define SUPPORTED_MAXBPS        24
2641 #define SUPPORTED_FORMATS \
2642         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2643 #endif
2644
2645 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2646 {
2647         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2648         return 0;
2649 }
2650
2651 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2652 {
2653         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2654         return 0;
2655 }
2656
2657 static unsigned int channels_2_6_8[] = {
2658         2, 6, 8
2659 };
2660
2661 static unsigned int channels_2_8[] = {
2662         2, 8
2663 };
2664
2665 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2666         .count = ARRAY_SIZE(channels_2_6_8),
2667         .list = channels_2_6_8,
2668         .mask = 0,
2669 };
2670
2671 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2672         .count = ARRAY_SIZE(channels_2_8),
2673         .list = channels_2_8,
2674         .mask = 0,
2675 };
2676
2677 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2678                                     struct hda_codec *codec,
2679                                     struct snd_pcm_substream *substream)
2680 {
2681         struct hdmi_spec *spec = codec->spec;
2682         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2683
2684         switch (codec->preset->vendor_id) {
2685         case 0x10de0002:
2686         case 0x10de0003:
2687         case 0x10de0005:
2688         case 0x10de0006:
2689                 hw_constraints_channels = &hw_constraints_2_8_channels;
2690                 break;
2691         case 0x10de0007:
2692                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2693                 break;
2694         default:
2695                 break;
2696         }
2697
2698         if (hw_constraints_channels != NULL) {
2699                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2700                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2701                                 hw_constraints_channels);
2702         } else {
2703                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2704                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2705         }
2706
2707         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2708 }
2709
2710 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2711                                      struct hda_codec *codec,
2712                                      struct snd_pcm_substream *substream)
2713 {
2714         struct hdmi_spec *spec = codec->spec;
2715         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2716 }
2717
2718 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2719                                        struct hda_codec *codec,
2720                                        unsigned int stream_tag,
2721                                        unsigned int format,
2722                                        struct snd_pcm_substream *substream)
2723 {
2724         struct hdmi_spec *spec = codec->spec;
2725         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2726                                              stream_tag, format, substream);
2727 }
2728
2729 static const struct hda_pcm_stream simple_pcm_playback = {
2730         .substreams = 1,
2731         .channels_min = 2,
2732         .channels_max = 2,
2733         .ops = {
2734                 .open = simple_playback_pcm_open,
2735                 .close = simple_playback_pcm_close,
2736                 .prepare = simple_playback_pcm_prepare
2737         },
2738 };
2739
2740 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2741         .build_controls = simple_playback_build_controls,
2742         .build_pcms = simple_playback_build_pcms,
2743         .init = simple_playback_init,
2744         .free = simple_playback_free,
2745         .unsol_event = simple_hdmi_unsol_event,
2746 };
2747
2748 static int patch_simple_hdmi(struct hda_codec *codec,
2749                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2750 {
2751         struct hdmi_spec *spec;
2752         struct hdmi_spec_per_cvt *per_cvt;
2753         struct hdmi_spec_per_pin *per_pin;
2754
2755         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2756         if (!spec)
2757                 return -ENOMEM;
2758
2759         codec->spec = spec;
2760         hdmi_array_init(spec, 1);
2761
2762         spec->multiout.num_dacs = 0;  /* no analog */
2763         spec->multiout.max_channels = 2;
2764         spec->multiout.dig_out_nid = cvt_nid;
2765         spec->num_cvts = 1;
2766         spec->num_pins = 1;
2767         per_pin = snd_array_new(&spec->pins);
2768         per_cvt = snd_array_new(&spec->cvts);
2769         if (!per_pin || !per_cvt) {
2770                 simple_playback_free(codec);
2771                 return -ENOMEM;
2772         }
2773         per_cvt->cvt_nid = cvt_nid;
2774         per_pin->pin_nid = pin_nid;
2775         spec->pcm_playback = simple_pcm_playback;
2776
2777         codec->patch_ops = simple_hdmi_patch_ops;
2778
2779         return 0;
2780 }
2781
2782 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2783                                                     int channels)
2784 {
2785         unsigned int chanmask;
2786         int chan = channels ? (channels - 1) : 1;
2787
2788         switch (channels) {
2789         default:
2790         case 0:
2791         case 2:
2792                 chanmask = 0x00;
2793                 break;
2794         case 4:
2795                 chanmask = 0x08;
2796                 break;
2797         case 6:
2798                 chanmask = 0x0b;
2799                 break;
2800         case 8:
2801                 chanmask = 0x13;
2802                 break;
2803         }
2804
2805         /* Set the audio infoframe channel allocation and checksum fields.  The
2806          * channel count is computed implicitly by the hardware. */
2807         snd_hda_codec_write(codec, 0x1, 0,
2808                         Nv_VERB_SET_Channel_Allocation, chanmask);
2809
2810         snd_hda_codec_write(codec, 0x1, 0,
2811                         Nv_VERB_SET_Info_Frame_Checksum,
2812                         (0x71 - chan - chanmask));
2813 }
2814
2815 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2816                                    struct hda_codec *codec,
2817                                    struct snd_pcm_substream *substream)
2818 {
2819         struct hdmi_spec *spec = codec->spec;
2820         int i;
2821
2822         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2823                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2824         for (i = 0; i < 4; i++) {
2825                 /* set the stream id */
2826                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2827                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2828                 /* set the stream format */
2829                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2830                                 AC_VERB_SET_STREAM_FORMAT, 0);
2831         }
2832
2833         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2834          * streams are disabled. */
2835         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2836
2837         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2838 }
2839
2840 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2841                                      struct hda_codec *codec,
2842                                      unsigned int stream_tag,
2843                                      unsigned int format,
2844                                      struct snd_pcm_substream *substream)
2845 {
2846         int chs;
2847         unsigned int dataDCC2, channel_id;
2848         int i;
2849         struct hdmi_spec *spec = codec->spec;
2850         struct hda_spdif_out *spdif;
2851         struct hdmi_spec_per_cvt *per_cvt;
2852
2853         mutex_lock(&codec->spdif_mutex);
2854         per_cvt = get_cvt(spec, 0);
2855         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2856
2857         chs = substream->runtime->channels;
2858
2859         dataDCC2 = 0x2;
2860
2861         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2862         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2863                 snd_hda_codec_write(codec,
2864                                 nvhdmi_master_con_nid_7x,
2865                                 0,
2866                                 AC_VERB_SET_DIGI_CONVERT_1,
2867                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2868
2869         /* set the stream id */
2870         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2871                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2872
2873         /* set the stream format */
2874         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2875                         AC_VERB_SET_STREAM_FORMAT, format);
2876
2877         /* turn on again (if needed) */
2878         /* enable and set the channel status audio/data flag */
2879         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2880                 snd_hda_codec_write(codec,
2881                                 nvhdmi_master_con_nid_7x,
2882                                 0,
2883                                 AC_VERB_SET_DIGI_CONVERT_1,
2884                                 spdif->ctls & 0xff);
2885                 snd_hda_codec_write(codec,
2886                                 nvhdmi_master_con_nid_7x,
2887                                 0,
2888                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2889         }
2890
2891         for (i = 0; i < 4; i++) {
2892                 if (chs == 2)
2893                         channel_id = 0;
2894                 else
2895                         channel_id = i * 2;
2896
2897                 /* turn off SPDIF once;
2898                  *otherwise the IEC958 bits won't be updated
2899                  */
2900                 if (codec->spdif_status_reset &&
2901                 (spdif->ctls & AC_DIG1_ENABLE))
2902                         snd_hda_codec_write(codec,
2903                                 nvhdmi_con_nids_7x[i],
2904                                 0,
2905                                 AC_VERB_SET_DIGI_CONVERT_1,
2906                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2907                 /* set the stream id */
2908                 snd_hda_codec_write(codec,
2909                                 nvhdmi_con_nids_7x[i],
2910                                 0,
2911                                 AC_VERB_SET_CHANNEL_STREAMID,
2912                                 (stream_tag << 4) | channel_id);
2913                 /* set the stream format */
2914                 snd_hda_codec_write(codec,
2915                                 nvhdmi_con_nids_7x[i],
2916                                 0,
2917                                 AC_VERB_SET_STREAM_FORMAT,
2918                                 format);
2919                 /* turn on again (if needed) */
2920                 /* enable and set the channel status audio/data flag */
2921                 if (codec->spdif_status_reset &&
2922                 (spdif->ctls & AC_DIG1_ENABLE)) {
2923                         snd_hda_codec_write(codec,
2924                                         nvhdmi_con_nids_7x[i],
2925                                         0,
2926                                         AC_VERB_SET_DIGI_CONVERT_1,
2927                                         spdif->ctls & 0xff);
2928                         snd_hda_codec_write(codec,
2929                                         nvhdmi_con_nids_7x[i],
2930                                         0,
2931                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2932                 }
2933         }
2934
2935         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2936
2937         mutex_unlock(&codec->spdif_mutex);
2938         return 0;
2939 }
2940
2941 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2942         .substreams = 1,
2943         .channels_min = 2,
2944         .channels_max = 8,
2945         .nid = nvhdmi_master_con_nid_7x,
2946         .rates = SUPPORTED_RATES,
2947         .maxbps = SUPPORTED_MAXBPS,
2948         .formats = SUPPORTED_FORMATS,
2949         .ops = {
2950                 .open = simple_playback_pcm_open,
2951                 .close = nvhdmi_8ch_7x_pcm_close,
2952                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2953         },
2954 };
2955
2956 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2957 {
2958         struct hdmi_spec *spec;
2959         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2960                                     nvhdmi_master_pin_nid_7x);
2961         if (err < 0)
2962                 return err;
2963
2964         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2965         /* override the PCM rates, etc, as the codec doesn't give full list */
2966         spec = codec->spec;
2967         spec->pcm_playback.rates = SUPPORTED_RATES;
2968         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2969         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2970         return 0;
2971 }
2972
2973 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2974 {
2975         struct hdmi_spec *spec = codec->spec;
2976         int err = simple_playback_build_pcms(codec);
2977         if (!err) {
2978                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2979                 info->own_chmap = true;
2980         }
2981         return err;
2982 }
2983
2984 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2985 {
2986         struct hdmi_spec *spec = codec->spec;
2987         struct hda_pcm *info;
2988         struct snd_pcm_chmap *chmap;
2989         int err;
2990
2991         err = simple_playback_build_controls(codec);
2992         if (err < 0)
2993                 return err;
2994
2995         /* add channel maps */
2996         info = get_pcm_rec(spec, 0);
2997         err = snd_pcm_add_chmap_ctls(info->pcm,
2998                                      SNDRV_PCM_STREAM_PLAYBACK,
2999                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3000         if (err < 0)
3001                 return err;
3002         switch (codec->preset->vendor_id) {
3003         case 0x10de0002:
3004         case 0x10de0003:
3005         case 0x10de0005:
3006         case 0x10de0006:
3007                 chmap->channel_mask = (1U << 2) | (1U << 8);
3008                 break;
3009         case 0x10de0007:
3010                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3011         }
3012         return 0;
3013 }
3014
3015 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3016 {
3017         struct hdmi_spec *spec;
3018         int err = patch_nvhdmi_2ch(codec);
3019         if (err < 0)
3020                 return err;
3021         spec = codec->spec;
3022         spec->multiout.max_channels = 8;
3023         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3024         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3025         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3026         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3027
3028         /* Initialize the audio infoframe channel mask and checksum to something
3029          * valid */
3030         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3031
3032         return 0;
3033 }
3034
3035 /*
3036  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3037  * - 0x10de0015
3038  * - 0x10de0040
3039  */
3040 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3041                                                     int channels)
3042 {
3043         if (cap->ca_index == 0x00 && channels == 2)
3044                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3045
3046         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
3047 }
3048
3049 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
3050 {
3051         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3052                 return -EINVAL;
3053
3054         return 0;
3055 }
3056
3057 static int patch_nvhdmi(struct hda_codec *codec)
3058 {
3059         struct hdmi_spec *spec;
3060         int err;
3061
3062         err = patch_generic_hdmi(codec);
3063         if (err)
3064                 return err;
3065
3066         spec = codec->spec;
3067         spec->dyn_pin_out = true;
3068
3069         spec->ops.chmap_cea_alloc_validate_get_type =
3070                 nvhdmi_chmap_cea_alloc_validate_get_type;
3071         spec->ops.chmap_validate = nvhdmi_chmap_validate;
3072
3073         return 0;
3074 }
3075
3076 /*
3077  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3078  * accessed using vendor-defined verbs. These registers can be used for
3079  * interoperability between the HDA and HDMI drivers.
3080  */
3081
3082 /* Audio Function Group node */
3083 #define NVIDIA_AFG_NID 0x01
3084
3085 /*
3086  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3087  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3088  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3089  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3090  * additional bit (at position 30) to signal the validity of the format.
3091  *
3092  * | 31      | 30    | 29  16 | 15   0 |
3093  * +---------+-------+--------+--------+
3094  * | TRIGGER | VALID | UNUSED | FORMAT |
3095  * +-----------------------------------|
3096  *
3097  * Note that for the trigger bit to take effect it needs to change value
3098  * (i.e. it needs to be toggled).
3099  */
3100 #define NVIDIA_GET_SCRATCH0             0xfa6
3101 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3102 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3103 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3104 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3105 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3106 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3107
3108 #define NVIDIA_GET_SCRATCH1             0xfab
3109 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3110 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3111 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3112 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3113
3114 /*
3115  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3116  * the format is invalidated so that the HDMI codec can be disabled.
3117  */
3118 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3119 {
3120         unsigned int value;
3121
3122         /* bits [31:30] contain the trigger and valid bits */
3123         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3124                                    NVIDIA_GET_SCRATCH0, 0);
3125         value = (value >> 24) & 0xff;
3126
3127         /* bits [15:0] are used to store the HDA format */
3128         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3129                             NVIDIA_SET_SCRATCH0_BYTE0,
3130                             (format >> 0) & 0xff);
3131         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3132                             NVIDIA_SET_SCRATCH0_BYTE1,
3133                             (format >> 8) & 0xff);
3134
3135         /* bits [16:24] are unused */
3136         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3137                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3138
3139         /*
3140          * Bit 30 signals that the data is valid and hence that HDMI audio can
3141          * be enabled.
3142          */
3143         if (format == 0)
3144                 value &= ~NVIDIA_SCRATCH_VALID;
3145         else
3146                 value |= NVIDIA_SCRATCH_VALID;
3147
3148         /*
3149          * Whenever the trigger bit is toggled, an interrupt is raised in the
3150          * HDMI codec. The HDMI driver will use that as trigger to update its
3151          * configuration.
3152          */
3153         value ^= NVIDIA_SCRATCH_TRIGGER;
3154
3155         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3156                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3157 }
3158
3159 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3160                                   struct hda_codec *codec,
3161                                   unsigned int stream_tag,
3162                                   unsigned int format,
3163                                   struct snd_pcm_substream *substream)
3164 {
3165         int err;
3166
3167         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3168                                                 format, substream);
3169         if (err < 0)
3170                 return err;
3171
3172         /* notify the HDMI codec of the format change */
3173         tegra_hdmi_set_format(codec, format);
3174
3175         return 0;
3176 }
3177
3178 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3179                                   struct hda_codec *codec,
3180                                   struct snd_pcm_substream *substream)
3181 {
3182         /* invalidate the format in the HDMI codec */
3183         tegra_hdmi_set_format(codec, 0);
3184
3185         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3186 }
3187
3188 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3189 {
3190         struct hdmi_spec *spec = codec->spec;
3191         unsigned int i;
3192
3193         for (i = 0; i < spec->num_pins; i++) {
3194                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3195
3196                 if (pcm->pcm_type == type)
3197                         return pcm;
3198         }
3199
3200         return NULL;
3201 }
3202
3203 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3204 {
3205         struct hda_pcm_stream *stream;
3206         struct hda_pcm *pcm;
3207         int err;
3208
3209         err = generic_hdmi_build_pcms(codec);
3210         if (err < 0)
3211                 return err;
3212
3213         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3214         if (!pcm)
3215                 return -ENODEV;
3216
3217         /*
3218          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3219          * codec about format changes.
3220          */
3221         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3222         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3223         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3224
3225         return 0;
3226 }
3227
3228 static int patch_tegra_hdmi(struct hda_codec *codec)
3229 {
3230         int err;
3231
3232         err = patch_generic_hdmi(codec);
3233         if (err)
3234                 return err;
3235
3236         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3237
3238         return 0;
3239 }
3240
3241 /*
3242  * ATI/AMD-specific implementations
3243  */
3244
3245 #define is_amdhdmi_rev3_or_later(codec) \
3246         ((codec)->core.vendor_id == 0x1002aa01 && \
3247          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3248 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3249
3250 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3251 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3252 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3253 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3254 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3255 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3256 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3257 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3258 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3259 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3260 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3261 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3262 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3263 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3264 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3265 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3266 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3267 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3268 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3269 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3270 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3271 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3272 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3273 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3274 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3275
3276 /* AMD specific HDA cvt verbs */
3277 #define ATI_VERB_SET_RAMP_RATE          0x770
3278 #define ATI_VERB_GET_RAMP_RATE          0xf70
3279
3280 #define ATI_OUT_ENABLE 0x1
3281
3282 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3283 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3284
3285 #define ATI_HBR_CAPABLE 0x01
3286 #define ATI_HBR_ENABLE 0x10
3287
3288 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3289                            unsigned char *buf, int *eld_size)
3290 {
3291         /* call hda_eld.c ATI/AMD-specific function */
3292         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3293                                     is_amdhdmi_rev3_or_later(codec));
3294 }
3295
3296 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3297                                         int active_channels, int conn_type)
3298 {
3299         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3300 }
3301
3302 static int atihdmi_paired_swap_fc_lfe(int pos)
3303 {
3304         /*
3305          * ATI/AMD have automatic FC/LFE swap built-in
3306          * when in pairwise mapping mode.
3307          */
3308
3309         switch (pos) {
3310                 /* see channel_allocations[].speakers[] */
3311                 case 2: return 3;
3312                 case 3: return 2;
3313                 default: break;
3314         }
3315
3316         return pos;
3317 }
3318
3319 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3320 {
3321         struct cea_channel_speaker_allocation *cap;
3322         int i, j;
3323
3324         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3325
3326         cap = &channel_allocations[get_channel_allocation_order(ca)];
3327         for (i = 0; i < chs; ++i) {
3328                 int mask = to_spk_mask(map[i]);
3329                 bool ok = false;
3330                 bool companion_ok = false;
3331
3332                 if (!mask)
3333                         continue;
3334
3335                 for (j = 0 + i % 2; j < 8; j += 2) {
3336                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3337                         if (cap->speakers[chan_idx] == mask) {
3338                                 /* channel is in a supported position */
3339                                 ok = true;
3340
3341                                 if (i % 2 == 0 && i + 1 < chs) {
3342                                         /* even channel, check the odd companion */
3343                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3344                                         int comp_mask_req = to_spk_mask(map[i+1]);
3345                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3346
3347                                         if (comp_mask_req == comp_mask_act)
3348                                                 companion_ok = true;
3349                                         else
3350                                                 return -EINVAL;
3351                                 }
3352                                 break;
3353                         }
3354                 }
3355
3356                 if (!ok)
3357                         return -EINVAL;
3358
3359                 if (companion_ok)
3360                         i++; /* companion channel already checked */
3361         }
3362
3363         return 0;
3364 }
3365
3366 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3367                                         int hdmi_slot, int stream_channel)
3368 {
3369         int verb;
3370         int ati_channel_setup = 0;
3371
3372         if (hdmi_slot > 7)
3373                 return -EINVAL;
3374
3375         if (!has_amd_full_remap_support(codec)) {
3376                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3377
3378                 /* In case this is an odd slot but without stream channel, do not
3379                  * disable the slot since the corresponding even slot could have a
3380                  * channel. In case neither have a channel, the slot pair will be
3381                  * disabled when this function is called for the even slot. */
3382                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3383                         return 0;
3384
3385                 hdmi_slot -= hdmi_slot % 2;
3386
3387                 if (stream_channel != 0xf)
3388                         stream_channel -= stream_channel % 2;
3389         }
3390
3391         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3392
3393         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3394
3395         if (stream_channel != 0xf)
3396                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3397
3398         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3399 }
3400
3401 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3402                                         int asp_slot)
3403 {
3404         bool was_odd = false;
3405         int ati_asp_slot = asp_slot;
3406         int verb;
3407         int ati_channel_setup;
3408
3409         if (asp_slot > 7)
3410                 return -EINVAL;
3411
3412         if (!has_amd_full_remap_support(codec)) {
3413                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3414                 if (ati_asp_slot % 2 != 0) {
3415                         ati_asp_slot -= 1;
3416                         was_odd = true;
3417                 }
3418         }
3419
3420         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3421
3422         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3423
3424         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3425                 return 0xf;
3426
3427         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3428 }
3429
3430 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3431                                                             int channels)
3432 {
3433         int c;
3434
3435         /*
3436          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3437          * we need to take that into account (a single channel may take 2
3438          * channel slots if we need to carry a silent channel next to it).
3439          * On Rev3+ AMD codecs this function is not used.
3440          */
3441         int chanpairs = 0;
3442
3443         /* We only produce even-numbered channel count TLVs */
3444         if ((channels % 2) != 0)
3445                 return -1;
3446
3447         for (c = 0; c < 7; c += 2) {
3448                 if (cap->speakers[c] || cap->speakers[c+1])
3449                         chanpairs++;
3450         }
3451
3452         if (chanpairs * 2 != channels)
3453                 return -1;
3454
3455         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3456 }
3457
3458 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3459                                                   unsigned int *chmap, int channels)
3460 {
3461         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3462         int count = 0;
3463         int c;
3464
3465         for (c = 7; c >= 0; c--) {
3466                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3467                 int spk = cap->speakers[chan];
3468                 if (!spk) {
3469                         /* add N/A channel if the companion channel is occupied */
3470                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3471                                 chmap[count++] = SNDRV_CHMAP_NA;
3472
3473                         continue;
3474                 }
3475
3476                 chmap[count++] = spk_to_chmap(spk);
3477         }
3478
3479         WARN_ON(count != channels);
3480 }
3481
3482 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3483                                  bool hbr)
3484 {
3485         int hbr_ctl, hbr_ctl_new;
3486
3487         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3488         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3489                 if (hbr)
3490                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3491                 else
3492                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3493
3494                 codec_dbg(codec,
3495                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3496                                 pin_nid,
3497                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3498                                 hbr_ctl_new);
3499
3500                 if (hbr_ctl != hbr_ctl_new)
3501                         snd_hda_codec_write(codec, pin_nid, 0,
3502                                                 ATI_VERB_SET_HBR_CONTROL,
3503                                                 hbr_ctl_new);
3504
3505         } else if (hbr)
3506                 return -EINVAL;
3507
3508         return 0;
3509 }
3510
3511 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3512                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3513 {
3514
3515         if (is_amdhdmi_rev3_or_later(codec)) {
3516                 int ramp_rate = 180; /* default as per AMD spec */
3517                 /* disable ramp-up/down for non-pcm as per AMD spec */
3518                 if (format & AC_FMT_TYPE_NON_PCM)
3519                         ramp_rate = 0;
3520
3521                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3522         }
3523
3524         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3525 }
3526
3527
3528 static int atihdmi_init(struct hda_codec *codec)
3529 {
3530         struct hdmi_spec *spec = codec->spec;
3531         int pin_idx, err;
3532
3533         err = generic_hdmi_init(codec);
3534
3535         if (err)
3536                 return err;
3537
3538         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3539                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3540
3541                 /* make sure downmix information in infoframe is zero */
3542                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3543
3544                 /* enable channel-wise remap mode if supported */
3545                 if (has_amd_full_remap_support(codec))
3546                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3547                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3548                                             ATI_MULTICHANNEL_MODE_SINGLE);
3549         }
3550
3551         return 0;
3552 }
3553
3554 static int patch_atihdmi(struct hda_codec *codec)
3555 {
3556         struct hdmi_spec *spec;
3557         struct hdmi_spec_per_cvt *per_cvt;
3558         int err, cvt_idx;
3559
3560         err = patch_generic_hdmi(codec);
3561
3562         if (err)
3563                 return err;
3564
3565         codec->patch_ops.init = atihdmi_init;
3566
3567         spec = codec->spec;
3568
3569         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3570         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3571         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3572         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3573         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3574         spec->ops.setup_stream = atihdmi_setup_stream;
3575
3576         if (!has_amd_full_remap_support(codec)) {
3577                 /* override to ATI/AMD-specific versions with pairwise mapping */
3578                 spec->ops.chmap_cea_alloc_validate_get_type =
3579                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3580                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3581                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3582         }
3583
3584         /* ATI/AMD converters do not advertise all of their capabilities */
3585         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3586                 per_cvt = get_cvt(spec, cvt_idx);
3587                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3588                 per_cvt->rates |= SUPPORTED_RATES;
3589                 per_cvt->formats |= SUPPORTED_FORMATS;
3590                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3591         }
3592
3593         spec->channels_max = max(spec->channels_max, 8u);
3594
3595         return 0;
3596 }
3597
3598 /* VIA HDMI Implementation */
3599 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3600 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3601
3602 static int patch_via_hdmi(struct hda_codec *codec)
3603 {
3604         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3605 }
3606
3607 /*
3608  * patch entries
3609  */
3610 static const struct hda_device_id snd_hda_id_hdmi[] = {
3611 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3612 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3613 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3614 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3615 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3616 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3617 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3618 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3619 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3620 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3621 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3622 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3623 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3624 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3625 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3626 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3627 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3628 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3629 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3630 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3631 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3632 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3633 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3634 /* 17 is known to be absent */
3635 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3636 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3637 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3638 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3639 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3640 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3641 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3642 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3643 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3644 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3645 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3646 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3647 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3648 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3649 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3650 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3651 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3652 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3653 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3654 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3655 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3656 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
3657 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3658 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3659 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3660 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
3661 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
3662 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
3663 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
3664 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
3665 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
3666 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
3667 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
3668 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
3669 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_generic_hdmi),
3670 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_generic_hdmi),
3671 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_generic_hdmi),
3672 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_generic_hdmi),
3673 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_generic_hdmi),
3674 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
3675 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
3676 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_generic_hdmi),
3677 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
3678 /* special ID for generic HDMI */
3679 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3680 {} /* terminator */
3681 };
3682 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3683
3684 MODULE_LICENSE("GPL");
3685 MODULE_DESCRIPTION("HDMI HD-audio codec");
3686 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3687 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3688 MODULE_ALIAS("snd-hda-codec-atihdmi");
3689
3690 static struct hda_codec_driver hdmi_driver = {
3691         .id = snd_hda_id_hdmi,
3692 };
3693
3694 module_hda_codec_driver(hdmi_driver);