drivers/video/fbdev/amba-clcd.c

   1 /*
   2  *  linux/drivers/video/amba-clcd.c
   3  *
   4  * Copyright (C) 2001 ARM Limited, by David A Rusling
   5  * Updated to 2.5, Deep Blue Solutions Ltd.
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file COPYING in the main directory of this archive
   9  * for more details.
  10  *
  11  *  ARM PrimeCell PL110 Color LCD Controller
  12  */
  13 #include <linux/dma-mapping.h>
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/string.h>
  18 #include <linux/slab.h>
  19 #include <linux/delay.h>
  20 #include <linux/mm.h>
  21 #include <linux/fb.h>
  22 #include <linux/init.h>
  23 #include <linux/ioport.h>
  24 #include <linux/list.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/clcd.h>
  27 #include <linux/bitops.h>
  28 #include <linux/clk.h>
  29 #include <linux/hardirq.h>
  30 #include <linux/of.h>
  31 #include <linux/of_address.h>
  32 #include <linux/of_graph.h>
  33 #include <video/display_timing.h>
  34 #include <video/of_display_timing.h>
  35 #include <video/videomode.h>
  36
  37 #include <asm/sizes.h>
  38
  39 #define to_clcd(info)   container_of(info, struct clcd_fb, fb)
  40
  41 /* This is limited to 16 characters when displayed by X startup */
  42 static const char *clcd_name = "CLCD FB";
  43
  44 /*
  45  * Unfortunately, the enable/disable functions may be called either from
  46  * process or IRQ context, and we _need_ to delay.  This is _not_ good.
  47  */
  48 static inline void clcdfb_sleep(unsigned int ms)
  49 {
  50         if (in_atomic()) {
  51                 mdelay(ms);
  52         } else {
  53                 msleep(ms);
  54         }
  55 }
  56
  57 static inline void clcdfb_set_start(struct clcd_fb *fb)
  58 {
  59         unsigned long ustart = fb->fb.fix.smem_start;
  60         unsigned long lstart;
  61
  62         ustart += fb->fb.var.yoffset * fb->fb.fix.line_length;
  63         lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2;
  64
  65         writel(ustart, fb->regs + CLCD_UBAS);
  66         writel(lstart, fb->regs + CLCD_LBAS);
  67 }
  68
  69 static void clcdfb_disable(struct clcd_fb *fb)
  70 {
  71         u32 val;
  72
  73         if (fb->board->disable)
  74                 fb->board->disable(fb);
  75
  76         val = readl(fb->regs + fb->off_cntl);
  77         if (val & CNTL_LCDPWR) {
  78                 val &= ~CNTL_LCDPWR;
  79                 writel(val, fb->regs + fb->off_cntl);
  80
  81                 clcdfb_sleep(20);
  82         }
  83         if (val & CNTL_LCDEN) {
  84                 val &= ~CNTL_LCDEN;
  85                 writel(val, fb->regs + fb->off_cntl);
  86         }
  87
  88         /*
  89          * Disable CLCD clock source.
  90          */
  91         if (fb->clk_enabled) {
  92                 fb->clk_enabled = false;
  93                 clk_disable(fb->clk);
  94         }
  95 }
  96
  97 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
  98 {
  99         /*
 100          * Enable the CLCD clock source.
 101          */
 102         if (!fb->clk_enabled) {
 103                 fb->clk_enabled = true;
 104                 clk_enable(fb->clk);
 105         }
 106
 107         /*
 108          * Bring up by first enabling..
 109          */
 110         cntl |= CNTL_LCDEN;
 111         writel(cntl, fb->regs + fb->off_cntl);
 112
 113         clcdfb_sleep(20);
 114
 115         /*
 116          * and now apply power.
 117          */
 118         cntl |= CNTL_LCDPWR;
 119         writel(cntl, fb->regs + fb->off_cntl);
 120
 121         /*
 122          * finally, enable the interface.
 123          */
 124         if (fb->board->enable)
 125                 fb->board->enable(fb);
 126 }
 127
 128 static int
 129 clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
 130 {
 131         u32 caps;
 132         int ret = 0;
 133
 134         if (fb->panel->caps && fb->board->caps)
 135                 caps = fb->panel->caps & fb->board->caps;
 136         else {
 137                 /* Old way of specifying what can be used */
 138                 caps = fb->panel->cntl & CNTL_BGR ?
 139                         CLCD_CAP_BGR : CLCD_CAP_RGB;
 140                 /* But mask out 444 modes as they weren't supported */
 141                 caps &= ~CLCD_CAP_444;
 142         }
 143
 144         /* Only TFT panels can do RGB888/BGR888 */
 145         if (!(fb->panel->cntl & CNTL_LCDTFT))
 146                 caps &= ~CLCD_CAP_888;
 147
 148         memset(&var->transp, 0, sizeof(var->transp));
 149
 150         var->red.msb_right = 0;
 151         var->green.msb_right = 0;
 152         var->blue.msb_right = 0;
 153
 154         switch (var->bits_per_pixel) {
 155         case 1:
 156         case 2:
 157         case 4:
 158         case 8:
 159                 /* If we can't do 5551, reject */
 160                 caps &= CLCD_CAP_5551;
 161                 if (!caps) {
 162                         ret = -EINVAL;
 163                         break;
 164                 }
 165
 166                 var->red.length         = var->bits_per_pixel;
 167                 var->red.offset         = 0;
 168                 var->green.length       = var->bits_per_pixel;
 169                 var->green.offset       = 0;
 170                 var->blue.length        = var->bits_per_pixel;
 171                 var->blue.offset        = 0;
 172                 break;
 173
 174         case 16:
 175                 /* If we can't do 444, 5551 or 565, reject */
 176                 if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) {
 177                         ret = -EINVAL;
 178                         break;
 179                 }
 180
 181                 /*
 182                  * Green length can be 4, 5 or 6 depending whether
 183                  * we're operating in 444, 5551 or 565 mode.
 184                  */
 185                 if (var->green.length == 4 && caps & CLCD_CAP_444)
 186                         caps &= CLCD_CAP_444;
 187                 if (var->green.length == 5 && caps & CLCD_CAP_5551)
 188                         caps &= CLCD_CAP_5551;
 189                 else if (var->green.length == 6 && caps & CLCD_CAP_565)
 190                         caps &= CLCD_CAP_565;
 191                 else {
 192                         /*
 193                          * PL110 officially only supports RGB555,
 194                          * but may be wired up to allow RGB565.
 195                          */
 196                         if (caps & CLCD_CAP_565) {
 197                                 var->green.length = 6;
 198                                 caps &= CLCD_CAP_565;
 199                         } else if (caps & CLCD_CAP_5551) {
 200                                 var->green.length = 5;
 201                                 caps &= CLCD_CAP_5551;
 202                         } else {
 203                                 var->green.length = 4;
 204                                 caps &= CLCD_CAP_444;
 205                         }
 206                 }
 207
 208                 if (var->green.length >= 5) {
 209                         var->red.length = 5;
 210                         var->blue.length = 5;
 211                 } else {
 212                         var->red.length = 4;
 213                         var->blue.length = 4;
 214                 }
 215                 break;
 216         case 32:
 217                 /* If we can't do 888, reject */
 218                 caps &= CLCD_CAP_888;
 219                 if (!caps) {
 220                         ret = -EINVAL;
 221                         break;
 222                 }
 223
 224                 var->red.length = 8;
 225                 var->green.length = 8;
 226                 var->blue.length = 8;
 227                 break;
 228         default:
 229                 ret = -EINVAL;
 230                 break;
 231         }
 232
 233         /*
 234          * >= 16bpp displays have separate colour component bitfields
 235          * encoded in the pixel data.  Calculate their position from
 236          * the bitfield length defined above.
 237          */
 238         if (ret == 0 && var->bits_per_pixel >= 16) {
 239                 bool bgr, rgb;
 240
 241                 bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0;
 242                 rgb = caps & CLCD_CAP_RGB && var->red.offset == 0;
 243
 244                 if (!bgr && !rgb)
 245                         /*
 246                          * The requested format was not possible, try just
 247                          * our capabilities.  One of BGR or RGB must be
 248                          * supported.
 249                          */
 250                         bgr = caps & CLCD_CAP_BGR;
 251
 252                 if (bgr) {
 253                         var->blue.offset = 0;
 254                         var->green.offset = var->blue.offset + var->blue.length;
 255                         var->red.offset = var->green.offset + var->green.length;
 256                 } else {
 257                         var->red.offset = 0;
 258                         var->green.offset = var->red.offset + var->red.length;
 259                         var->blue.offset = var->green.offset + var->green.length;
 260                 }
 261         }
 262
 263         return ret;
 264 }
 265
 266 static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 267 {
 268         struct clcd_fb *fb = to_clcd(info);
 269         int ret = -EINVAL;
 270
 271         if (fb->board->check)
 272                 ret = fb->board->check(fb, var);
 273
 274         if (ret == 0 &&
 275             var->xres_virtual * var->bits_per_pixel / 8 *
 276             var->yres_virtual > fb->fb.fix.smem_len)
 277                 ret = -EINVAL;
 278
 279         if (ret == 0)
 280                 ret = clcdfb_set_bitfields(fb, var);
 281
 282         return ret;
 283 }
 284
 285 static int clcdfb_set_par(struct fb_info *info)
 286 {
 287         struct clcd_fb *fb = to_clcd(info);
 288         struct clcd_regs regs;
 289
 290         fb->fb.fix.line_length = fb->fb.var.xres_virtual *
 291                                  fb->fb.var.bits_per_pixel / 8;
 292
 293         if (fb->fb.var.bits_per_pixel <= 8)
 294                 fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 295         else
 296                 fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 297
 298         fb->board->decode(fb, &regs);
 299
 300         clcdfb_disable(fb);
 301
 302         writel(regs.tim0, fb->regs + CLCD_TIM0);
 303         writel(regs.tim1, fb->regs + CLCD_TIM1);
 304         writel(regs.tim2, fb->regs + CLCD_TIM2);
 305         writel(regs.tim3, fb->regs + CLCD_TIM3);
 306
 307         clcdfb_set_start(fb);
 308
 309         clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
 310
 311         fb->clcd_cntl = regs.cntl;
 312
 313         clcdfb_enable(fb, regs.cntl);
 314
 315 #ifdef DEBUG
 316         printk(KERN_INFO
 317                "CLCD: Registers set to\n"
 318                "  %08x %08x %08x %08x\n"
 319                "  %08x %08x %08x %08x\n",
 320                 readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
 321                 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
 322                 readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
 323                 readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
 324 #endif
 325
 326         return 0;
 327 }
 328
 329 static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
 330 {
 331         unsigned int mask = (1 << bf->length) - 1;
 332
 333         return (val >> (16 - bf->length) & mask) << bf->offset;
 334 }
 335
 336 /*
 337  *  Set a single color register. The values supplied have a 16 bit
 338  *  magnitude.  Return != 0 for invalid regno.
 339  */
 340 static int
 341 clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
 342                  unsigned int blue, unsigned int transp, struct fb_info *info)
 343 {
 344         struct clcd_fb *fb = to_clcd(info);
 345
 346         if (regno < 16)
 347                 fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
 348                                   convert_bitfield(blue, &fb->fb.var.blue) |
 349                                   convert_bitfield(green, &fb->fb.var.green) |
 350                                   convert_bitfield(red, &fb->fb.var.red);
 351
 352         if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
 353                 int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3);
 354                 u32 val, mask, newval;
 355
 356                 newval  = (red >> 11)  & 0x001f;
 357                 newval |= (green >> 6) & 0x03e0;
 358                 newval |= (blue >> 1)  & 0x7c00;
 359
 360                 /*
 361                  * 3.2.11: if we're configured for big endian
 362                  * byte order, the palette entries are swapped.
 363                  */
 364                 if (fb->clcd_cntl & CNTL_BEBO)
 365                         regno ^= 1;
 366
 367                 if (regno & 1) {
 368                         newval <<= 16;
 369                         mask = 0x0000ffff;
 370                 } else {
 371                         mask = 0xffff0000;
 372                 }
 373
 374                 val = readl(fb->regs + hw_reg) & mask;
 375                 writel(val | newval, fb->regs + hw_reg);
 376         }
 377
 378         return regno > 255;
 379 }
 380
 381 /*
 382  *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
 383  *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
 384  *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
 385  *  to e.g. a video mode which doesn't support it. Implements VESA suspend
 386  *  and powerdown modes on hardware that supports disabling hsync/vsync:
 387  *    blank_mode == 2: suspend vsync
 388  *    blank_mode == 3: suspend hsync
 389  *    blank_mode == 4: powerdown
 390  */
 391 static int clcdfb_blank(int blank_mode, struct fb_info *info)
 392 {
 393         struct clcd_fb *fb = to_clcd(info);
 394
 395         if (blank_mode != 0) {
 396                 clcdfb_disable(fb);
 397         } else {
 398                 clcdfb_enable(fb, fb->clcd_cntl);
 399         }
 400         return 0;
 401 }
 402
 403 static int clcdfb_mmap(struct fb_info *info,
 404                        struct vm_area_struct *vma)
 405 {
 406         struct clcd_fb *fb = to_clcd(info);
 407         unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT;
 408         int ret = -EINVAL;
 409
 410         len = info->fix.smem_len;
 411
 412         if (off <= len && vma->vm_end - vma->vm_start <= len - off &&
 413             fb->board->mmap)
 414                 ret = fb->board->mmap(fb, vma);
 415
 416         return ret;
 417 }
 418
 419 static struct fb_ops clcdfb_ops = {
 420         .owner          = THIS_MODULE,
 421         .fb_check_var   = clcdfb_check_var,
 422         .fb_set_par     = clcdfb_set_par,
 423         .fb_setcolreg   = clcdfb_setcolreg,
 424         .fb_blank       = clcdfb_blank,
 425         .fb_fillrect    = cfb_fillrect,
 426         .fb_copyarea    = cfb_copyarea,
 427         .fb_imageblit   = cfb_imageblit,
 428         .fb_mmap        = clcdfb_mmap,
 429 };
 430
 431 static int clcdfb_register(struct clcd_fb *fb)
 432 {
 433         int ret;
 434
 435         /*
 436          * ARM PL111 always has IENB at 0x1c; it's only PL110
 437          * which is reversed on some platforms.
 438          */
 439         if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
 440                 fb->off_ienb = CLCD_PL111_IENB;
 441                 fb->off_cntl = CLCD_PL111_CNTL;
 442         } else {
 443                 if (of_machine_is_compatible("arm,versatile-ab") ||
 444                     of_machine_is_compatible("arm,versatile-pb")) {
 445                         fb->off_ienb = CLCD_PL111_IENB;
 446                         fb->off_cntl = CLCD_PL111_CNTL;
 447                 } else {
 448                         fb->off_ienb = CLCD_PL110_IENB;
 449                         fb->off_cntl = CLCD_PL110_CNTL;
 450                 }
 451         }
 452
 453         fb->clk = clk_get(&fb->dev->dev, NULL);
 454         if (IS_ERR(fb->clk)) {
 455                 ret = PTR_ERR(fb->clk);
 456                 goto out;
 457         }
 458
 459         ret = clk_prepare(fb->clk);
 460         if (ret)
 461                 goto free_clk;
 462
 463         fb->fb.device           = &fb->dev->dev;
 464
 465         fb->fb.fix.mmio_start   = fb->dev->res.start;
 466         fb->fb.fix.mmio_len     = resource_size(&fb->dev->res);
 467
 468         fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
 469         if (!fb->regs) {
 470                 printk(KERN_ERR "CLCD: unable to remap registers\n");
 471                 ret = -ENOMEM;
 472                 goto clk_unprep;
 473         }
 474
 475         fb->fb.fbops            = &clcdfb_ops;
 476         fb->fb.flags            = FBINFO_FLAG_DEFAULT;
 477         fb->fb.pseudo_palette   = fb->cmap;
 478
 479         strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id));
 480         fb->fb.fix.type         = FB_TYPE_PACKED_PIXELS;
 481         fb->fb.fix.type_aux     = 0;
 482         fb->fb.fix.xpanstep     = 0;
 483         fb->fb.fix.ypanstep     = 0;
 484         fb->fb.fix.ywrapstep    = 0;
 485         fb->fb.fix.accel        = FB_ACCEL_NONE;
 486
 487         fb->fb.var.xres         = fb->panel->mode.xres;
 488         fb->fb.var.yres         = fb->panel->mode.yres;
 489         fb->fb.var.xres_virtual = fb->panel->mode.xres;
 490         fb->fb.var.yres_virtual = fb->panel->mode.yres;
 491         fb->fb.var.bits_per_pixel = fb->panel->bpp;
 492         fb->fb.var.grayscale    = fb->panel->grayscale;
 493         fb->fb.var.pixclock     = fb->panel->mode.pixclock;
 494         fb->fb.var.left_margin  = fb->panel->mode.left_margin;
 495         fb->fb.var.right_margin = fb->panel->mode.right_margin;
 496         fb->fb.var.upper_margin = fb->panel->mode.upper_margin;
 497         fb->fb.var.lower_margin = fb->panel->mode.lower_margin;
 498         fb->fb.var.hsync_len    = fb->panel->mode.hsync_len;
 499         fb->fb.var.vsync_len    = fb->panel->mode.vsync_len;
 500         fb->fb.var.sync         = fb->panel->mode.sync;
 501         fb->fb.var.vmode        = fb->panel->mode.vmode;
 502         fb->fb.var.activate     = FB_ACTIVATE_NOW;
 503         fb->fb.var.nonstd       = 0;
 504         fb->fb.var.height       = fb->panel->height;
 505         fb->fb.var.width        = fb->panel->width;
 506         fb->fb.var.accel_flags  = 0;
 507
 508         fb->fb.monspecs.hfmin   = 0;
 509         fb->fb.monspecs.hfmax   = 100000;
 510         fb->fb.monspecs.vfmin   = 0;
 511         fb->fb.monspecs.vfmax   = 400;
 512         fb->fb.monspecs.dclkmin = 1000000;
 513         fb->fb.monspecs.dclkmax = 100000000;
 514
 515         /*
 516          * Make sure that the bitfields are set appropriately.
 517          */
 518         clcdfb_set_bitfields(fb, &fb->fb.var);
 519
 520         /*
 521          * Allocate colourmap.
 522          */
 523         ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0);
 524         if (ret)
 525                 goto unmap;
 526
 527         /*
 528          * Ensure interrupts are disabled.
 529          */
 530         writel(0, fb->regs + fb->off_ienb);
 531
 532         fb_set_var(&fb->fb, &fb->fb.var);
 533
 534         dev_info(&fb->dev->dev, "%s hardware, %s display\n",
 535                  fb->board->name, fb->panel->mode.name);
 536
 537         ret = register_framebuffer(&fb->fb);
 538         if (ret == 0)
 539                 goto out;
 540
 541         printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret);
 542
 543         fb_dealloc_cmap(&fb->fb.cmap);
 544  unmap:
 545         iounmap(fb->regs);
 546  clk_unprep:
 547         clk_unprepare(fb->clk);
 548  free_clk:
 549         clk_put(fb->clk);
 550  out:
 551         return ret;
 552 }
 553
 554 #ifdef CONFIG_OF
 555 static int clcdfb_of_get_dpi_panel_mode(struct device_node *node,
 556                 struct fb_videomode *mode)
 557 {
 558         int err;
 559         struct display_timing timing;
 560         struct videomode video;
 561
 562         err = of_get_display_timing(node, "panel-timing", &timing);
 563         if (err)
 564                 return err;
 565
 566         videomode_from_timing(&timing, &video);
 567
 568         err = fb_videomode_from_videomode(&video, mode);
 569         if (err)
 570                 return err;
 571
 572         return 0;
 573 }
 574
 575 static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
 576 {
 577         return snprintf(buf, size, "%ux%u@%u", mode->xres, mode->yres,
 578                         mode->refresh);
 579 }
 580
 581 static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint,
 582                 struct fb_videomode *mode)
 583 {
 584         int err;
 585         struct device_node *panel;
 586         char *name;
 587         int len;
 588
 589         panel = of_graph_get_remote_port_parent(endpoint);
 590         if (!panel)
 591                 return -ENODEV;
 592
 593         /* Only directly connected DPI panels supported for now */
 594         if (of_device_is_compatible(panel, "panel-dpi"))
 595                 err = clcdfb_of_get_dpi_panel_mode(panel, mode);
 596         else
 597                 err = -ENOENT;
 598         if (err)
 599                 return err;
 600
 601         len = clcdfb_snprintf_mode(NULL, 0, mode);
 602         name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
 603         if (!name)
 604                 return -ENOMEM;
 605
 606         clcdfb_snprintf_mode(name, len + 1, mode);
 607         mode->name = name;
 608
 609         return 0;
 610 }
 611
 612 static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0)
 613 {
 614         static struct {
 615                 unsigned int part;
 616                 u32 r0, g0, b0;
 617                 u32 caps;
 618         } panels[] = {
 619                 { 0x110, 1,  7, 13, CLCD_CAP_5551 },
 620                 { 0x110, 0,  8, 16, CLCD_CAP_888 },
 621                 { 0x111, 4, 14, 20, CLCD_CAP_444 },
 622                 { 0x111, 3, 11, 19, CLCD_CAP_444 | CLCD_CAP_5551 },
 623                 { 0x111, 3, 10, 19, CLCD_CAP_444 | CLCD_CAP_5551 |
 624                                     CLCD_CAP_565 },
 625                 { 0x111, 0,  8, 16, CLCD_CAP_444 | CLCD_CAP_5551 |
 626                                     CLCD_CAP_565 | CLCD_CAP_888 },
 627         };
 628         int i;
 629
 630         /* Bypass pixel clock divider, data output on the falling edge */
 631         fb->panel->tim2 = TIM2_BCD | TIM2_IPC;
 632
 633         /* TFT display, vert. comp. interrupt at the start of the back porch */
 634         fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1);
 635
 636         fb->panel->caps = 0;
 637
 638         /* Match the setup with known variants */
 639         for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) {
 640                 if (amba_part(fb->dev) != panels[i].part)
 641                         continue;
 642                 if (g0 != panels[i].g0)
 643                         continue;
 644                 if (r0 == panels[i].r0 && b0 == panels[i].b0)
 645                         fb->panel->caps = panels[i].caps;
 646         }
 647
 648         return fb->panel->caps ? 0 : -EINVAL;
 649 }
 650
 651 static int clcdfb_of_init_display(struct clcd_fb *fb)
 652 {
 653         struct device_node *endpoint;
 654         int err;
 655         unsigned int bpp;
 656         u32 max_bandwidth;
 657         u32 tft_r0b0g0[3];
 658
 659         fb->panel = devm_kzalloc(&fb->dev->dev, sizeof(*fb->panel), GFP_KERNEL);
 660         if (!fb->panel)
 661                 return -ENOMEM;
 662
 663         endpoint = of_graph_get_next_endpoint(fb->dev->dev.of_node, NULL);
 664         if (!endpoint)
 665                 return -ENODEV;
 666
 667         err = clcdfb_of_get_mode(&fb->dev->dev, endpoint, &fb->panel->mode);
 668         if (err)
 669                 return err;
 670
 671         err = of_property_read_u32(fb->dev->dev.of_node, "max-memory-bandwidth",
 672                         &max_bandwidth);
 673         if (!err) {
 674                 /*
 675                  * max_bandwidth is in bytes per second and pixclock in
 676                  * pico-seconds, so the maximum allowed bits per pixel is
 677                  *   8 * max_bandwidth / (PICOS2KHZ(pixclock) * 1000)
 678                  * Rearrange this calculation to avoid overflow and then ensure
 679                  * result is a valid format.
 680                  */
 681                 bpp = max_bandwidth / (1000 / 8)
 682                         / PICOS2KHZ(fb->panel->mode.pixclock);
 683                 bpp = rounddown_pow_of_two(bpp);
 684                 if (bpp > 32)
 685                         bpp = 32;
 686         } else
 687                 bpp = 32;
 688         fb->panel->bpp = bpp;
 689
 690 #ifdef CONFIG_CPU_BIG_ENDIAN
 691         fb->panel->cntl |= CNTL_BEBO;
 692 #endif
 693         fb->panel->width = -1;
 694         fb->panel->height = -1;
 695
 696         if (of_property_read_u32_array(endpoint,
 697                         "arm,pl11x,tft-r0g0b0-pads",
 698                         tft_r0b0g0, ARRAY_SIZE(tft_r0b0g0)) == 0)
 699                 return clcdfb_of_init_tft_panel(fb, tft_r0b0g0[0],
 700                                  tft_r0b0g0[1],  tft_r0b0g0[2]);
 701
 702         return -ENOENT;
 703 }
 704
 705 static int clcdfb_of_vram_setup(struct clcd_fb *fb)
 706 {
 707         int err;
 708         struct device_node *memory;
 709         u64 size;
 710
 711         err = clcdfb_of_init_display(fb);
 712         if (err)
 713                 return err;
 714
 715         memory = of_parse_phandle(fb->dev->dev.of_node, "memory-region", 0);
 716         if (!memory)
 717                 return -ENODEV;
 718
 719         fb->fb.screen_base = of_iomap(memory, 0);
 720         if (!fb->fb.screen_base)
 721                 return -ENOMEM;
 722
 723         fb->fb.fix.smem_start = of_translate_address(memory,
 724                         of_get_address(memory, 0, &size, NULL));
 725         fb->fb.fix.smem_len = size;
 726
 727         return 0;
 728 }
 729
 730 static int clcdfb_of_vram_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
 731 {
 732         unsigned long off, user_size, kernel_size;
 733
 734
 735         off = vma->vm_pgoff << PAGE_SHIFT;
 736         user_size = vma->vm_end - vma->vm_start;
 737         kernel_size = fb->fb.fix.smem_len;
 738
 739         if (off >= kernel_size || user_size > (kernel_size - off))
 740                 return -ENXIO;
 741
 742         return remap_pfn_range(vma, vma->vm_start,
 743                         __phys_to_pfn(fb->fb.fix.smem_start) + vma->vm_pgoff,
 744                         user_size,
 745                         pgprot_writecombine(vma->vm_page_prot));
 746 }
 747
 748 static void clcdfb_of_vram_remove(struct clcd_fb *fb)
 749 {
 750         iounmap(fb->fb.screen_base);
 751 }
 752
 753 static int clcdfb_of_dma_setup(struct clcd_fb *fb)
 754 {
 755         unsigned long framesize;
 756         dma_addr_t dma;
 757         int err;
 758
 759         err = clcdfb_of_init_display(fb);
 760         if (err)
 761                 return err;
 762
 763         framesize = fb->panel->mode.xres * fb->panel->mode.yres *
 764                         fb->panel->bpp / 8;
 765         fb->fb.screen_base = dma_alloc_coherent(&fb->dev->dev, framesize,
 766                         &dma, GFP_KERNEL);
 767         if (!fb->fb.screen_base)
 768                 return -ENOMEM;
 769
 770         fb->fb.fix.smem_start = dma;
 771         fb->fb.fix.smem_len = framesize;
 772
 773         return 0;
 774 }
 775
 776 static int clcdfb_of_dma_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
 777 {
 778         return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base,
 779                            fb->fb.fix.smem_start, fb->fb.fix.smem_len);
 780 }
 781
 782 static void clcdfb_of_dma_remove(struct clcd_fb *fb)
 783 {
 784         dma_free_coherent(&fb->dev->dev, fb->fb.fix.smem_len,
 785                         fb->fb.screen_base, fb->fb.fix.smem_start);
 786 }
 787
 788 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
 789 {
 790         struct clcd_board *board = devm_kzalloc(&dev->dev, sizeof(*board),
 791                         GFP_KERNEL);
 792         struct device_node *node = dev->dev.of_node;
 793
 794         if (!board)
 795                 return NULL;
 796
 797         board->name = of_node_full_name(node);
 798         board->caps = CLCD_CAP_ALL;
 799         board->check = clcdfb_check;
 800         board->decode = clcdfb_decode;
 801         if (of_find_property(node, "memory-region", NULL)) {
 802                 board->setup = clcdfb_of_vram_setup;
 803                 board->mmap = clcdfb_of_vram_mmap;
 804                 board->remove = clcdfb_of_vram_remove;
 805         } else {
 806                 board->setup = clcdfb_of_dma_setup;
 807                 board->mmap = clcdfb_of_dma_mmap;
 808                 board->remove = clcdfb_of_dma_remove;
 809         }
 810
 811         return board;
 812 }
 813 #else
 814 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
 815 {
 816         return NULL;
 817 }
 818 #endif
 819
 820 static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
 821 {
 822         struct clcd_board *board = dev_get_platdata(&dev->dev);
 823         struct clcd_fb *fb;
 824         int ret;
 825
 826         if (!board)
 827                 board = clcdfb_of_get_board(dev);
 828
 829         if (!board)
 830                 return -EINVAL;
 831
 832         ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
 833         if (ret)
 834                 goto out;
 835
 836         ret = amba_request_regions(dev, NULL);
 837         if (ret) {
 838                 printk(KERN_ERR "CLCD: unable to reserve regs region\n");
 839                 goto out;
 840         }
 841
 842         fb = kzalloc(sizeof(struct clcd_fb), GFP_KERNEL);
 843         if (!fb) {
 844                 printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n");
 845                 ret = -ENOMEM;
 846                 goto free_region;
 847         }
 848
 849         fb->dev = dev;
 850         fb->board = board;
 851
 852         dev_info(&fb->dev->dev, "PL%03x rev%u at 0x%08llx\n",
 853                 amba_part(dev), amba_rev(dev),
 854                 (unsigned long long)dev->res.start);
 855
 856         ret = fb->board->setup(fb);
 857         if (ret)
 858                 goto free_fb;
 859
 860         ret = clcdfb_register(fb);
 861         if (ret == 0) {
 862                 amba_set_drvdata(dev, fb);
 863                 goto out;
 864         }
 865
 866         fb->board->remove(fb);
 867  free_fb:
 868         kfree(fb);
 869  free_region:
 870         amba_release_regions(dev);
 871  out:
 872         return ret;
 873 }
 874
 875 static int clcdfb_remove(struct amba_device *dev)
 876 {
 877         struct clcd_fb *fb = amba_get_drvdata(dev);
 878
 879         clcdfb_disable(fb);
 880         unregister_framebuffer(&fb->fb);
 881         if (fb->fb.cmap.len)
 882                 fb_dealloc_cmap(&fb->fb.cmap);
 883         iounmap(fb->regs);
 884         clk_unprepare(fb->clk);
 885         clk_put(fb->clk);
 886
 887         fb->board->remove(fb);
 888
 889         kfree(fb);
 890
 891         amba_release_regions(dev);
 892
 893         return 0;
 894 }
 895
 896 static struct amba_id clcdfb_id_table[] = {
 897         {
 898                 .id     = 0x00041110,
 899                 .mask   = 0x000ffffe,
 900         },
 901         { 0, 0 },
 902 };
 903
 904 MODULE_DEVICE_TABLE(amba, clcdfb_id_table);
 905
 906 static struct amba_driver clcd_driver = {
 907         .drv            = {
 908                 .name   = "clcd-pl11x",
 909         },
 910         .probe          = clcdfb_probe,
 911         .remove         = clcdfb_remove,
 912         .id_table       = clcdfb_id_table,
 913 };
 914
 915 static int __init amba_clcdfb_init(void)
 916 {
 917         if (fb_get_options("ambafb", NULL))
 918                 return -ENODEV;
 919
 920         return amba_driver_register(&clcd_driver);
 921 }
 922
 923 module_init(amba_clcdfb_init);
 924
 925 static void __exit amba_clcdfb_exit(void)
 926 {
 927         amba_driver_unregister(&clcd_driver);
 928 }
 929
 930 module_exit(amba_clcdfb_exit);
 931
 932 MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver");
 933 MODULE_LICENSE("GPL");