drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 /*
  39  * CT6 CTX allocation cache
  40  */
  41 static struct kmem_cache *ctx_cachep;
  42 /*
  43  * error level for logging
  44  */
  45 uint ql_errlev = 0x8001;
  46
  47 static int ql2xenableclass2;
  48 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  49 MODULE_PARM_DESC(ql2xenableclass2,
  50                 "Specify if Class 2 operations are supported from the very "
  51                 "beginning. Default is 0 - class 2 not supported.");
  52
  53
  54 int ql2xlogintimeout = 20;
  55 module_param(ql2xlogintimeout, int, S_IRUGO);
  56 MODULE_PARM_DESC(ql2xlogintimeout,
  57                 "Login timeout value in seconds.");
  58
  59 int qlport_down_retry;
  60 module_param(qlport_down_retry, int, S_IRUGO);
  61 MODULE_PARM_DESC(qlport_down_retry,
  62                 "Maximum number of command retries to a port that returns "
  63                 "a PORT-DOWN status.");
  64
  65 int ql2xplogiabsentdevice;
  66 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  67 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  68                 "Option to enable PLOGI to devices that are not present after "
  69                 "a Fabric scan.  This is needed for several broken switches. "
  70                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  71
  72 int ql2xloginretrycount;
  73 module_param(ql2xloginretrycount, int, S_IRUGO);
  74 MODULE_PARM_DESC(ql2xloginretrycount,
  75                 "Specify an alternate value for the NVRAM login retry count.");
  76
  77 int ql2xallocfwdump = 1;
  78 module_param(ql2xallocfwdump, int, S_IRUGO);
  79 MODULE_PARM_DESC(ql2xallocfwdump,
  80                 "Option to enable allocation of memory for a firmware dump "
  81                 "during HBA initialization.  Memory allocation requirements "
  82                 "vary by ISP type.  Default is 1 - allocate memory.");
  83
  84 int ql2xextended_error_logging;
  85 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  86 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  87 MODULE_PARM_DESC(ql2xextended_error_logging,
  88                 "Option to enable extended error logging,\n"
  89                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  90                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  91                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  92                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  93                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  94                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  95                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  96                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  97                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  98                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  99                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 100                 "\t\t0x1e400000 - Preferred value for capturing essential "
 101                 "debug information (equivalent to old "
 102                 "ql2xextended_error_logging=1).\n"
 103                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 104
 105 int ql2xshiftctondsd = 6;
 106 module_param(ql2xshiftctondsd, int, S_IRUGO);
 107 MODULE_PARM_DESC(ql2xshiftctondsd,
 108                 "Set to control shifting of command type processing "
 109                 "based on total number of SG elements.");
 110
 111 int ql2xfdmienable = 1;
 112 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 113 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 114 MODULE_PARM_DESC(ql2xfdmienable,
 115                 "Enables FDMI registrations. "
 116                 "0 - no FDMI. Default is 1 - perform FDMI.");
 117
 118 #define MAX_Q_DEPTH     64
 119 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 120 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 121 MODULE_PARM_DESC(ql2xmaxqdepth,
 122                 "Maximum queue depth to set for each LUN. "
 123                 "Default is 64.");
 124
 125 #if (IS_ENABLED(CONFIG_NVME_FC))
 126 int ql2xenabledif;
 127 #else
 128 int ql2xenabledif = 2;
 129 #endif
 130 module_param(ql2xenabledif, int, S_IRUGO);
 131 MODULE_PARM_DESC(ql2xenabledif,
 132                 " Enable T10-CRC-DIF:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- No DIF Support\n"
 135                 "  1 -- Enable DIF for all types\n"
 136                 "  2 -- Enable DIF for all types, except Type 0.\n");
 137
 138 #if (IS_ENABLED(CONFIG_NVME_FC))
 139 int ql2xnvmeenable = 1;
 140 #else
 141 int ql2xnvmeenable;
 142 #endif
 143 module_param(ql2xnvmeenable, int, 0644);
 144 MODULE_PARM_DESC(ql2xnvmeenable,
 145     "Enables NVME support. "
 146     "0 - no NVMe.  Default is Y");
 147
 148 int ql2xenablehba_err_chk = 2;
 149 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 150 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 151                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 152                 " Default is 2.\n"
 153                 "  0 -- Error isolation disabled\n"
 154                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 155                 "  2 -- Error isolation enabled for all Types\n");
 156
 157 int ql2xiidmaenable = 1;
 158 module_param(ql2xiidmaenable, int, S_IRUGO);
 159 MODULE_PARM_DESC(ql2xiidmaenable,
 160                 "Enables iIDMA settings "
 161                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 162
 163 int ql2xmqsupport = 1;
 164 module_param(ql2xmqsupport, int, S_IRUGO);
 165 MODULE_PARM_DESC(ql2xmqsupport,
 166                 "Enable on demand multiple queue pairs support "
 167                 "Default is 1 for supported. "
 168                 "Set it to 0 to turn off mq qpair support.");
 169
 170 int ql2xfwloadbin;
 171 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 172 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xfwloadbin,
 174                 "Option to specify location from which to load ISP firmware:.\n"
 175                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 176                 "      interface.\n"
 177                 " 1 -- load firmware from flash.\n"
 178                 " 0 -- use default semantics.\n");
 179
 180 int ql2xetsenable;
 181 module_param(ql2xetsenable, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xetsenable,
 183                 "Enables firmware ETS burst."
 184                 "Default is 0 - skip ETS enablement.");
 185
 186 int ql2xdbwr = 1;
 187 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 188 MODULE_PARM_DESC(ql2xdbwr,
 189                 "Option to specify scheme for request queue posting.\n"
 190                 " 0 -- Regular doorbell.\n"
 191                 " 1 -- CAMRAM doorbell (faster).\n");
 192
 193 int ql2xtargetreset = 1;
 194 module_param(ql2xtargetreset, int, S_IRUGO);
 195 MODULE_PARM_DESC(ql2xtargetreset,
 196                  "Enable target reset."
 197                  "Default is 1 - use hw defaults.");
 198
 199 int ql2xgffidenable;
 200 module_param(ql2xgffidenable, int, S_IRUGO);
 201 MODULE_PARM_DESC(ql2xgffidenable,
 202                 "Enables GFF_ID checks of port type. "
 203                 "Default is 0 - Do not use GFF_ID information.");
 204
 205 int ql2xasynctmfenable = 1;
 206 module_param(ql2xasynctmfenable, int, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xasynctmfenable,
 208                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 209                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 210
 211 int ql2xdontresethba;
 212 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 213 MODULE_PARM_DESC(ql2xdontresethba,
 214                 "Option to specify reset behaviour.\n"
 215                 " 0 (Default) -- Reset on failure.\n"
 216                 " 1 -- Do not reset on failure.\n");
 217
 218 uint64_t ql2xmaxlun = MAX_LUNS;
 219 module_param(ql2xmaxlun, ullong, S_IRUGO);
 220 MODULE_PARM_DESC(ql2xmaxlun,
 221                 "Defines the maximum LU number to register with the SCSI "
 222                 "midlayer. Default is 65535.");
 223
 224 int ql2xmdcapmask = 0x1F;
 225 module_param(ql2xmdcapmask, int, S_IRUGO);
 226 MODULE_PARM_DESC(ql2xmdcapmask,
 227                 "Set the Minidump driver capture mask level. "
 228                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 229
 230 int ql2xmdenable = 1;
 231 module_param(ql2xmdenable, int, S_IRUGO);
 232 MODULE_PARM_DESC(ql2xmdenable,
 233                 "Enable/disable MiniDump. "
 234                 "0 - MiniDump disabled. "
 235                 "1 (Default) - MiniDump enabled.");
 236
 237 int ql2xexlogins;
 238 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 239 MODULE_PARM_DESC(ql2xexlogins,
 240                  "Number of extended Logins. "
 241                  "0 (Default)- Disabled.");
 242
 243 int ql2xexchoffld = 1024;
 244 module_param(ql2xexchoffld, uint, 0644);
 245 MODULE_PARM_DESC(ql2xexchoffld,
 246         "Number of target exchanges.");
 247
 248 int ql2xiniexchg = 1024;
 249 module_param(ql2xiniexchg, uint, 0644);
 250 MODULE_PARM_DESC(ql2xiniexchg,
 251         "Number of initiator exchanges.");
 252
 253 int ql2xfwholdabts;
 254 module_param(ql2xfwholdabts, int, S_IRUGO);
 255 MODULE_PARM_DESC(ql2xfwholdabts,
 256                 "Allow FW to hold status IOCB until ABTS rsp received. "
 257                 "0 (Default) Do not set fw option. "
 258                 "1 - Set fw option to hold ABTS.");
 259
 260 int ql2xmvasynctoatio = 1;
 261 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 262 MODULE_PARM_DESC(ql2xmvasynctoatio,
 263                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 264                 "0 (Default). Do not move IOCBs"
 265                 "1 - Move IOCBs.");
 266
 267 int ql2xautodetectsfp = 1;
 268 module_param(ql2xautodetectsfp, int, 0444);
 269 MODULE_PARM_DESC(ql2xautodetectsfp,
 270                  "Detect SFP range and set appropriate distance.\n"
 271                  "1 (Default): Enable\n");
 272
 273 int ql2xenablemsix = 1;
 274 module_param(ql2xenablemsix, int, 0444);
 275 MODULE_PARM_DESC(ql2xenablemsix,
 276                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 277                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 278                  " 0 -- enable traditional pin-based mechanism.\n"
 279                  " 1 -- enable MSI-X interrupt mechanism.\n"
 280                  " 2 -- enable MSI interrupt mechanism.\n");
 281
 282 int qla2xuseresexchforels;
 283 module_param(qla2xuseresexchforels, int, 0444);
 284 MODULE_PARM_DESC(qla2xuseresexchforels,
 285                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 286                  " 0 (default): disabled");
 287
 288 static int ql2xprotmask;
 289 module_param(ql2xprotmask, int, 0644);
 290 MODULE_PARM_DESC(ql2xprotmask,
 291                  "Override DIF/DIX protection capabilities mask\n"
 292                  "Default is 0 which sets protection mask based on "
 293                  "capabilities reported by HBA firmware.\n");
 294
 295 static int ql2xprotguard;
 296 module_param(ql2xprotguard, int, 0644);
 297 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 298                  "  0 -- Let HBA firmware decide\n"
 299                  "  1 -- Force T10 CRC\n"
 300                  "  2 -- Force IP checksum\n");
 301
 302 int ql2xdifbundlinginternalbuffers;
 303 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 304 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 305     "Force using internal buffers for DIF information\n"
 306     "0 (Default). Based on check.\n"
 307     "1 Force using internal buffers\n");
 308
 309 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 310 static void qla2x00_free_device(scsi_qla_host_t *);
 311 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 312 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 313
 314
 315 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 316 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 317
 318 /* TODO Convert to inlines
 319  *
 320  * Timer routines
 321  */
 322
 323 __inline__ void
 324 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 325 {
 326         timer_setup(&vha->timer, qla2x00_timer, 0);
 327         vha->timer.expires = jiffies + interval * HZ;
 328         add_timer(&vha->timer);
 329         vha->timer_active = 1;
 330 }
 331
 332 static inline void
 333 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 334 {
 335         /* Currently used for 82XX only. */
 336         if (vha->device_flags & DFLG_DEV_FAILED) {
 337                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 338                     "Device in a failed state, returning.\n");
 339                 return;
 340         }
 341
 342         mod_timer(&vha->timer, jiffies + interval * HZ);
 343 }
 344
 345 static __inline__ void
 346 qla2x00_stop_timer(scsi_qla_host_t *vha)
 347 {
 348         del_timer_sync(&vha->timer);
 349         vha->timer_active = 0;
 350 }
 351
 352 static int qla2x00_do_dpc(void *data);
 353
 354 static void qla2x00_rst_aen(scsi_qla_host_t *);
 355
 356 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 357         struct req_que **, struct rsp_que **);
 358 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 359 static void qla2x00_mem_free(struct qla_hw_data *);
 360 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 361         struct qla_qpair *qpair);
 362
 363 /* -------------------------------------------------------------------------- */
 364 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 365     struct rsp_que *rsp)
 366 {
 367         struct qla_hw_data *ha = vha->hw;
 368
 369         rsp->qpair = ha->base_qpair;
 370         rsp->req = req;
 371         ha->base_qpair->hw = ha;
 372         ha->base_qpair->req = req;
 373         ha->base_qpair->rsp = rsp;
 374         ha->base_qpair->vha = vha;
 375         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 376         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 377         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 378         ha->base_qpair->srb_mempool = ha->srb_mempool;
 379         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 380         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 381         /* init qpair to this cpu. Will adjust at run time. */
 382         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 383         ha->base_qpair->pdev = ha->pdev;
 384
 385         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 386                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 387 }
 388
 389 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 390                                 struct rsp_que *rsp)
 391 {
 392         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 393
 394         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 395                                 GFP_KERNEL);
 396         if (!ha->req_q_map) {
 397                 ql_log(ql_log_fatal, vha, 0x003b,
 398                     "Unable to allocate memory for request queue ptrs.\n");
 399                 goto fail_req_map;
 400         }
 401
 402         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 403                                 GFP_KERNEL);
 404         if (!ha->rsp_q_map) {
 405                 ql_log(ql_log_fatal, vha, 0x003c,
 406                     "Unable to allocate memory for response queue ptrs.\n");
 407                 goto fail_rsp_map;
 408         }
 409
 410         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 411         if (ha->base_qpair == NULL) {
 412                 ql_log(ql_log_warn, vha, 0x00e0,
 413                     "Failed to allocate base queue pair memory.\n");
 414                 goto fail_base_qpair;
 415         }
 416
 417         qla_init_base_qpair(vha, req, rsp);
 418
 419         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 420                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 421                         GFP_KERNEL);
 422                 if (!ha->queue_pair_map) {
 423                         ql_log(ql_log_fatal, vha, 0x0180,
 424                             "Unable to allocate memory for queue pair ptrs.\n");
 425                         goto fail_qpair_map;
 426                 }
 427         }
 428
 429         /*
 430          * Make sure we record at least the request and response queue zero in
 431          * case we need to free them if part of the probe fails.
 432          */
 433         ha->rsp_q_map[0] = rsp;
 434         ha->req_q_map[0] = req;
 435         set_bit(0, ha->rsp_qid_map);
 436         set_bit(0, ha->req_qid_map);
 437         return 0;
 438
 439 fail_qpair_map:
 440         kfree(ha->base_qpair);
 441         ha->base_qpair = NULL;
 442 fail_base_qpair:
 443         kfree(ha->rsp_q_map);
 444         ha->rsp_q_map = NULL;
 445 fail_rsp_map:
 446         kfree(ha->req_q_map);
 447         ha->req_q_map = NULL;
 448 fail_req_map:
 449         return -ENOMEM;
 450 }
 451
 452 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 453 {
 454         if (IS_QLAFX00(ha)) {
 455                 if (req && req->ring_fx00)
 456                         dma_free_coherent(&ha->pdev->dev,
 457                             (req->length_fx00 + 1) * sizeof(request_t),
 458                             req->ring_fx00, req->dma_fx00);
 459         } else if (req && req->ring)
 460                 dma_free_coherent(&ha->pdev->dev,
 461                 (req->length + 1) * sizeof(request_t),
 462                 req->ring, req->dma);
 463
 464         if (req)
 465                 kfree(req->outstanding_cmds);
 466
 467         kfree(req);
 468 }
 469
 470 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 471 {
 472         if (IS_QLAFX00(ha)) {
 473                 if (rsp && rsp->ring_fx00)
 474                         dma_free_coherent(&ha->pdev->dev,
 475                             (rsp->length_fx00 + 1) * sizeof(request_t),
 476                             rsp->ring_fx00, rsp->dma_fx00);
 477         } else if (rsp && rsp->ring) {
 478                 dma_free_coherent(&ha->pdev->dev,
 479                 (rsp->length + 1) * sizeof(response_t),
 480                 rsp->ring, rsp->dma);
 481         }
 482         kfree(rsp);
 483 }
 484
 485 static void qla2x00_free_queues(struct qla_hw_data *ha)
 486 {
 487         struct req_que *req;
 488         struct rsp_que *rsp;
 489         int cnt;
 490         unsigned long flags;
 491
 492         if (ha->queue_pair_map) {
 493                 kfree(ha->queue_pair_map);
 494                 ha->queue_pair_map = NULL;
 495         }
 496         if (ha->base_qpair) {
 497                 kfree(ha->base_qpair);
 498                 ha->base_qpair = NULL;
 499         }
 500
 501         spin_lock_irqsave(&ha->hardware_lock, flags);
 502         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 503                 if (!test_bit(cnt, ha->req_qid_map))
 504                         continue;
 505
 506                 req = ha->req_q_map[cnt];
 507                 clear_bit(cnt, ha->req_qid_map);
 508                 ha->req_q_map[cnt] = NULL;
 509
 510                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 511                 qla2x00_free_req_que(ha, req);
 512                 spin_lock_irqsave(&ha->hardware_lock, flags);
 513         }
 514         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 515
 516         kfree(ha->req_q_map);
 517         ha->req_q_map = NULL;
 518
 519
 520         spin_lock_irqsave(&ha->hardware_lock, flags);
 521         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 522                 if (!test_bit(cnt, ha->rsp_qid_map))
 523                         continue;
 524
 525                 rsp = ha->rsp_q_map[cnt];
 526                 clear_bit(cnt, ha->rsp_qid_map);
 527                 ha->rsp_q_map[cnt] =  NULL;
 528                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 529                 qla2x00_free_rsp_que(ha, rsp);
 530                 spin_lock_irqsave(&ha->hardware_lock, flags);
 531         }
 532         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 533
 534         kfree(ha->rsp_q_map);
 535         ha->rsp_q_map = NULL;
 536 }
 537
 538 static char *
 539 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 540 {
 541         struct qla_hw_data *ha = vha->hw;
 542         static const char *const pci_bus_modes[] = {
 543                 "33", "66", "100", "133",
 544         };
 545         uint16_t pci_bus;
 546
 547         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 548         if (pci_bus) {
 549                 snprintf(str, str_len, "PCI-X (%s MHz)",
 550                          pci_bus_modes[pci_bus]);
 551         } else {
 552                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 553                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 554         }
 555
 556         return str;
 557 }
 558
 559 static char *
 560 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 561 {
 562         static const char *const pci_bus_modes[] = {
 563                 "33", "66", "100", "133",
 564         };
 565         struct qla_hw_data *ha = vha->hw;
 566         uint32_t pci_bus;
 567
 568         if (pci_is_pcie(ha->pdev)) {
 569                 uint32_t lstat, lspeed, lwidth;
 570                 const char *speed_str;
 571
 572                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 573                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 574                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 575
 576                 switch (lspeed) {
 577                 case 1:
 578                         speed_str = "2.5GT/s";
 579                         break;
 580                 case 2:
 581                         speed_str = "5.0GT/s";
 582                         break;
 583                 case 3:
 584                         speed_str = "8.0GT/s";
 585                         break;
 586                 default:
 587                         speed_str = "<unknown>";
 588                         break;
 589                 }
 590                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 591
 592                 return str;
 593         }
 594
 595         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 596         if (pci_bus == 0 || pci_bus == 8)
 597                 snprintf(str, str_len, "PCI (%s MHz)",
 598                          pci_bus_modes[pci_bus >> 3]);
 599         else
 600                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 601                          pci_bus & 4 ? 2 : 1,
 602                          pci_bus_modes[pci_bus & 3]);
 603
 604         return str;
 605 }
 606
 607 static char *
 608 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 609 {
 610         char un_str[10];
 611         struct qla_hw_data *ha = vha->hw;
 612
 613         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 614             ha->fw_minor_version, ha->fw_subminor_version);
 615
 616         if (ha->fw_attributes & BIT_9) {
 617                 strcat(str, "FLX");
 618                 return (str);
 619         }
 620
 621         switch (ha->fw_attributes & 0xFF) {
 622         case 0x7:
 623                 strcat(str, "EF");
 624                 break;
 625         case 0x17:
 626                 strcat(str, "TP");
 627                 break;
 628         case 0x37:
 629                 strcat(str, "IP");
 630                 break;
 631         case 0x77:
 632                 strcat(str, "VI");
 633                 break;
 634         default:
 635                 sprintf(un_str, "(%x)", ha->fw_attributes);
 636                 strcat(str, un_str);
 637                 break;
 638         }
 639         if (ha->fw_attributes & 0x100)
 640                 strcat(str, "X");
 641
 642         return (str);
 643 }
 644
 645 static char *
 646 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 647 {
 648         struct qla_hw_data *ha = vha->hw;
 649
 650         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 651             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 652         return str;
 653 }
 654
 655 void
 656 qla2x00_sp_free_dma(void *ptr)
 657 {
 658         srb_t *sp = ptr;
 659         struct qla_hw_data *ha = sp->vha->hw;
 660         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 661         void *ctx = GET_CMD_CTX_SP(sp);
 662
 663         if (sp->flags & SRB_DMA_VALID) {
 664                 scsi_dma_unmap(cmd);
 665                 sp->flags &= ~SRB_DMA_VALID;
 666         }
 667
 668         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 669                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 670                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 671                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 672         }
 673
 674         if (!ctx)
 675                 return;
 676
 677         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 678                 /* List assured to be having elements */
 679                 qla2x00_clean_dsd_pool(ha, ctx);
 680                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 681         }
 682
 683         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 684                 struct crc_context *ctx0 = ctx;
 685
 686                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 687                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 688         }
 689
 690         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 691                 struct ct6_dsd *ctx1 = ctx;
 692
 693                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 694                     ctx1->fcp_cmnd_dma);
 695                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 696                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 697                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 698                 mempool_free(ctx1, ha->ctx_mempool);
 699         }
 700 }
 701
 702 void
 703 qla2x00_sp_compl(void *ptr, int res)
 704 {
 705         srb_t *sp = ptr;
 706         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 707         struct completion *comp = sp->comp;
 708
 709         if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
 710                 return;
 711
 712         atomic_dec(&sp->ref_count);
 713
 714         sp->free(sp);
 715         cmd->result = res;
 716         CMD_SP(cmd) = NULL;
 717         cmd->scsi_done(cmd);
 718         if (comp)
 719                 complete(comp);
 720         qla2x00_rel_sp(sp);
 721 }
 722
 723 void
 724 qla2xxx_qpair_sp_free_dma(void *ptr)
 725 {
 726         srb_t *sp = (srb_t *)ptr;
 727         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 728         struct qla_hw_data *ha = sp->fcport->vha->hw;
 729         void *ctx = GET_CMD_CTX_SP(sp);
 730
 731         if (sp->flags & SRB_DMA_VALID) {
 732                 scsi_dma_unmap(cmd);
 733                 sp->flags &= ~SRB_DMA_VALID;
 734         }
 735
 736         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 737                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 738                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 739                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 740         }
 741
 742         if (!ctx)
 743                 return;
 744
 745         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 746                 /* List assured to be having elements */
 747                 qla2x00_clean_dsd_pool(ha, ctx);
 748                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 749         }
 750
 751         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 752                 struct crc_context *difctx = ctx;
 753                 struct dsd_dma *dif_dsd, *nxt_dsd;
 754
 755                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 756                     &difctx->ldif_dma_hndl_list, list) {
 757                         list_del(&dif_dsd->list);
 758                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 759                             dif_dsd->dsd_list_dma);
 760                         kfree(dif_dsd);
 761                         difctx->no_dif_bundl--;
 762                 }
 763
 764                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 765                     &difctx->ldif_dsd_list, list) {
 766                         list_del(&dif_dsd->list);
 767                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 768                             dif_dsd->dsd_list_dma);
 769                         kfree(dif_dsd);
 770                         difctx->no_ldif_dsd--;
 771                 }
 772
 773                 if (difctx->no_ldif_dsd) {
 774                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 775                             "%s: difctx->no_ldif_dsd=%x\n",
 776                             __func__, difctx->no_ldif_dsd);
 777                 }
 778
 779                 if (difctx->no_dif_bundl) {
 780                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 781                             "%s: difctx->no_dif_bundl=%x\n",
 782                             __func__, difctx->no_dif_bundl);
 783                 }
 784                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 785         }
 786
 787         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 788                 struct ct6_dsd *ctx1 = ctx;
 789
 790                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 791                     ctx1->fcp_cmnd_dma);
 792                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 793                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 794                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 795                 mempool_free(ctx1, ha->ctx_mempool);
 796                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 797         }
 798
 799         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 800                 struct crc_context *ctx0 = ctx;
 801
 802                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 803                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 804         }
 805 }
 806
 807 void
 808 qla2xxx_qpair_sp_compl(void *ptr, int res)
 809 {
 810         srb_t *sp = ptr;
 811         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 812         struct completion *comp = sp->comp;
 813
 814         if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
 815                 return;
 816
 817         atomic_dec(&sp->ref_count);
 818
 819         sp->free(sp);
 820         cmd->result = res;
 821         CMD_SP(cmd) = NULL;
 822         cmd->scsi_done(cmd);
 823         if (comp)
 824                 complete(comp);
 825         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 826 }
 827
 828 static int
 829 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 830 {
 831         scsi_qla_host_t *vha = shost_priv(host);
 832         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 833         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 834         struct qla_hw_data *ha = vha->hw;
 835         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 836         srb_t *sp;
 837         int rval;
 838
 839         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 840             WARN_ON_ONCE(!rport)) {
 841                 cmd->result = DID_NO_CONNECT << 16;
 842                 goto qc24_fail_command;
 843         }
 844
 845         if (ha->mqenable) {
 846                 uint32_t tag;
 847                 uint16_t hwq;
 848                 struct qla_qpair *qpair = NULL;
 849
 850                 tag = blk_mq_unique_tag(cmd->request);
 851                 hwq = blk_mq_unique_tag_to_hwq(tag);
 852                 qpair = ha->queue_pair_map[hwq];
 853
 854                 if (qpair)
 855                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 856         }
 857
 858         if (ha->flags.eeh_busy) {
 859                 if (ha->flags.pci_channel_io_perm_failure) {
 860                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 861                             "PCI Channel IO permanent failure, exiting "
 862                             "cmd=%p.\n", cmd);
 863                         cmd->result = DID_NO_CONNECT << 16;
 864                 } else {
 865                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 866                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 867                         cmd->result = DID_REQUEUE << 16;
 868                 }
 869                 goto qc24_fail_command;
 870         }
 871
 872         rval = fc_remote_port_chkready(rport);
 873         if (rval) {
 874                 cmd->result = rval;
 875                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 876                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 877                     cmd, rval);
 878                 goto qc24_fail_command;
 879         }
 880
 881         if (!vha->flags.difdix_supported &&
 882                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 883                         ql_dbg(ql_dbg_io, vha, 0x3004,
 884                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 885                             cmd);
 886                         cmd->result = DID_NO_CONNECT << 16;
 887                         goto qc24_fail_command;
 888         }
 889
 890         if (!fcport) {
 891                 cmd->result = DID_NO_CONNECT << 16;
 892                 goto qc24_fail_command;
 893         }
 894
 895         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 896                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 897                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 898                         ql_dbg(ql_dbg_io, vha, 0x3005,
 899                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 900                             atomic_read(&fcport->state),
 901                             atomic_read(&base_vha->loop_state));
 902                         cmd->result = DID_NO_CONNECT << 16;
 903                         goto qc24_fail_command;
 904                 }
 905                 goto qc24_target_busy;
 906         }
 907
 908         /*
 909          * Return target busy if we've received a non-zero retry_delay_timer
 910          * in a FCP_RSP.
 911          */
 912         if (fcport->retry_delay_timestamp == 0) {
 913                 /* retry delay not set */
 914         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 915                 fcport->retry_delay_timestamp = 0;
 916         else
 917                 goto qc24_target_busy;
 918
 919         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 920         if (!sp)
 921                 goto qc24_host_busy;
 922
 923         sp->u.scmd.cmd = cmd;
 924         sp->type = SRB_SCSI_CMD;
 925         atomic_set(&sp->ref_count, 1);
 926         CMD_SP(cmd) = (void *)sp;
 927         sp->free = qla2x00_sp_free_dma;
 928         sp->done = qla2x00_sp_compl;
 929
 930         rval = ha->isp_ops->start_scsi(sp);
 931         if (rval != QLA_SUCCESS) {
 932                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 933                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 934                 goto qc24_host_busy_free_sp;
 935         }
 936
 937         return 0;
 938
 939 qc24_host_busy_free_sp:
 940         sp->free(sp);
 941
 942 qc24_host_busy:
 943         return SCSI_MLQUEUE_HOST_BUSY;
 944
 945 qc24_target_busy:
 946         return SCSI_MLQUEUE_TARGET_BUSY;
 947
 948 qc24_fail_command:
 949         cmd->scsi_done(cmd);
 950
 951         return 0;
 952 }
 953
 954 /* For MQ supported I/O */
 955 int
 956 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 957     struct qla_qpair *qpair)
 958 {
 959         scsi_qla_host_t *vha = shost_priv(host);
 960         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 961         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 962         struct qla_hw_data *ha = vha->hw;
 963         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 964         srb_t *sp;
 965         int rval;
 966
 967         rval = rport ? fc_remote_port_chkready(rport) : FC_PORTSTATE_OFFLINE;
 968         if (rval) {
 969                 cmd->result = rval;
 970                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 971                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 972                     cmd, rval);
 973                 goto qc24_fail_command;
 974         }
 975
 976         if (!fcport) {
 977                 cmd->result = DID_NO_CONNECT << 16;
 978                 goto qc24_fail_command;
 979         }
 980
 981         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 982                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 983                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 984                         ql_dbg(ql_dbg_io, vha, 0x3077,
 985                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 986                             atomic_read(&fcport->state),
 987                             atomic_read(&base_vha->loop_state));
 988                         cmd->result = DID_NO_CONNECT << 16;
 989                         goto qc24_fail_command;
 990                 }
 991                 goto qc24_target_busy;
 992         }
 993
 994         /*
 995          * Return target busy if we've received a non-zero retry_delay_timer
 996          * in a FCP_RSP.
 997          */
 998         if (fcport->retry_delay_timestamp == 0) {
 999                 /* retry delay not set */
1000         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1001                 fcport->retry_delay_timestamp = 0;
1002         else
1003                 goto qc24_target_busy;
1004
1005         sp = qla2xxx_get_qpair_sp(vha, qpair, fcport, GFP_ATOMIC);
1006         if (!sp)
1007                 goto qc24_host_busy;
1008
1009         sp->u.scmd.cmd = cmd;
1010         sp->type = SRB_SCSI_CMD;
1011         atomic_set(&sp->ref_count, 1);
1012         CMD_SP(cmd) = (void *)sp;
1013         sp->free = qla2xxx_qpair_sp_free_dma;
1014         sp->done = qla2xxx_qpair_sp_compl;
1015         sp->qpair = qpair;
1016
1017         rval = ha->isp_ops->start_scsi_mq(sp);
1018         if (rval != QLA_SUCCESS) {
1019                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1020                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1021                 if (rval == QLA_INTERFACE_ERROR)
1022                         goto qc24_fail_command;
1023                 goto qc24_host_busy_free_sp;
1024         }
1025
1026         return 0;
1027
1028 qc24_host_busy_free_sp:
1029         sp->free(sp);
1030
1031 qc24_host_busy:
1032         return SCSI_MLQUEUE_HOST_BUSY;
1033
1034 qc24_target_busy:
1035         return SCSI_MLQUEUE_TARGET_BUSY;
1036
1037 qc24_fail_command:
1038         cmd->scsi_done(cmd);
1039
1040         return 0;
1041 }
1042
1043 /*
1044  * qla2x00_eh_wait_on_command
1045  *    Waits for the command to be returned by the Firmware for some
1046  *    max time.
1047  *
1048  * Input:
1049  *    cmd = Scsi Command to wait on.
1050  *
1051  * Return:
1052  *    Completed in time : QLA_SUCCESS
1053  *    Did not complete in time : QLA_FUNCTION_FAILED
1054  */
1055 static int
1056 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1057 {
1058 #define ABORT_POLLING_PERIOD    1000
1059 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1060         unsigned long wait_iter = ABORT_WAIT_ITER;
1061         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1062         struct qla_hw_data *ha = vha->hw;
1063         int ret = QLA_SUCCESS;
1064
1065         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1066                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1067                     "Return:eh_wait.\n");
1068                 return ret;
1069         }
1070
1071         while (CMD_SP(cmd) && wait_iter--) {
1072                 msleep(ABORT_POLLING_PERIOD);
1073         }
1074         if (CMD_SP(cmd))
1075                 ret = QLA_FUNCTION_FAILED;
1076
1077         return ret;
1078 }
1079
1080 /*
1081  * qla2x00_wait_for_hba_online
1082  *    Wait till the HBA is online after going through
1083  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1084  *    finally HBA is disabled ie marked offline
1085  *
1086  * Input:
1087  *     ha - pointer to host adapter structure
1088  *
1089  * Note:
1090  *    Does context switching-Release SPIN_LOCK
1091  *    (if any) before calling this routine.
1092  *
1093  * Return:
1094  *    Success (Adapter is online) : 0
1095  *    Failed  (Adapter is offline/disabled) : 1
1096  */
1097 int
1098 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1099 {
1100         int             return_status;
1101         unsigned long   wait_online;
1102         struct qla_hw_data *ha = vha->hw;
1103         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1104
1105         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1106         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1107             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1108             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1109             ha->dpc_active) && time_before(jiffies, wait_online)) {
1110
1111                 msleep(1000);
1112         }
1113         if (base_vha->flags.online)
1114                 return_status = QLA_SUCCESS;
1115         else
1116                 return_status = QLA_FUNCTION_FAILED;
1117
1118         return (return_status);
1119 }
1120
1121 static inline int test_fcport_count(scsi_qla_host_t *vha)
1122 {
1123         struct qla_hw_data *ha = vha->hw;
1124         unsigned long flags;
1125         int res;
1126
1127         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1128         ql_dbg(ql_dbg_init, vha, 0x00ec,
1129             "tgt %p, fcport_count=%d\n",
1130             vha, vha->fcport_count);
1131         res = (vha->fcport_count == 0);
1132         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1133
1134         return res;
1135 }
1136
1137 /*
1138  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1139  * it has dependency on UNLOADING flag to stop device discovery
1140  */
1141 void
1142 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1143 {
1144         qla2x00_mark_all_devices_lost(vha, 0);
1145
1146         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1147 }
1148
1149 /*
1150  * qla2x00_wait_for_hba_ready
1151  * Wait till the HBA is ready before doing driver unload
1152  *
1153  * Input:
1154  *     ha - pointer to host adapter structure
1155  *
1156  * Note:
1157  *    Does context switching-Release SPIN_LOCK
1158  *    (if any) before calling this routine.
1159  *
1160  */
1161 static void
1162 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1163 {
1164         struct qla_hw_data *ha = vha->hw;
1165         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1166
1167         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1168                 ha->flags.mbox_busy) ||
1169                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1170                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1171                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1172                         break;
1173                 msleep(1000);
1174         }
1175 }
1176
1177 int
1178 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1179 {
1180         int             return_status;
1181         unsigned long   wait_reset;
1182         struct qla_hw_data *ha = vha->hw;
1183         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1184
1185         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1186         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1187             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1188             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1189             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1190
1191                 msleep(1000);
1192
1193                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1194                     ha->flags.chip_reset_done)
1195                         break;
1196         }
1197         if (ha->flags.chip_reset_done)
1198                 return_status = QLA_SUCCESS;
1199         else
1200                 return_status = QLA_FUNCTION_FAILED;
1201
1202         return return_status;
1203 }
1204
1205 static int
1206 sp_get(struct srb *sp)
1207 {
1208         if (!refcount_inc_not_zero((refcount_t *)&sp->ref_count))
1209                 /* kref get fail */
1210                 return ENXIO;
1211         else
1212                 return 0;
1213 }
1214
1215 #define ISP_REG_DISCONNECT 0xffffffffU
1216 /**************************************************************************
1217 * qla2x00_isp_reg_stat
1218 *
1219 * Description:
1220 *       Read the host status register of ISP before aborting the command.
1221 *
1222 * Input:
1223 *       ha = pointer to host adapter structure.
1224 *
1225 *
1226 * Returns:
1227 *       Either true or false.
1228 *
1229 * Note: Return true if there is register disconnect.
1230 **************************************************************************/
1231 static inline
1232 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1233 {
1234         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1235         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1236
1237         if (IS_P3P_TYPE(ha))
1238                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1239         else
1240                 return ((RD_REG_DWORD(&reg->host_status)) ==
1241                         ISP_REG_DISCONNECT);
1242 }
1243
1244 /**************************************************************************
1245 * qla2xxx_eh_abort
1246 *
1247 * Description:
1248 *    The abort function will abort the specified command.
1249 *
1250 * Input:
1251 *    cmd = Linux SCSI command packet to be aborted.
1252 *
1253 * Returns:
1254 *    Either SUCCESS or FAILED.
1255 *
1256 * Note:
1257 *    Only return FAILED if command not returned by firmware.
1258 **************************************************************************/
1259 static int
1260 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1261 {
1262         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1263         DECLARE_COMPLETION_ONSTACK(comp);
1264         srb_t *sp;
1265         int ret;
1266         unsigned int id;
1267         uint64_t lun;
1268         unsigned long flags;
1269         int rval;
1270         struct qla_hw_data *ha = vha->hw;
1271         struct qla_qpair *qpair;
1272
1273         if (qla2x00_isp_reg_stat(ha)) {
1274                 ql_log(ql_log_info, vha, 0x8042,
1275                     "PCI/Register disconnect, exiting.\n");
1276                 return FAILED;
1277         }
1278
1279         ret = fc_block_scsi_eh(cmd);
1280         if (ret != 0)
1281                 return ret;
1282
1283         sp = (srb_t *) CMD_SP(cmd);
1284         if (!sp)
1285                 return SUCCESS;
1286
1287         qpair = sp->qpair;
1288         if (!qpair)
1289                 return SUCCESS;
1290
1291         if (sp->fcport && sp->fcport->deleted)
1292                 return SUCCESS;
1293
1294         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1295         if (sp->type != SRB_SCSI_CMD || GET_CMD_SP(sp) != cmd) {
1296                 /* there's a chance an interrupt could clear
1297                    the ptr as part of done & free */
1298                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1299                 return SUCCESS;
1300         }
1301
1302         /* Get a reference to the sp and drop the lock. */
1303         if (sp_get(sp)){
1304                 /* ref_count is already 0 */
1305                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1306                 return SUCCESS;
1307         }
1308         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1309
1310         id = cmd->device->id;
1311         lun = cmd->device->lun;
1312
1313         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1314             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1315             vha->host_no, id, lun, sp, cmd, sp->handle);
1316
1317         rval = ha->isp_ops->abort_command(sp);
1318         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1319                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1320
1321         switch (rval) {
1322         case QLA_SUCCESS:
1323                 /*
1324                  * The command has been aborted. That means that the firmware
1325                  * won't report a completion.
1326                  */
1327                 sp->done(sp, DID_ABORT << 16);
1328                 ret = SUCCESS;
1329                 break;
1330         case QLA_FUNCTION_PARAMETER_ERROR: {
1331                 /* Wait for the command completion. */
1332                 uint32_t ratov = ha->r_a_tov/10;
1333                 uint32_t ratov_j = msecs_to_jiffies(4 * ratov * 1000);
1334
1335                 WARN_ON_ONCE(sp->comp);
1336                 sp->comp = &comp;
1337                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1338                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1339                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1340                             __func__, ha->r_a_tov);
1341                         ret = FAILED;
1342                 } else {
1343                         ret = SUCCESS;
1344                 }
1345                 break;
1346         }
1347         default:
1348                 /*
1349                  * Either abort failed or abort and completion raced. Let
1350                  * the SCSI core retry the abort in the former case.
1351                  */
1352                 ret = FAILED;
1353                 break;
1354         }
1355
1356         sp->comp = NULL;
1357         atomic_dec(&sp->ref_count);
1358         ql_log(ql_log_info, vha, 0x801c,
1359             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1360             vha->host_no, id, lun, ret);
1361
1362         return ret;
1363 }
1364
1365 /*
1366  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1367  */
1368 int
1369 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1370         uint64_t l, enum nexus_wait_type type)
1371 {
1372         int cnt, match, status;
1373         unsigned long flags;
1374         struct qla_hw_data *ha = vha->hw;
1375         struct req_que *req;
1376         srb_t *sp;
1377         struct scsi_cmnd *cmd;
1378
1379         status = QLA_SUCCESS;
1380
1381         spin_lock_irqsave(&ha->hardware_lock, flags);
1382         req = vha->req;
1383         for (cnt = 1; status == QLA_SUCCESS &&
1384                 cnt < req->num_outstanding_cmds; cnt++) {
1385                 sp = req->outstanding_cmds[cnt];
1386                 if (!sp)
1387                         continue;
1388                 if (sp->type != SRB_SCSI_CMD)
1389                         continue;
1390                 if (vha->vp_idx != sp->vha->vp_idx)
1391                         continue;
1392                 match = 0;
1393                 cmd = GET_CMD_SP(sp);
1394                 switch (type) {
1395                 case WAIT_HOST:
1396                         match = 1;
1397                         break;
1398                 case WAIT_TARGET:
1399                         match = cmd->device->id == t;
1400                         break;
1401                 case WAIT_LUN:
1402                         match = (cmd->device->id == t &&
1403                                 cmd->device->lun == l);
1404                         break;
1405                 }
1406                 if (!match)
1407                         continue;
1408
1409                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1410                 status = qla2x00_eh_wait_on_command(cmd);
1411                 spin_lock_irqsave(&ha->hardware_lock, flags);
1412         }
1413         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1414
1415         return status;
1416 }
1417
1418 static char *reset_errors[] = {
1419         "HBA not online",
1420         "HBA not ready",
1421         "Task management failed",
1422         "Waiting for command completions",
1423 };
1424
1425 static int
1426 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1427     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1428 {
1429         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1430         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1431         int err;
1432
1433         if (!fcport) {
1434                 return FAILED;
1435         }
1436
1437         err = fc_block_scsi_eh(cmd);
1438         if (err != 0)
1439                 return err;
1440
1441         if (fcport->deleted)
1442                 return SUCCESS;
1443
1444         ql_log(ql_log_info, vha, 0x8009,
1445             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1446             cmd->device->id, cmd->device->lun, cmd);
1447
1448         err = 0;
1449         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1450                 ql_log(ql_log_warn, vha, 0x800a,
1451                     "Wait for hba online failed for cmd=%p.\n", cmd);
1452                 goto eh_reset_failed;
1453         }
1454         err = 2;
1455         if (do_reset(fcport, cmd->device->lun, 1)
1456                 != QLA_SUCCESS) {
1457                 ql_log(ql_log_warn, vha, 0x800c,
1458                     "do_reset failed for cmd=%p.\n", cmd);
1459                 goto eh_reset_failed;
1460         }
1461         err = 3;
1462         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1463             cmd->device->lun, type) != QLA_SUCCESS) {
1464                 ql_log(ql_log_warn, vha, 0x800d,
1465                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1466                 goto eh_reset_failed;
1467         }
1468
1469         ql_log(ql_log_info, vha, 0x800e,
1470             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1471             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1472
1473         return SUCCESS;
1474
1475 eh_reset_failed:
1476         ql_log(ql_log_info, vha, 0x800f,
1477             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1478             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1479             cmd);
1480         return FAILED;
1481 }
1482
1483 static int
1484 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1485 {
1486         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1487         struct qla_hw_data *ha = vha->hw;
1488
1489         if (qla2x00_isp_reg_stat(ha)) {
1490                 ql_log(ql_log_info, vha, 0x803e,
1491                     "PCI/Register disconnect, exiting.\n");
1492                 return FAILED;
1493         }
1494
1495         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1496             ha->isp_ops->lun_reset);
1497 }
1498
1499 static int
1500 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1501 {
1502         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1503         struct qla_hw_data *ha = vha->hw;
1504
1505         if (qla2x00_isp_reg_stat(ha)) {
1506                 ql_log(ql_log_info, vha, 0x803f,
1507                     "PCI/Register disconnect, exiting.\n");
1508                 return FAILED;
1509         }
1510
1511         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1512             ha->isp_ops->target_reset);
1513 }
1514
1515 /**************************************************************************
1516 * qla2xxx_eh_bus_reset
1517 *
1518 * Description:
1519 *    The bus reset function will reset the bus and abort any executing
1520 *    commands.
1521 *
1522 * Input:
1523 *    cmd = Linux SCSI command packet of the command that cause the
1524 *          bus reset.
1525 *
1526 * Returns:
1527 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1528 *
1529 **************************************************************************/
1530 static int
1531 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1532 {
1533         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1534         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1535         int ret = FAILED;
1536         unsigned int id;
1537         uint64_t lun;
1538         struct qla_hw_data *ha = vha->hw;
1539
1540         if (qla2x00_isp_reg_stat(ha)) {
1541                 ql_log(ql_log_info, vha, 0x8040,
1542                     "PCI/Register disconnect, exiting.\n");
1543                 return FAILED;
1544         }
1545
1546         id = cmd->device->id;
1547         lun = cmd->device->lun;
1548
1549         if (!fcport) {
1550                 return ret;
1551         }
1552
1553         ret = fc_block_scsi_eh(cmd);
1554         if (ret != 0)
1555                 return ret;
1556         ret = FAILED;
1557
1558         if (qla2x00_chip_is_down(vha))
1559                 return ret;
1560
1561         ql_log(ql_log_info, vha, 0x8012,
1562             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1563
1564         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1565                 ql_log(ql_log_fatal, vha, 0x8013,
1566                     "Wait for hba online failed board disabled.\n");
1567                 goto eh_bus_reset_done;
1568         }
1569
1570         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1571                 ret = SUCCESS;
1572
1573         if (ret == FAILED)
1574                 goto eh_bus_reset_done;
1575
1576         /* Flush outstanding commands. */
1577         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1578             QLA_SUCCESS) {
1579                 ql_log(ql_log_warn, vha, 0x8014,
1580                     "Wait for pending commands failed.\n");
1581                 ret = FAILED;
1582         }
1583
1584 eh_bus_reset_done:
1585         ql_log(ql_log_warn, vha, 0x802b,
1586             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1587             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1588
1589         return ret;
1590 }
1591
1592 /**************************************************************************
1593 * qla2xxx_eh_host_reset
1594 *
1595 * Description:
1596 *    The reset function will reset the Adapter.
1597 *
1598 * Input:
1599 *      cmd = Linux SCSI command packet of the command that cause the
1600 *            adapter reset.
1601 *
1602 * Returns:
1603 *      Either SUCCESS or FAILED.
1604 *
1605 * Note:
1606 **************************************************************************/
1607 static int
1608 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1609 {
1610         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1611         struct qla_hw_data *ha = vha->hw;
1612         int ret = FAILED;
1613         unsigned int id;
1614         uint64_t lun;
1615         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1616
1617         if (qla2x00_isp_reg_stat(ha)) {
1618                 ql_log(ql_log_info, vha, 0x8041,
1619                     "PCI/Register disconnect, exiting.\n");
1620                 schedule_work(&ha->board_disable);
1621                 return SUCCESS;
1622         }
1623
1624         id = cmd->device->id;
1625         lun = cmd->device->lun;
1626
1627         ql_log(ql_log_info, vha, 0x8018,
1628             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1629
1630         /*
1631          * No point in issuing another reset if one is active.  Also do not
1632          * attempt a reset if we are updating flash.
1633          */
1634         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1635                 goto eh_host_reset_lock;
1636
1637         if (vha != base_vha) {
1638                 if (qla2x00_vp_abort_isp(vha))
1639                         goto eh_host_reset_lock;
1640         } else {
1641                 if (IS_P3P_TYPE(vha->hw)) {
1642                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1643                                 /* Ctx reset success */
1644                                 ret = SUCCESS;
1645                                 goto eh_host_reset_lock;
1646                         }
1647                         /* fall thru if ctx reset failed */
1648                 }
1649                 if (ha->wq)
1650                         flush_workqueue(ha->wq);
1651
1652                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1653                 if (ha->isp_ops->abort_isp(base_vha)) {
1654                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1655                         /* failed. schedule dpc to try */
1656                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1657
1658                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1659                                 ql_log(ql_log_warn, vha, 0x802a,
1660                                     "wait for hba online failed.\n");
1661                                 goto eh_host_reset_lock;
1662                         }
1663                 }
1664                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1665         }
1666
1667         /* Waiting for command to be returned to OS.*/
1668         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1669                 QLA_SUCCESS)
1670                 ret = SUCCESS;
1671
1672 eh_host_reset_lock:
1673         ql_log(ql_log_info, vha, 0x8017,
1674             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1675             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1676
1677         return ret;
1678 }
1679
1680 /*
1681 * qla2x00_loop_reset
1682 *      Issue loop reset.
1683 *
1684 * Input:
1685 *      ha = adapter block pointer.
1686 *
1687 * Returns:
1688 *      0 = success
1689 */
1690 int
1691 qla2x00_loop_reset(scsi_qla_host_t *vha)
1692 {
1693         int ret;
1694         struct fc_port *fcport;
1695         struct qla_hw_data *ha = vha->hw;
1696
1697         if (IS_QLAFX00(ha)) {
1698                 return qlafx00_loop_reset(vha);
1699         }
1700
1701         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1702                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1703                         if (fcport->port_type != FCT_TARGET)
1704                                 continue;
1705
1706                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1707                         if (ret != QLA_SUCCESS) {
1708                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1709                                     "Bus Reset failed: Reset=%d "
1710                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1711                         }
1712                 }
1713         }
1714
1715
1716         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1717                 atomic_set(&vha->loop_state, LOOP_DOWN);
1718                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1719                 qla2x00_mark_all_devices_lost(vha, 0);
1720                 ret = qla2x00_full_login_lip(vha);
1721                 if (ret != QLA_SUCCESS) {
1722                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1723                             "full_login_lip=%d.\n", ret);
1724                 }
1725         }
1726
1727         if (ha->flags.enable_lip_reset) {
1728                 ret = qla2x00_lip_reset(vha);
1729                 if (ret != QLA_SUCCESS)
1730                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1731                             "lip_reset failed (%d).\n", ret);
1732         }
1733
1734         /* Issue marker command only when we are going to start the I/O */
1735         vha->marker_needed = 1;
1736
1737         return QLA_SUCCESS;
1738 }
1739
1740 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1741                               unsigned long *flags)
1742         __releases(qp->qp_lock_ptr)
1743         __acquires(qp->qp_lock_ptr)
1744 {
1745         DECLARE_COMPLETION_ONSTACK(comp);
1746         scsi_qla_host_t *vha = qp->vha;
1747         struct qla_hw_data *ha = vha->hw;
1748         int rval;
1749
1750         if (sp_get(sp))
1751                 return;
1752
1753         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1754             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1755              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1756              !qla2x00_isp_reg_stat(ha))) {
1757                 sp->comp = &comp;
1758                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1759                 rval = ha->isp_ops->abort_command(sp);
1760
1761                 switch (rval) {
1762                 case QLA_SUCCESS:
1763                         sp->done(sp, res);
1764                         break;
1765                 case QLA_FUNCTION_PARAMETER_ERROR:
1766                         wait_for_completion(&comp);
1767                         break;
1768                 }
1769
1770                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1771                 sp->comp = NULL;
1772         }
1773
1774         atomic_dec(&sp->ref_count);
1775 }
1776
1777 static void
1778 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1779 {
1780         int cnt;
1781         unsigned long flags;
1782         srb_t *sp;
1783         scsi_qla_host_t *vha = qp->vha;
1784         struct qla_hw_data *ha = vha->hw;
1785         struct req_que *req;
1786         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1787         struct qla_tgt_cmd *cmd;
1788
1789         if (!ha->req_q_map)
1790                 return;
1791         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1792         req = qp->req;
1793         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1794                 sp = req->outstanding_cmds[cnt];
1795                 if (sp) {
1796                         req->outstanding_cmds[cnt] = NULL;
1797                         switch (sp->cmd_type) {
1798                         case TYPE_SRB:
1799                                 qla2x00_abort_srb(qp, sp, res, &flags);
1800                                 break;
1801                         case TYPE_TGT_CMD:
1802                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1803                                     qla_ini_mode_enabled(vha)) {
1804                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1805                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1806                                             vha->dpc_flags);
1807                                         continue;
1808                                 }
1809                                 cmd = (struct qla_tgt_cmd *)sp;
1810                                 cmd->aborted = 1;
1811                                 break;
1812                         case TYPE_TGT_TMCMD:
1813                                 /* Skip task management functions. */
1814                                 break;
1815                         default:
1816                                 break;
1817                         }
1818                 }
1819         }
1820         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1821 }
1822
1823 void
1824 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1825 {
1826         int que;
1827         struct qla_hw_data *ha = vha->hw;
1828
1829         /* Continue only if initialization complete. */
1830         if (!ha->base_qpair)
1831                 return;
1832         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1833
1834         if (!ha->queue_pair_map)
1835                 return;
1836         for (que = 0; que < ha->max_qpairs; que++) {
1837                 if (!ha->queue_pair_map[que])
1838                         continue;
1839
1840                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1841         }
1842 }
1843
1844 static int
1845 qla2xxx_slave_alloc(struct scsi_device *sdev)
1846 {
1847         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1848
1849         if (!rport || fc_remote_port_chkready(rport))
1850                 return -ENXIO;
1851
1852         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1853
1854         return 0;
1855 }
1856
1857 static int
1858 qla2xxx_slave_configure(struct scsi_device *sdev)
1859 {
1860         scsi_qla_host_t *vha = shost_priv(sdev->host);
1861         struct req_que *req = vha->req;
1862
1863         if (IS_T10_PI_CAPABLE(vha->hw))
1864                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1865
1866         scsi_change_queue_depth(sdev, req->max_q_depth);
1867         return 0;
1868 }
1869
1870 static void
1871 qla2xxx_slave_destroy(struct scsi_device *sdev)
1872 {
1873         sdev->hostdata = NULL;
1874 }
1875
1876 /**
1877  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1878  * @ha: HA context
1879  *
1880  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1881  * supported addressing method.
1882  */
1883 static void
1884 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1885 {
1886         /* Assume a 32bit DMA mask. */
1887         ha->flags.enable_64bit_addressing = 0;
1888
1889         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1890                 /* Any upper-dword bits set? */
1891                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1892                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1893                         /* Ok, a 64bit DMA mask is applicable. */
1894                         ha->flags.enable_64bit_addressing = 1;
1895                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1896                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1897                         return;
1898                 }
1899         }
1900
1901         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1902         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1903 }
1904
1905 static void
1906 qla2x00_enable_intrs(struct qla_hw_data *ha)
1907 {
1908         unsigned long flags = 0;
1909         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1910
1911         spin_lock_irqsave(&ha->hardware_lock, flags);
1912         ha->interrupts_on = 1;
1913         /* enable risc and host interrupts */
1914         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1915         RD_REG_WORD(&reg->ictrl);
1916         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1917
1918 }
1919
1920 static void
1921 qla2x00_disable_intrs(struct qla_hw_data *ha)
1922 {
1923         unsigned long flags = 0;
1924         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1925
1926         spin_lock_irqsave(&ha->hardware_lock, flags);
1927         ha->interrupts_on = 0;
1928         /* disable risc and host interrupts */
1929         WRT_REG_WORD(&reg->ictrl, 0);
1930         RD_REG_WORD(&reg->ictrl);
1931         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1932 }
1933
1934 static void
1935 qla24xx_enable_intrs(struct qla_hw_data *ha)
1936 {
1937         unsigned long flags = 0;
1938         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1939
1940         spin_lock_irqsave(&ha->hardware_lock, flags);
1941         ha->interrupts_on = 1;
1942         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1943         RD_REG_DWORD(&reg->ictrl);
1944         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1945 }
1946
1947 static void
1948 qla24xx_disable_intrs(struct qla_hw_data *ha)
1949 {
1950         unsigned long flags = 0;
1951         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1952
1953         if (IS_NOPOLLING_TYPE(ha))
1954                 return;
1955         spin_lock_irqsave(&ha->hardware_lock, flags);
1956         ha->interrupts_on = 0;
1957         WRT_REG_DWORD(&reg->ictrl, 0);
1958         RD_REG_DWORD(&reg->ictrl);
1959         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1960 }
1961
1962 static int
1963 qla2x00_iospace_config(struct qla_hw_data *ha)
1964 {
1965         resource_size_t pio;
1966         uint16_t msix;
1967
1968         if (pci_request_selected_regions(ha->pdev, ha->bars,
1969             QLA2XXX_DRIVER_NAME)) {
1970                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1971                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1972                     pci_name(ha->pdev));
1973                 goto iospace_error_exit;
1974         }
1975         if (!(ha->bars & 1))
1976                 goto skip_pio;
1977
1978         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1979         pio = pci_resource_start(ha->pdev, 0);
1980         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1981                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1982                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1983                             "Invalid pci I/O region size (%s).\n",
1984                             pci_name(ha->pdev));
1985                         pio = 0;
1986                 }
1987         } else {
1988                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1989                     "Region #0 no a PIO resource (%s).\n",
1990                     pci_name(ha->pdev));
1991                 pio = 0;
1992         }
1993         ha->pio_address = pio;
1994         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1995             "PIO address=%llu.\n",
1996             (unsigned long long)ha->pio_address);
1997
1998 skip_pio:
1999         /* Use MMIO operations for all accesses. */
2000         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
2001                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
2002                     "Region #1 not an MMIO resource (%s), aborting.\n",
2003                     pci_name(ha->pdev));
2004                 goto iospace_error_exit;
2005         }
2006         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2007                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2008                     "Invalid PCI mem region size (%s), aborting.\n",
2009                     pci_name(ha->pdev));
2010                 goto iospace_error_exit;
2011         }
2012
2013         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2014         if (!ha->iobase) {
2015                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2016                     "Cannot remap MMIO (%s), aborting.\n",
2017                     pci_name(ha->pdev));
2018                 goto iospace_error_exit;
2019         }
2020
2021         /* Determine queue resources */
2022         ha->max_req_queues = ha->max_rsp_queues = 1;
2023         ha->msix_count = QLA_BASE_VECTORS;
2024         if (!ql2xmqsupport || !ql2xnvmeenable ||
2025             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2026                 goto mqiobase_exit;
2027
2028         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2029                         pci_resource_len(ha->pdev, 3));
2030         if (ha->mqiobase) {
2031                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2032                     "MQIO Base=%p.\n", ha->mqiobase);
2033                 /* Read MSIX vector size of the board */
2034                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2035                 ha->msix_count = msix + 1;
2036                 /* Max queues are bounded by available msix vectors */
2037                 /* MB interrupt uses 1 vector */
2038                 ha->max_req_queues = ha->msix_count - 1;
2039                 ha->max_rsp_queues = ha->max_req_queues;
2040                 /* Queue pairs is the max value minus the base queue pair */
2041                 ha->max_qpairs = ha->max_rsp_queues - 1;
2042                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2043                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2044
2045                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2046                     "MSI-X vector count: %d.\n", ha->msix_count);
2047         } else
2048                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2049                     "BAR 3 not enabled.\n");
2050
2051 mqiobase_exit:
2052         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2053             "MSIX Count: %d.\n", ha->msix_count);
2054         return (0);
2055
2056 iospace_error_exit:
2057         return (-ENOMEM);
2058 }
2059
2060
2061 static int
2062 qla83xx_iospace_config(struct qla_hw_data *ha)
2063 {
2064         uint16_t msix;
2065
2066         if (pci_request_selected_regions(ha->pdev, ha->bars,
2067             QLA2XXX_DRIVER_NAME)) {
2068                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2069                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2070                     pci_name(ha->pdev));
2071
2072                 goto iospace_error_exit;
2073         }
2074
2075         /* Use MMIO operations for all accesses. */
2076         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2077                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2078                     "Invalid pci I/O region size (%s).\n",
2079                     pci_name(ha->pdev));
2080                 goto iospace_error_exit;
2081         }
2082         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2083                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2084                     "Invalid PCI mem region size (%s), aborting\n",
2085                         pci_name(ha->pdev));
2086                 goto iospace_error_exit;
2087         }
2088
2089         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2090         if (!ha->iobase) {
2091                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2092                     "Cannot remap MMIO (%s), aborting.\n",
2093                     pci_name(ha->pdev));
2094                 goto iospace_error_exit;
2095         }
2096
2097         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2098         /* 83XX 26XX always use MQ type access for queues
2099          * - mbar 2, a.k.a region 4 */
2100         ha->max_req_queues = ha->max_rsp_queues = 1;
2101         ha->msix_count = QLA_BASE_VECTORS;
2102         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2103                         pci_resource_len(ha->pdev, 4));
2104
2105         if (!ha->mqiobase) {
2106                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2107                     "BAR2/region4 not enabled\n");
2108                 goto mqiobase_exit;
2109         }
2110
2111         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2112                         pci_resource_len(ha->pdev, 2));
2113         if (ha->msixbase) {
2114                 /* Read MSIX vector size of the board */
2115                 pci_read_config_word(ha->pdev,
2116                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2117                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2118                 /*
2119                  * By default, driver uses at least two msix vectors
2120                  * (default & rspq)
2121                  */
2122                 if (ql2xmqsupport || ql2xnvmeenable) {
2123                         /* MB interrupt uses 1 vector */
2124                         ha->max_req_queues = ha->msix_count - 1;
2125
2126                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2127                         if (QLA_TGT_MODE_ENABLED())
2128                                 ha->max_req_queues--;
2129
2130                         ha->max_rsp_queues = ha->max_req_queues;
2131
2132                         /* Queue pairs is the max value minus
2133                          * the base queue pair */
2134                         ha->max_qpairs = ha->max_req_queues - 1;
2135                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2136                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2137                 }
2138                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2139                     "MSI-X vector count: %d.\n", ha->msix_count);
2140         } else
2141                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2142                     "BAR 1 not enabled.\n");
2143
2144 mqiobase_exit:
2145         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2146             "MSIX Count: %d.\n", ha->msix_count);
2147         return 0;
2148
2149 iospace_error_exit:
2150         return -ENOMEM;
2151 }
2152
2153 static struct isp_operations qla2100_isp_ops = {
2154         .pci_config             = qla2100_pci_config,
2155         .reset_chip             = qla2x00_reset_chip,
2156         .chip_diag              = qla2x00_chip_diag,
2157         .config_rings           = qla2x00_config_rings,
2158         .reset_adapter          = qla2x00_reset_adapter,
2159         .nvram_config           = qla2x00_nvram_config,
2160         .update_fw_options      = qla2x00_update_fw_options,
2161         .load_risc              = qla2x00_load_risc,
2162         .pci_info_str           = qla2x00_pci_info_str,
2163         .fw_version_str         = qla2x00_fw_version_str,
2164         .intr_handler           = qla2100_intr_handler,
2165         .enable_intrs           = qla2x00_enable_intrs,
2166         .disable_intrs          = qla2x00_disable_intrs,
2167         .abort_command          = qla2x00_abort_command,
2168         .target_reset           = qla2x00_abort_target,
2169         .lun_reset              = qla2x00_lun_reset,
2170         .fabric_login           = qla2x00_login_fabric,
2171         .fabric_logout          = qla2x00_fabric_logout,
2172         .calc_req_entries       = qla2x00_calc_iocbs_32,
2173         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2174         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2175         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2176         .read_nvram             = qla2x00_read_nvram_data,
2177         .write_nvram            = qla2x00_write_nvram_data,
2178         .fw_dump                = qla2100_fw_dump,
2179         .beacon_on              = NULL,
2180         .beacon_off             = NULL,
2181         .beacon_blink           = NULL,
2182         .read_optrom            = qla2x00_read_optrom_data,
2183         .write_optrom           = qla2x00_write_optrom_data,
2184         .get_flash_version      = qla2x00_get_flash_version,
2185         .start_scsi             = qla2x00_start_scsi,
2186         .start_scsi_mq          = NULL,
2187         .abort_isp              = qla2x00_abort_isp,
2188         .iospace_config         = qla2x00_iospace_config,
2189         .initialize_adapter     = qla2x00_initialize_adapter,
2190 };
2191
2192 static struct isp_operations qla2300_isp_ops = {
2193         .pci_config             = qla2300_pci_config,
2194         .reset_chip             = qla2x00_reset_chip,
2195         .chip_diag              = qla2x00_chip_diag,
2196         .config_rings           = qla2x00_config_rings,
2197         .reset_adapter          = qla2x00_reset_adapter,
2198         .nvram_config           = qla2x00_nvram_config,
2199         .update_fw_options      = qla2x00_update_fw_options,
2200         .load_risc              = qla2x00_load_risc,
2201         .pci_info_str           = qla2x00_pci_info_str,
2202         .fw_version_str         = qla2x00_fw_version_str,
2203         .intr_handler           = qla2300_intr_handler,
2204         .enable_intrs           = qla2x00_enable_intrs,
2205         .disable_intrs          = qla2x00_disable_intrs,
2206         .abort_command          = qla2x00_abort_command,
2207         .target_reset           = qla2x00_abort_target,
2208         .lun_reset              = qla2x00_lun_reset,
2209         .fabric_login           = qla2x00_login_fabric,
2210         .fabric_logout          = qla2x00_fabric_logout,
2211         .calc_req_entries       = qla2x00_calc_iocbs_32,
2212         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2213         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2214         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2215         .read_nvram             = qla2x00_read_nvram_data,
2216         .write_nvram            = qla2x00_write_nvram_data,
2217         .fw_dump                = qla2300_fw_dump,
2218         .beacon_on              = qla2x00_beacon_on,
2219         .beacon_off             = qla2x00_beacon_off,
2220         .beacon_blink           = qla2x00_beacon_blink,
2221         .read_optrom            = qla2x00_read_optrom_data,
2222         .write_optrom           = qla2x00_write_optrom_data,
2223         .get_flash_version      = qla2x00_get_flash_version,
2224         .start_scsi             = qla2x00_start_scsi,
2225         .start_scsi_mq          = NULL,
2226         .abort_isp              = qla2x00_abort_isp,
2227         .iospace_config         = qla2x00_iospace_config,
2228         .initialize_adapter     = qla2x00_initialize_adapter,
2229 };
2230
2231 static struct isp_operations qla24xx_isp_ops = {
2232         .pci_config             = qla24xx_pci_config,
2233         .reset_chip             = qla24xx_reset_chip,
2234         .chip_diag              = qla24xx_chip_diag,
2235         .config_rings           = qla24xx_config_rings,
2236         .reset_adapter          = qla24xx_reset_adapter,
2237         .nvram_config           = qla24xx_nvram_config,
2238         .update_fw_options      = qla24xx_update_fw_options,
2239         .load_risc              = qla24xx_load_risc,
2240         .pci_info_str           = qla24xx_pci_info_str,
2241         .fw_version_str         = qla24xx_fw_version_str,
2242         .intr_handler           = qla24xx_intr_handler,
2243         .enable_intrs           = qla24xx_enable_intrs,
2244         .disable_intrs          = qla24xx_disable_intrs,
2245         .abort_command          = qla24xx_abort_command,
2246         .target_reset           = qla24xx_abort_target,
2247         .lun_reset              = qla24xx_lun_reset,
2248         .fabric_login           = qla24xx_login_fabric,
2249         .fabric_logout          = qla24xx_fabric_logout,
2250         .calc_req_entries       = NULL,
2251         .build_iocbs            = NULL,
2252         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2253         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2254         .read_nvram             = qla24xx_read_nvram_data,
2255         .write_nvram            = qla24xx_write_nvram_data,
2256         .fw_dump                = qla24xx_fw_dump,
2257         .beacon_on              = qla24xx_beacon_on,
2258         .beacon_off             = qla24xx_beacon_off,
2259         .beacon_blink           = qla24xx_beacon_blink,
2260         .read_optrom            = qla24xx_read_optrom_data,
2261         .write_optrom           = qla24xx_write_optrom_data,
2262         .get_flash_version      = qla24xx_get_flash_version,
2263         .start_scsi             = qla24xx_start_scsi,
2264         .start_scsi_mq          = NULL,
2265         .abort_isp              = qla2x00_abort_isp,
2266         .iospace_config         = qla2x00_iospace_config,
2267         .initialize_adapter     = qla2x00_initialize_adapter,
2268 };
2269
2270 static struct isp_operations qla25xx_isp_ops = {
2271         .pci_config             = qla25xx_pci_config,
2272         .reset_chip             = qla24xx_reset_chip,
2273         .chip_diag              = qla24xx_chip_diag,
2274         .config_rings           = qla24xx_config_rings,
2275         .reset_adapter          = qla24xx_reset_adapter,
2276         .nvram_config           = qla24xx_nvram_config,
2277         .update_fw_options      = qla24xx_update_fw_options,
2278         .load_risc              = qla24xx_load_risc,
2279         .pci_info_str           = qla24xx_pci_info_str,
2280         .fw_version_str         = qla24xx_fw_version_str,
2281         .intr_handler           = qla24xx_intr_handler,
2282         .enable_intrs           = qla24xx_enable_intrs,
2283         .disable_intrs          = qla24xx_disable_intrs,
2284         .abort_command          = qla24xx_abort_command,
2285         .target_reset           = qla24xx_abort_target,
2286         .lun_reset              = qla24xx_lun_reset,
2287         .fabric_login           = qla24xx_login_fabric,
2288         .fabric_logout          = qla24xx_fabric_logout,
2289         .calc_req_entries       = NULL,
2290         .build_iocbs            = NULL,
2291         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2292         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2293         .read_nvram             = qla25xx_read_nvram_data,
2294         .write_nvram            = qla25xx_write_nvram_data,
2295         .fw_dump                = qla25xx_fw_dump,
2296         .beacon_on              = qla24xx_beacon_on,
2297         .beacon_off             = qla24xx_beacon_off,
2298         .beacon_blink           = qla24xx_beacon_blink,
2299         .read_optrom            = qla25xx_read_optrom_data,
2300         .write_optrom           = qla24xx_write_optrom_data,
2301         .get_flash_version      = qla24xx_get_flash_version,
2302         .start_scsi             = qla24xx_dif_start_scsi,
2303         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2304         .abort_isp              = qla2x00_abort_isp,
2305         .iospace_config         = qla2x00_iospace_config,
2306         .initialize_adapter     = qla2x00_initialize_adapter,
2307 };
2308
2309 static struct isp_operations qla81xx_isp_ops = {
2310         .pci_config             = qla25xx_pci_config,
2311         .reset_chip             = qla24xx_reset_chip,
2312         .chip_diag              = qla24xx_chip_diag,
2313         .config_rings           = qla24xx_config_rings,
2314         .reset_adapter          = qla24xx_reset_adapter,
2315         .nvram_config           = qla81xx_nvram_config,
2316         .update_fw_options      = qla81xx_update_fw_options,
2317         .load_risc              = qla81xx_load_risc,
2318         .pci_info_str           = qla24xx_pci_info_str,
2319         .fw_version_str         = qla24xx_fw_version_str,
2320         .intr_handler           = qla24xx_intr_handler,
2321         .enable_intrs           = qla24xx_enable_intrs,
2322         .disable_intrs          = qla24xx_disable_intrs,
2323         .abort_command          = qla24xx_abort_command,
2324         .target_reset           = qla24xx_abort_target,
2325         .lun_reset              = qla24xx_lun_reset,
2326         .fabric_login           = qla24xx_login_fabric,
2327         .fabric_logout          = qla24xx_fabric_logout,
2328         .calc_req_entries       = NULL,
2329         .build_iocbs            = NULL,
2330         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2331         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2332         .read_nvram             = NULL,
2333         .write_nvram            = NULL,
2334         .fw_dump                = qla81xx_fw_dump,
2335         .beacon_on              = qla24xx_beacon_on,
2336         .beacon_off             = qla24xx_beacon_off,
2337         .beacon_blink           = qla83xx_beacon_blink,
2338         .read_optrom            = qla25xx_read_optrom_data,
2339         .write_optrom           = qla24xx_write_optrom_data,
2340         .get_flash_version      = qla24xx_get_flash_version,
2341         .start_scsi             = qla24xx_dif_start_scsi,
2342         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2343         .abort_isp              = qla2x00_abort_isp,
2344         .iospace_config         = qla2x00_iospace_config,
2345         .initialize_adapter     = qla2x00_initialize_adapter,
2346 };
2347
2348 static struct isp_operations qla82xx_isp_ops = {
2349         .pci_config             = qla82xx_pci_config,
2350         .reset_chip             = qla82xx_reset_chip,
2351         .chip_diag              = qla24xx_chip_diag,
2352         .config_rings           = qla82xx_config_rings,
2353         .reset_adapter          = qla24xx_reset_adapter,
2354         .nvram_config           = qla81xx_nvram_config,
2355         .update_fw_options      = qla24xx_update_fw_options,
2356         .load_risc              = qla82xx_load_risc,
2357         .pci_info_str           = qla24xx_pci_info_str,
2358         .fw_version_str         = qla24xx_fw_version_str,
2359         .intr_handler           = qla82xx_intr_handler,
2360         .enable_intrs           = qla82xx_enable_intrs,
2361         .disable_intrs          = qla82xx_disable_intrs,
2362         .abort_command          = qla24xx_abort_command,
2363         .target_reset           = qla24xx_abort_target,
2364         .lun_reset              = qla24xx_lun_reset,
2365         .fabric_login           = qla24xx_login_fabric,
2366         .fabric_logout          = qla24xx_fabric_logout,
2367         .calc_req_entries       = NULL,
2368         .build_iocbs            = NULL,
2369         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2370         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2371         .read_nvram             = qla24xx_read_nvram_data,
2372         .write_nvram            = qla24xx_write_nvram_data,
2373         .fw_dump                = qla82xx_fw_dump,
2374         .beacon_on              = qla82xx_beacon_on,
2375         .beacon_off             = qla82xx_beacon_off,
2376         .beacon_blink           = NULL,
2377         .read_optrom            = qla82xx_read_optrom_data,
2378         .write_optrom           = qla82xx_write_optrom_data,
2379         .get_flash_version      = qla82xx_get_flash_version,
2380         .start_scsi             = qla82xx_start_scsi,
2381         .start_scsi_mq          = NULL,
2382         .abort_isp              = qla82xx_abort_isp,
2383         .iospace_config         = qla82xx_iospace_config,
2384         .initialize_adapter     = qla2x00_initialize_adapter,
2385 };
2386
2387 static struct isp_operations qla8044_isp_ops = {
2388         .pci_config             = qla82xx_pci_config,
2389         .reset_chip             = qla82xx_reset_chip,
2390         .chip_diag              = qla24xx_chip_diag,
2391         .config_rings           = qla82xx_config_rings,
2392         .reset_adapter          = qla24xx_reset_adapter,
2393         .nvram_config           = qla81xx_nvram_config,
2394         .update_fw_options      = qla24xx_update_fw_options,
2395         .load_risc              = qla82xx_load_risc,
2396         .pci_info_str           = qla24xx_pci_info_str,
2397         .fw_version_str         = qla24xx_fw_version_str,
2398         .intr_handler           = qla8044_intr_handler,
2399         .enable_intrs           = qla82xx_enable_intrs,
2400         .disable_intrs          = qla82xx_disable_intrs,
2401         .abort_command          = qla24xx_abort_command,
2402         .target_reset           = qla24xx_abort_target,
2403         .lun_reset              = qla24xx_lun_reset,
2404         .fabric_login           = qla24xx_login_fabric,
2405         .fabric_logout          = qla24xx_fabric_logout,
2406         .calc_req_entries       = NULL,
2407         .build_iocbs            = NULL,
2408         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2409         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2410         .read_nvram             = NULL,
2411         .write_nvram            = NULL,
2412         .fw_dump                = qla8044_fw_dump,
2413         .beacon_on              = qla82xx_beacon_on,
2414         .beacon_off             = qla82xx_beacon_off,
2415         .beacon_blink           = NULL,
2416         .read_optrom            = qla8044_read_optrom_data,
2417         .write_optrom           = qla8044_write_optrom_data,
2418         .get_flash_version      = qla82xx_get_flash_version,
2419         .start_scsi             = qla82xx_start_scsi,
2420         .start_scsi_mq          = NULL,
2421         .abort_isp              = qla8044_abort_isp,
2422         .iospace_config         = qla82xx_iospace_config,
2423         .initialize_adapter     = qla2x00_initialize_adapter,
2424 };
2425
2426 static struct isp_operations qla83xx_isp_ops = {
2427         .pci_config             = qla25xx_pci_config,
2428         .reset_chip             = qla24xx_reset_chip,
2429         .chip_diag              = qla24xx_chip_diag,
2430         .config_rings           = qla24xx_config_rings,
2431         .reset_adapter          = qla24xx_reset_adapter,
2432         .nvram_config           = qla81xx_nvram_config,
2433         .update_fw_options      = qla81xx_update_fw_options,
2434         .load_risc              = qla81xx_load_risc,
2435         .pci_info_str           = qla24xx_pci_info_str,
2436         .fw_version_str         = qla24xx_fw_version_str,
2437         .intr_handler           = qla24xx_intr_handler,
2438         .enable_intrs           = qla24xx_enable_intrs,
2439         .disable_intrs          = qla24xx_disable_intrs,
2440         .abort_command          = qla24xx_abort_command,
2441         .target_reset           = qla24xx_abort_target,
2442         .lun_reset              = qla24xx_lun_reset,
2443         .fabric_login           = qla24xx_login_fabric,
2444         .fabric_logout          = qla24xx_fabric_logout,
2445         .calc_req_entries       = NULL,
2446         .build_iocbs            = NULL,
2447         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2448         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2449         .read_nvram             = NULL,
2450         .write_nvram            = NULL,
2451         .fw_dump                = qla83xx_fw_dump,
2452         .beacon_on              = qla24xx_beacon_on,
2453         .beacon_off             = qla24xx_beacon_off,
2454         .beacon_blink           = qla83xx_beacon_blink,
2455         .read_optrom            = qla25xx_read_optrom_data,
2456         .write_optrom           = qla24xx_write_optrom_data,
2457         .get_flash_version      = qla24xx_get_flash_version,
2458         .start_scsi             = qla24xx_dif_start_scsi,
2459         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2460         .abort_isp              = qla2x00_abort_isp,
2461         .iospace_config         = qla83xx_iospace_config,
2462         .initialize_adapter     = qla2x00_initialize_adapter,
2463 };
2464
2465 static struct isp_operations qlafx00_isp_ops = {
2466         .pci_config             = qlafx00_pci_config,
2467         .reset_chip             = qlafx00_soft_reset,
2468         .chip_diag              = qlafx00_chip_diag,
2469         .config_rings           = qlafx00_config_rings,
2470         .reset_adapter          = qlafx00_soft_reset,
2471         .nvram_config           = NULL,
2472         .update_fw_options      = NULL,
2473         .load_risc              = NULL,
2474         .pci_info_str           = qlafx00_pci_info_str,
2475         .fw_version_str         = qlafx00_fw_version_str,
2476         .intr_handler           = qlafx00_intr_handler,
2477         .enable_intrs           = qlafx00_enable_intrs,
2478         .disable_intrs          = qlafx00_disable_intrs,
2479         .abort_command          = qla24xx_async_abort_command,
2480         .target_reset           = qlafx00_abort_target,
2481         .lun_reset              = qlafx00_lun_reset,
2482         .fabric_login           = NULL,
2483         .fabric_logout          = NULL,
2484         .calc_req_entries       = NULL,
2485         .build_iocbs            = NULL,
2486         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2487         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2488         .read_nvram             = qla24xx_read_nvram_data,
2489         .write_nvram            = qla24xx_write_nvram_data,
2490         .fw_dump                = NULL,
2491         .beacon_on              = qla24xx_beacon_on,
2492         .beacon_off             = qla24xx_beacon_off,
2493         .beacon_blink           = NULL,
2494         .read_optrom            = qla24xx_read_optrom_data,
2495         .write_optrom           = qla24xx_write_optrom_data,
2496         .get_flash_version      = qla24xx_get_flash_version,
2497         .start_scsi             = qlafx00_start_scsi,
2498         .start_scsi_mq          = NULL,
2499         .abort_isp              = qlafx00_abort_isp,
2500         .iospace_config         = qlafx00_iospace_config,
2501         .initialize_adapter     = qlafx00_initialize_adapter,
2502 };
2503
2504 static struct isp_operations qla27xx_isp_ops = {
2505         .pci_config             = qla25xx_pci_config,
2506         .reset_chip             = qla24xx_reset_chip,
2507         .chip_diag              = qla24xx_chip_diag,
2508         .config_rings           = qla24xx_config_rings,
2509         .reset_adapter          = qla24xx_reset_adapter,
2510         .nvram_config           = qla81xx_nvram_config,
2511         .update_fw_options      = qla24xx_update_fw_options,
2512         .load_risc              = qla81xx_load_risc,
2513         .pci_info_str           = qla24xx_pci_info_str,
2514         .fw_version_str         = qla24xx_fw_version_str,
2515         .intr_handler           = qla24xx_intr_handler,
2516         .enable_intrs           = qla24xx_enable_intrs,
2517         .disable_intrs          = qla24xx_disable_intrs,
2518         .abort_command          = qla24xx_abort_command,
2519         .target_reset           = qla24xx_abort_target,
2520         .lun_reset              = qla24xx_lun_reset,
2521         .fabric_login           = qla24xx_login_fabric,
2522         .fabric_logout          = qla24xx_fabric_logout,
2523         .calc_req_entries       = NULL,
2524         .build_iocbs            = NULL,
2525         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2526         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2527         .read_nvram             = NULL,
2528         .write_nvram            = NULL,
2529         .fw_dump                = qla27xx_fwdump,
2530         .beacon_on              = qla24xx_beacon_on,
2531         .beacon_off             = qla24xx_beacon_off,
2532         .beacon_blink           = qla83xx_beacon_blink,
2533         .read_optrom            = qla25xx_read_optrom_data,
2534         .write_optrom           = qla24xx_write_optrom_data,
2535         .get_flash_version      = qla24xx_get_flash_version,
2536         .start_scsi             = qla24xx_dif_start_scsi,
2537         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2538         .abort_isp              = qla2x00_abort_isp,
2539         .iospace_config         = qla83xx_iospace_config,
2540         .initialize_adapter     = qla2x00_initialize_adapter,
2541 };
2542
2543 static inline void
2544 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2545 {
2546         ha->device_type = DT_EXTENDED_IDS;
2547         switch (ha->pdev->device) {
2548         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2549                 ha->isp_type |= DT_ISP2100;
2550                 ha->device_type &= ~DT_EXTENDED_IDS;
2551                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2552                 break;
2553         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2554                 ha->isp_type |= DT_ISP2200;
2555                 ha->device_type &= ~DT_EXTENDED_IDS;
2556                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2557                 break;
2558         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2559                 ha->isp_type |= DT_ISP2300;
2560                 ha->device_type |= DT_ZIO_SUPPORTED;
2561                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2562                 break;
2563         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2564                 ha->isp_type |= DT_ISP2312;
2565                 ha->device_type |= DT_ZIO_SUPPORTED;
2566                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2567                 break;
2568         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2569                 ha->isp_type |= DT_ISP2322;
2570                 ha->device_type |= DT_ZIO_SUPPORTED;
2571                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2572                     ha->pdev->subsystem_device == 0x0170)
2573                         ha->device_type |= DT_OEM_001;
2574                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2575                 break;
2576         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2577                 ha->isp_type |= DT_ISP6312;
2578                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2579                 break;
2580         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2581                 ha->isp_type |= DT_ISP6322;
2582                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2583                 break;
2584         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2585                 ha->isp_type |= DT_ISP2422;
2586                 ha->device_type |= DT_ZIO_SUPPORTED;
2587                 ha->device_type |= DT_FWI2;
2588                 ha->device_type |= DT_IIDMA;
2589                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2590                 break;
2591         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2592                 ha->isp_type |= DT_ISP2432;
2593                 ha->device_type |= DT_ZIO_SUPPORTED;
2594                 ha->device_type |= DT_FWI2;
2595                 ha->device_type |= DT_IIDMA;
2596                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2597                 break;
2598         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2599                 ha->isp_type |= DT_ISP8432;
2600                 ha->device_type |= DT_ZIO_SUPPORTED;
2601                 ha->device_type |= DT_FWI2;
2602                 ha->device_type |= DT_IIDMA;
2603                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2604                 break;
2605         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2606                 ha->isp_type |= DT_ISP5422;
2607                 ha->device_type |= DT_FWI2;
2608                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2609                 break;
2610         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2611                 ha->isp_type |= DT_ISP5432;
2612                 ha->device_type |= DT_FWI2;
2613                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2614                 break;
2615         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2616                 ha->isp_type |= DT_ISP2532;
2617                 ha->device_type |= DT_ZIO_SUPPORTED;
2618                 ha->device_type |= DT_FWI2;
2619                 ha->device_type |= DT_IIDMA;
2620                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2621                 break;
2622         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2623                 ha->isp_type |= DT_ISP8001;
2624                 ha->device_type |= DT_ZIO_SUPPORTED;
2625                 ha->device_type |= DT_FWI2;
2626                 ha->device_type |= DT_IIDMA;
2627                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2628                 break;
2629         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2630                 ha->isp_type |= DT_ISP8021;
2631                 ha->device_type |= DT_ZIO_SUPPORTED;
2632                 ha->device_type |= DT_FWI2;
2633                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2634                 /* Initialize 82XX ISP flags */
2635                 qla82xx_init_flags(ha);
2636                 break;
2637          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2638                 ha->isp_type |= DT_ISP8044;
2639                 ha->device_type |= DT_ZIO_SUPPORTED;
2640                 ha->device_type |= DT_FWI2;
2641                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2642                 /* Initialize 82XX ISP flags */
2643                 qla82xx_init_flags(ha);
2644                 break;
2645         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2646                 ha->isp_type |= DT_ISP2031;
2647                 ha->device_type |= DT_ZIO_SUPPORTED;
2648                 ha->device_type |= DT_FWI2;
2649                 ha->device_type |= DT_IIDMA;
2650                 ha->device_type |= DT_T10_PI;
2651                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2652                 break;
2653         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2654                 ha->isp_type |= DT_ISP8031;
2655                 ha->device_type |= DT_ZIO_SUPPORTED;
2656                 ha->device_type |= DT_FWI2;
2657                 ha->device_type |= DT_IIDMA;
2658                 ha->device_type |= DT_T10_PI;
2659                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2660                 break;
2661         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2662                 ha->isp_type |= DT_ISPFX00;
2663                 break;
2664         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2665                 ha->isp_type |= DT_ISP2071;
2666                 ha->device_type |= DT_ZIO_SUPPORTED;
2667                 ha->device_type |= DT_FWI2;
2668                 ha->device_type |= DT_IIDMA;
2669                 ha->device_type |= DT_T10_PI;
2670                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2671                 break;
2672         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2673                 ha->isp_type |= DT_ISP2271;
2674                 ha->device_type |= DT_ZIO_SUPPORTED;
2675                 ha->device_type |= DT_FWI2;
2676                 ha->device_type |= DT_IIDMA;
2677                 ha->device_type |= DT_T10_PI;
2678                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2679                 break;
2680         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2681                 ha->isp_type |= DT_ISP2261;
2682                 ha->device_type |= DT_ZIO_SUPPORTED;
2683                 ha->device_type |= DT_FWI2;
2684                 ha->device_type |= DT_IIDMA;
2685                 ha->device_type |= DT_T10_PI;
2686                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2687                 break;
2688         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2689         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2690                 ha->isp_type |= DT_ISP2081;
2691                 ha->device_type |= DT_ZIO_SUPPORTED;
2692                 ha->device_type |= DT_FWI2;
2693                 ha->device_type |= DT_IIDMA;
2694                 ha->device_type |= DT_T10_PI;
2695                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2696                 break;
2697         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2698         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2699                 ha->isp_type |= DT_ISP2281;
2700                 ha->device_type |= DT_ZIO_SUPPORTED;
2701                 ha->device_type |= DT_FWI2;
2702                 ha->device_type |= DT_IIDMA;
2703                 ha->device_type |= DT_T10_PI;
2704                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2705                 break;
2706         }
2707
2708         if (IS_QLA82XX(ha))
2709                 ha->port_no = ha->portnum & 1;
2710         else {
2711                 /* Get adapter physical port no from interrupt pin register. */
2712                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2713                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2714                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2715                         ha->port_no--;
2716                 else
2717                         ha->port_no = !(ha->port_no & 1);
2718         }
2719
2720         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2721             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2722             ha->device_type, ha->port_no, ha->fw_srisc_address);
2723 }
2724
2725 static void
2726 qla2xxx_scan_start(struct Scsi_Host *shost)
2727 {
2728         scsi_qla_host_t *vha = shost_priv(shost);
2729
2730         if (vha->hw->flags.running_gold_fw)
2731                 return;
2732
2733         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2734         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2735         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2736         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2737 }
2738
2739 static int
2740 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2741 {
2742         scsi_qla_host_t *vha = shost_priv(shost);
2743
2744         if (test_bit(UNLOADING, &vha->dpc_flags))
2745                 return 1;
2746         if (!vha->host)
2747                 return 1;
2748         if (time > vha->hw->loop_reset_delay * HZ)
2749                 return 1;
2750
2751         return atomic_read(&vha->loop_state) == LOOP_READY;
2752 }
2753
2754 static void qla2x00_iocb_work_fn(struct work_struct *work)
2755 {
2756         struct scsi_qla_host *vha = container_of(work,
2757                 struct scsi_qla_host, iocb_work);
2758         struct qla_hw_data *ha = vha->hw;
2759         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2760         int i = 2;
2761         unsigned long flags;
2762
2763         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2764                 return;
2765
2766         while (!list_empty(&vha->work_list) && i > 0) {
2767                 qla2x00_do_work(vha);
2768                 i--;
2769         }
2770
2771         spin_lock_irqsave(&vha->work_lock, flags);
2772         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2773         spin_unlock_irqrestore(&vha->work_lock, flags);
2774 }
2775
2776 /*
2777  * PCI driver interface
2778  */
2779 static int
2780 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2781 {
2782         int     ret = -ENODEV;
2783         struct Scsi_Host *host;
2784         scsi_qla_host_t *base_vha = NULL;
2785         struct qla_hw_data *ha;
2786         char pci_info[30];
2787         char fw_str[30], wq_name[30];
2788         struct scsi_host_template *sht;
2789         int bars, mem_only = 0;
2790         uint16_t req_length = 0, rsp_length = 0;
2791         struct req_que *req = NULL;
2792         struct rsp_que *rsp = NULL;
2793         int i;
2794
2795         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2796         sht = &qla2xxx_driver_template;
2797         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2798             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2799             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2800             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2801             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2802             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2803             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2804             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2805             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2806             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2807             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2808             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2809             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2810             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2811             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2812             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2813             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2814             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2815             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2816                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2817                 mem_only = 1;
2818                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2819                     "Mem only adapter.\n");
2820         }
2821         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2822             "Bars=%d.\n", bars);
2823
2824         if (mem_only) {
2825                 if (pci_enable_device_mem(pdev))
2826                         return ret;
2827         } else {
2828                 if (pci_enable_device(pdev))
2829                         return ret;
2830         }
2831
2832         /* This may fail but that's ok */
2833         pci_enable_pcie_error_reporting(pdev);
2834
2835         /* Turn off T10-DIF when FC-NVMe is enabled */
2836         if (ql2xnvmeenable)
2837                 ql2xenabledif = 0;
2838
2839         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2840         if (!ha) {
2841                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2842                     "Unable to allocate memory for ha.\n");
2843                 goto disable_device;
2844         }
2845         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2846             "Memory allocated for ha=%p.\n", ha);
2847         ha->pdev = pdev;
2848         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2849         spin_lock_init(&ha->tgt.q_full_lock);
2850         spin_lock_init(&ha->tgt.sess_lock);
2851         spin_lock_init(&ha->tgt.atio_lock);
2852
2853         atomic_set(&ha->nvme_active_aen_cnt, 0);
2854
2855         /* Clear our data area */
2856         ha->bars = bars;
2857         ha->mem_only = mem_only;
2858         spin_lock_init(&ha->hardware_lock);
2859         spin_lock_init(&ha->vport_slock);
2860         mutex_init(&ha->selflogin_lock);
2861         mutex_init(&ha->optrom_mutex);
2862
2863         /* Set ISP-type information. */
2864         qla2x00_set_isp_flags(ha);
2865
2866         /* Set EEH reset type to fundamental if required by hba */
2867         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2868             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2869                 pdev->needs_freset = 1;
2870
2871         ha->prev_topology = 0;
2872         ha->init_cb_size = sizeof(init_cb_t);
2873         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2874         ha->optrom_size = OPTROM_SIZE_2300;
2875         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2876         atomic_set(&ha->num_pend_mbx_stage1, 0);
2877         atomic_set(&ha->num_pend_mbx_stage2, 0);
2878         atomic_set(&ha->num_pend_mbx_stage3, 0);
2879         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2880         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2881
2882         /* Assign ISP specific operations. */
2883         if (IS_QLA2100(ha)) {
2884                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2885                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2886                 req_length = REQUEST_ENTRY_CNT_2100;
2887                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2888                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2889                 ha->gid_list_info_size = 4;
2890                 ha->flash_conf_off = ~0;
2891                 ha->flash_data_off = ~0;
2892                 ha->nvram_conf_off = ~0;
2893                 ha->nvram_data_off = ~0;
2894                 ha->isp_ops = &qla2100_isp_ops;
2895         } else if (IS_QLA2200(ha)) {
2896                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2897                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2898                 req_length = REQUEST_ENTRY_CNT_2200;
2899                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2900                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2901                 ha->gid_list_info_size = 4;
2902                 ha->flash_conf_off = ~0;
2903                 ha->flash_data_off = ~0;
2904                 ha->nvram_conf_off = ~0;
2905                 ha->nvram_data_off = ~0;
2906                 ha->isp_ops = &qla2100_isp_ops;
2907         } else if (IS_QLA23XX(ha)) {
2908                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2909                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2910                 req_length = REQUEST_ENTRY_CNT_2200;
2911                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2912                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2913                 ha->gid_list_info_size = 6;
2914                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2915                         ha->optrom_size = OPTROM_SIZE_2322;
2916                 ha->flash_conf_off = ~0;
2917                 ha->flash_data_off = ~0;
2918                 ha->nvram_conf_off = ~0;
2919                 ha->nvram_data_off = ~0;
2920                 ha->isp_ops = &qla2300_isp_ops;
2921         } else if (IS_QLA24XX_TYPE(ha)) {
2922                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2923                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2924                 req_length = REQUEST_ENTRY_CNT_24XX;
2925                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2926                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2927                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2928                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2929                 ha->gid_list_info_size = 8;
2930                 ha->optrom_size = OPTROM_SIZE_24XX;
2931                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2932                 ha->isp_ops = &qla24xx_isp_ops;
2933                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2934                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2935                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2936                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2937         } else if (IS_QLA25XX(ha)) {
2938                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2939                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2940                 req_length = REQUEST_ENTRY_CNT_24XX;
2941                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2942                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2943                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2944                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2945                 ha->gid_list_info_size = 8;
2946                 ha->optrom_size = OPTROM_SIZE_25XX;
2947                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2948                 ha->isp_ops = &qla25xx_isp_ops;
2949                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2950                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2951                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2952                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2953         } else if (IS_QLA81XX(ha)) {
2954                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2955                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2956                 req_length = REQUEST_ENTRY_CNT_24XX;
2957                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2958                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2959                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2960                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2961                 ha->gid_list_info_size = 8;
2962                 ha->optrom_size = OPTROM_SIZE_81XX;
2963                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2964                 ha->isp_ops = &qla81xx_isp_ops;
2965                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2966                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2967                 ha->nvram_conf_off = ~0;
2968                 ha->nvram_data_off = ~0;
2969         } else if (IS_QLA82XX(ha)) {
2970                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2971                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2972                 req_length = REQUEST_ENTRY_CNT_82XX;
2973                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2974                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2975                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2976                 ha->gid_list_info_size = 8;
2977                 ha->optrom_size = OPTROM_SIZE_82XX;
2978                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2979                 ha->isp_ops = &qla82xx_isp_ops;
2980                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2981                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2982                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2983                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2984         } else if (IS_QLA8044(ha)) {
2985                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2986                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2987                 req_length = REQUEST_ENTRY_CNT_82XX;
2988                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2989                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2990                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2991                 ha->gid_list_info_size = 8;
2992                 ha->optrom_size = OPTROM_SIZE_83XX;
2993                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2994                 ha->isp_ops = &qla8044_isp_ops;
2995                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2996                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2997                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2998                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2999         } else if (IS_QLA83XX(ha)) {
3000                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3001                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3002                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3003                 req_length = REQUEST_ENTRY_CNT_83XX;
3004                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3005                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3006                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3007                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3008                 ha->gid_list_info_size = 8;
3009                 ha->optrom_size = OPTROM_SIZE_83XX;
3010                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3011                 ha->isp_ops = &qla83xx_isp_ops;
3012                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3013                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3014                 ha->nvram_conf_off = ~0;
3015                 ha->nvram_data_off = ~0;
3016         }  else if (IS_QLAFX00(ha)) {
3017                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3018                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3019                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3020                 req_length = REQUEST_ENTRY_CNT_FX00;
3021                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3022                 ha->isp_ops = &qlafx00_isp_ops;
3023                 ha->port_down_retry_count = 30; /* default value */
3024                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3025                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3026                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3027                 ha->mr.fw_hbt_en = 1;
3028                 ha->mr.host_info_resend = false;
3029                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3030         } else if (IS_QLA27XX(ha)) {
3031                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3032                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3033                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3034                 req_length = REQUEST_ENTRY_CNT_83XX;
3035                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3036                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3037                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3038                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3039                 ha->gid_list_info_size = 8;
3040                 ha->optrom_size = OPTROM_SIZE_83XX;
3041                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3042                 ha->isp_ops = &qla27xx_isp_ops;
3043                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3044                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3045                 ha->nvram_conf_off = ~0;
3046                 ha->nvram_data_off = ~0;
3047         } else if (IS_QLA28XX(ha)) {
3048                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3049                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3050                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3051                 req_length = REQUEST_ENTRY_CNT_24XX;
3052                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3053                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3054                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3055                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3056                 ha->gid_list_info_size = 8;
3057                 ha->optrom_size = OPTROM_SIZE_28XX;
3058                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3059                 ha->isp_ops = &qla27xx_isp_ops;
3060                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3061                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3062                 ha->nvram_conf_off = ~0;
3063                 ha->nvram_data_off = ~0;
3064         }
3065
3066         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3067             "mbx_count=%d, req_length=%d, "
3068             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3069             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3070             "max_fibre_devices=%d.\n",
3071             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3072             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3073             ha->nvram_npiv_size, ha->max_fibre_devices);
3074         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3075             "isp_ops=%p, flash_conf_off=%d, "
3076             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3077             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3078             ha->nvram_conf_off, ha->nvram_data_off);
3079
3080         /* Configure PCI I/O space */
3081         ret = ha->isp_ops->iospace_config(ha);
3082         if (ret)
3083                 goto iospace_config_failed;
3084
3085         ql_log_pci(ql_log_info, pdev, 0x001d,
3086             "Found an ISP%04X irq %d iobase 0x%p.\n",
3087             pdev->device, pdev->irq, ha->iobase);
3088         mutex_init(&ha->vport_lock);
3089         mutex_init(&ha->mq_lock);
3090         init_completion(&ha->mbx_cmd_comp);
3091         complete(&ha->mbx_cmd_comp);
3092         init_completion(&ha->mbx_intr_comp);
3093         init_completion(&ha->dcbx_comp);
3094         init_completion(&ha->lb_portup_comp);
3095
3096         set_bit(0, (unsigned long *) ha->vp_idx_map);
3097
3098         qla2x00_config_dma_addressing(ha);
3099         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3100             "64 Bit addressing is %s.\n",
3101             ha->flags.enable_64bit_addressing ? "enable" :
3102             "disable");
3103         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3104         if (ret) {
3105                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3106                     "Failed to allocate memory for adapter, aborting.\n");
3107
3108                 goto probe_hw_failed;
3109         }
3110
3111         req->max_q_depth = MAX_Q_DEPTH;
3112         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3113                 req->max_q_depth = ql2xmaxqdepth;
3114
3115
3116         base_vha = qla2x00_create_host(sht, ha);
3117         if (!base_vha) {
3118                 ret = -ENOMEM;
3119                 goto probe_hw_failed;
3120         }
3121
3122         pci_set_drvdata(pdev, base_vha);
3123         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3124
3125         host = base_vha->host;
3126         base_vha->req = req;
3127         if (IS_QLA2XXX_MIDTYPE(ha))
3128                 base_vha->mgmt_svr_loop_id =
3129                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3130         else
3131                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3132                                                 base_vha->vp_idx;
3133
3134         /* Setup fcport template structure. */
3135         ha->mr.fcport.vha = base_vha;
3136         ha->mr.fcport.port_type = FCT_UNKNOWN;
3137         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3138         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3139         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3140         ha->mr.fcport.scan_state = 1;
3141
3142         /* Set the SG table size based on ISP type */
3143         if (!IS_FWI2_CAPABLE(ha)) {
3144                 if (IS_QLA2100(ha))
3145                         host->sg_tablesize = 32;
3146         } else {
3147                 if (!IS_QLA82XX(ha))
3148                         host->sg_tablesize = QLA_SG_ALL;
3149         }
3150         host->max_id = ha->max_fibre_devices;
3151         host->cmd_per_lun = 3;
3152         host->unique_id = host->host_no;
3153         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3154                 host->max_cmd_len = 32;
3155         else
3156                 host->max_cmd_len = MAX_CMDSZ;
3157         host->max_channel = MAX_BUSES - 1;
3158         /* Older HBAs support only 16-bit LUNs */
3159         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3160             ql2xmaxlun > 0xffff)
3161                 host->max_lun = 0xffff;
3162         else
3163                 host->max_lun = ql2xmaxlun;
3164         host->transportt = qla2xxx_transport_template;
3165         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3166
3167         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3168             "max_id=%d this_id=%d "
3169             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3170             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3171             host->this_id, host->cmd_per_lun, host->unique_id,
3172             host->max_cmd_len, host->max_channel, host->max_lun,
3173             host->transportt, sht->vendor_id);
3174
3175         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3176
3177         /* Set up the irqs */
3178         ret = qla2x00_request_irqs(ha, rsp);
3179         if (ret)
3180                 goto probe_failed;
3181
3182         /* Alloc arrays of request and response ring ptrs */
3183         ret = qla2x00_alloc_queues(ha, req, rsp);
3184         if (ret) {
3185                 ql_log(ql_log_fatal, base_vha, 0x003d,
3186                     "Failed to allocate memory for queue pointers..."
3187                     "aborting.\n");
3188                 ret = -ENODEV;
3189                 goto probe_failed;
3190         }
3191
3192         if (ha->mqenable) {
3193                 /* number of hardware queues supported by blk/scsi-mq*/
3194                 host->nr_hw_queues = ha->max_qpairs;
3195
3196                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3197                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3198         } else {
3199                 if (ql2xnvmeenable) {
3200                         host->nr_hw_queues = ha->max_qpairs;
3201                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3202                             "FC-NVMe support is enabled, HW queues=%d\n",
3203                             host->nr_hw_queues);
3204                 } else {
3205                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3206                             "blk/scsi-mq disabled.\n");
3207                 }
3208         }
3209
3210         qlt_probe_one_stage1(base_vha, ha);
3211
3212         pci_save_state(pdev);
3213
3214         /* Assign back pointers */
3215         rsp->req = req;
3216         req->rsp = rsp;
3217
3218         if (IS_QLAFX00(ha)) {
3219                 ha->rsp_q_map[0] = rsp;
3220                 ha->req_q_map[0] = req;
3221                 set_bit(0, ha->req_qid_map);
3222                 set_bit(0, ha->rsp_qid_map);
3223         }
3224
3225         /* FWI2-capable only. */
3226         req->req_q_in = &ha->iobase->isp24.req_q_in;
3227         req->req_q_out = &ha->iobase->isp24.req_q_out;
3228         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3229         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3230         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3231             IS_QLA28XX(ha)) {
3232                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3233                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3234                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3235                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3236         }
3237
3238         if (IS_QLAFX00(ha)) {
3239                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3240                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3241                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3242                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3243         }
3244
3245         if (IS_P3P_TYPE(ha)) {
3246                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3247                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3248                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3249         }
3250
3251         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3252             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3253             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3254         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3255             "req->req_q_in=%p req->req_q_out=%p "
3256             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3257             req->req_q_in, req->req_q_out,
3258             rsp->rsp_q_in, rsp->rsp_q_out);
3259         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3260             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3261             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3262         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3263             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3264             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3265
3266         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3267
3268         if (ha->isp_ops->initialize_adapter(base_vha)) {
3269                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3270                     "Failed to initialize adapter - Adapter flags %x.\n",
3271                     base_vha->device_flags);
3272
3273                 if (IS_QLA82XX(ha)) {
3274                         qla82xx_idc_lock(ha);
3275                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3276                                 QLA8XXX_DEV_FAILED);
3277                         qla82xx_idc_unlock(ha);
3278                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3279                             "HW State: FAILED.\n");
3280                 } else if (IS_QLA8044(ha)) {
3281                         qla8044_idc_lock(ha);
3282                         qla8044_wr_direct(base_vha,
3283                                 QLA8044_CRB_DEV_STATE_INDEX,
3284                                 QLA8XXX_DEV_FAILED);
3285                         qla8044_idc_unlock(ha);
3286                         ql_log(ql_log_fatal, base_vha, 0x0150,
3287                             "HW State: FAILED.\n");
3288                 }
3289
3290                 ret = -ENODEV;
3291                 goto probe_failed;
3292         }
3293
3294         if (IS_QLAFX00(ha))
3295                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3296         else
3297                 host->can_queue = req->num_outstanding_cmds - 10;
3298
3299         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3300             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3301             host->can_queue, base_vha->req,
3302             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3303
3304         if (ha->mqenable) {
3305                 bool startit = false;
3306
3307                 if (QLA_TGT_MODE_ENABLED())
3308                         startit = false;
3309
3310                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3311                         startit = true;
3312
3313                 /* Create start of day qpairs for Block MQ */
3314                 for (i = 0; i < ha->max_qpairs; i++)
3315                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3316         }
3317
3318         if (ha->flags.running_gold_fw)
3319                 goto skip_dpc;
3320
3321         /*
3322          * Startup the kernel thread for this host adapter
3323          */
3324         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3325             "%s_dpc", base_vha->host_str);
3326         if (IS_ERR(ha->dpc_thread)) {
3327                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3328                     "Failed to start DPC thread.\n");
3329                 ret = PTR_ERR(ha->dpc_thread);
3330                 ha->dpc_thread = NULL;
3331                 goto probe_failed;
3332         }
3333         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3334             "DPC thread started successfully.\n");
3335
3336         /*
3337          * If we're not coming up in initiator mode, we might sit for
3338          * a while without waking up the dpc thread, which leads to a
3339          * stuck process warning.  So just kick the dpc once here and
3340          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3341          */
3342         qla2xxx_wake_dpc(base_vha);
3343
3344         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3345
3346         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3347                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3348                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3349                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3350
3351                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3352                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3353                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3354                 INIT_WORK(&ha->idc_state_handler,
3355                     qla83xx_idc_state_handler_work);
3356                 INIT_WORK(&ha->nic_core_unrecoverable,
3357                     qla83xx_nic_core_unrecoverable_work);
3358         }
3359
3360 skip_dpc:
3361         list_add_tail(&base_vha->list, &ha->vp_list);
3362         base_vha->host->irq = ha->pdev->irq;
3363
3364         /* Initialized the timer */
3365         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3366         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3367             "Started qla2x00_timer with "
3368             "interval=%d.\n", WATCH_INTERVAL);
3369         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3370             "Detected hba at address=%p.\n",
3371             ha);
3372
3373         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3374                 if (ha->fw_attributes & BIT_4) {
3375                         int prot = 0, guard;
3376
3377                         base_vha->flags.difdix_supported = 1;
3378                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3379                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3380                         if (ql2xenabledif == 1)
3381                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3382                         if (ql2xprotmask)
3383                                 scsi_host_set_prot(host, ql2xprotmask);
3384                         else
3385                                 scsi_host_set_prot(host,
3386                                     prot | SHOST_DIF_TYPE1_PROTECTION
3387                                     | SHOST_DIF_TYPE2_PROTECTION
3388                                     | SHOST_DIF_TYPE3_PROTECTION
3389                                     | SHOST_DIX_TYPE1_PROTECTION
3390                                     | SHOST_DIX_TYPE2_PROTECTION
3391                                     | SHOST_DIX_TYPE3_PROTECTION);
3392
3393                         guard = SHOST_DIX_GUARD_CRC;
3394
3395                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3396                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3397                                 guard |= SHOST_DIX_GUARD_IP;
3398
3399                         if (ql2xprotguard)
3400                                 scsi_host_set_guard(host, ql2xprotguard);
3401                         else
3402                                 scsi_host_set_guard(host, guard);
3403                 } else
3404                         base_vha->flags.difdix_supported = 0;
3405         }
3406
3407         ha->isp_ops->enable_intrs(ha);
3408
3409         if (IS_QLAFX00(ha)) {
3410                 ret = qlafx00_fx_disc(base_vha,
3411                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3412                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3413                     QLA_SG_ALL : 128;
3414         }
3415
3416         ret = scsi_add_host(host, &pdev->dev);
3417         if (ret)
3418                 goto probe_failed;
3419
3420         base_vha->flags.init_done = 1;
3421         base_vha->flags.online = 1;
3422         ha->prev_minidump_failed = 0;
3423
3424         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3425             "Init done and hba is online.\n");
3426
3427         if (qla_ini_mode_enabled(base_vha) ||
3428                 qla_dual_mode_enabled(base_vha))
3429                 scsi_scan_host(host);
3430         else
3431                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3432                         "skipping scsi_scan_host() for non-initiator port\n");
3433
3434         qla2x00_alloc_sysfs_attr(base_vha);
3435
3436         if (IS_QLAFX00(ha)) {
3437                 ret = qlafx00_fx_disc(base_vha,
3438                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3439
3440                 /* Register system information */
3441                 ret =  qlafx00_fx_disc(base_vha,
3442                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3443         }
3444
3445         qla2x00_init_host_attr(base_vha);
3446
3447         qla2x00_dfs_setup(base_vha);
3448
3449         ql_log(ql_log_info, base_vha, 0x00fb,
3450             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3451         ql_log(ql_log_info, base_vha, 0x00fc,
3452             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3453             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3454                                                        sizeof(pci_info)),
3455             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3456             base_vha->host_no,
3457             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3458
3459         qlt_add_target(ha, base_vha);
3460
3461         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3462
3463         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3464                 return -ENODEV;
3465
3466         if (ha->flags.detected_lr_sfp) {
3467                 ql_log(ql_log_info, base_vha, 0xffff,
3468                     "Reset chip to pick up LR SFP setting\n");
3469                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3470                 qla2xxx_wake_dpc(base_vha);
3471         }
3472
3473         return 0;
3474
3475 probe_failed:
3476         if (base_vha->timer_active)
3477                 qla2x00_stop_timer(base_vha);
3478         base_vha->flags.online = 0;
3479         if (ha->dpc_thread) {
3480                 struct task_struct *t = ha->dpc_thread;
3481
3482                 ha->dpc_thread = NULL;
3483                 kthread_stop(t);
3484         }
3485
3486         qla2x00_free_device(base_vha);
3487         scsi_host_put(base_vha->host);
3488         /*
3489          * Need to NULL out local req/rsp after
3490          * qla2x00_free_device => qla2x00_free_queues frees
3491          * what these are pointing to. Or else we'll
3492          * fall over below in qla2x00_free_req/rsp_que.
3493          */
3494         req = NULL;
3495         rsp = NULL;
3496
3497 probe_hw_failed:
3498         qla2x00_mem_free(ha);
3499         qla2x00_free_req_que(ha, req);
3500         qla2x00_free_rsp_que(ha, rsp);
3501         qla2x00_clear_drv_active(ha);
3502
3503 iospace_config_failed:
3504         if (IS_P3P_TYPE(ha)) {
3505                 if (!ha->nx_pcibase)
3506                         iounmap((device_reg_t *)ha->nx_pcibase);
3507                 if (!ql2xdbwr)
3508                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3509         } else {
3510                 if (ha->iobase)
3511                         iounmap(ha->iobase);
3512                 if (ha->cregbase)
3513                         iounmap(ha->cregbase);
3514         }
3515         pci_release_selected_regions(ha->pdev, ha->bars);
3516         kfree(ha);
3517
3518 disable_device:
3519         pci_disable_device(pdev);
3520         return ret;
3521 }
3522
3523 static void
3524 qla2x00_shutdown(struct pci_dev *pdev)
3525 {
3526         scsi_qla_host_t *vha;
3527         struct qla_hw_data  *ha;
3528
3529         vha = pci_get_drvdata(pdev);
3530         ha = vha->hw;
3531
3532         ql_log(ql_log_info, vha, 0xfffa,
3533                 "Adapter shutdown\n");
3534
3535         /*
3536          * Prevent future board_disable and wait
3537          * until any pending board_disable has completed.
3538          */
3539         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3540         cancel_work_sync(&ha->board_disable);
3541
3542         if (!atomic_read(&pdev->enable_cnt))
3543                 return;
3544
3545         /* Notify ISPFX00 firmware */
3546         if (IS_QLAFX00(ha))
3547                 qlafx00_driver_shutdown(vha, 20);
3548
3549         /* Turn-off FCE trace */
3550         if (ha->flags.fce_enabled) {
3551                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3552                 ha->flags.fce_enabled = 0;
3553         }
3554
3555         /* Turn-off EFT trace */
3556         if (ha->eft)
3557                 qla2x00_disable_eft_trace(vha);
3558
3559         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3560             IS_QLA28XX(ha)) {
3561                 if (ha->flags.fw_started)
3562                         qla2x00_abort_isp_cleanup(vha);
3563         } else {
3564                 /* Stop currently executing firmware. */
3565                 qla2x00_try_to_stop_firmware(vha);
3566         }
3567
3568         /* Turn adapter off line */
3569         vha->flags.online = 0;
3570
3571         /* turn-off interrupts on the card */
3572         if (ha->interrupts_on) {
3573                 vha->flags.init_done = 0;
3574                 ha->isp_ops->disable_intrs(ha);
3575         }
3576
3577         qla2x00_free_irqs(vha);
3578
3579         qla2x00_free_fw_dump(ha);
3580
3581         pci_disable_device(pdev);
3582         ql_log(ql_log_info, vha, 0xfffe,
3583                 "Adapter shutdown successfully.\n");
3584 }
3585
3586 /* Deletes all the virtual ports for a given ha */
3587 static void
3588 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3589 {
3590         scsi_qla_host_t *vha;
3591         unsigned long flags;
3592
3593         mutex_lock(&ha->vport_lock);
3594         while (ha->cur_vport_count) {
3595                 spin_lock_irqsave(&ha->vport_slock, flags);
3596
3597                 BUG_ON(base_vha->list.next == &ha->vp_list);
3598                 /* This assumes first entry in ha->vp_list is always base vha */
3599                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3600                 scsi_host_get(vha->host);
3601
3602                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3603                 mutex_unlock(&ha->vport_lock);
3604
3605                 qla_nvme_delete(vha);
3606
3607                 fc_vport_terminate(vha->fc_vport);
3608                 scsi_host_put(vha->host);
3609
3610                 mutex_lock(&ha->vport_lock);
3611         }
3612         mutex_unlock(&ha->vport_lock);
3613 }
3614
3615 /* Stops all deferred work threads */
3616 static void
3617 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3618 {
3619         /* Cancel all work and destroy DPC workqueues */
3620         if (ha->dpc_lp_wq) {
3621                 cancel_work_sync(&ha->idc_aen);
3622                 destroy_workqueue(ha->dpc_lp_wq);
3623                 ha->dpc_lp_wq = NULL;
3624         }
3625
3626         if (ha->dpc_hp_wq) {
3627                 cancel_work_sync(&ha->nic_core_reset);
3628                 cancel_work_sync(&ha->idc_state_handler);
3629                 cancel_work_sync(&ha->nic_core_unrecoverable);
3630                 destroy_workqueue(ha->dpc_hp_wq);
3631                 ha->dpc_hp_wq = NULL;
3632         }
3633
3634         /* Kill the kernel thread for this host */
3635         if (ha->dpc_thread) {
3636                 struct task_struct *t = ha->dpc_thread;
3637
3638                 /*
3639                  * qla2xxx_wake_dpc checks for ->dpc_thread
3640                  * so we need to zero it out.
3641                  */
3642                 ha->dpc_thread = NULL;
3643                 kthread_stop(t);
3644         }
3645 }
3646
3647 static void
3648 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3649 {
3650         if (IS_QLA82XX(ha)) {
3651
3652                 iounmap((device_reg_t *)ha->nx_pcibase);
3653                 if (!ql2xdbwr)
3654                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3655         } else {
3656                 if (ha->iobase)
3657                         iounmap(ha->iobase);
3658
3659                 if (ha->cregbase)
3660                         iounmap(ha->cregbase);
3661
3662                 if (ha->mqiobase)
3663                         iounmap(ha->mqiobase);
3664
3665                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
3666                     ha->msixbase)
3667                         iounmap(ha->msixbase);
3668         }
3669 }
3670
3671 static void
3672 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3673 {
3674         if (IS_QLA8044(ha)) {
3675                 qla8044_idc_lock(ha);
3676                 qla8044_clear_drv_active(ha);
3677                 qla8044_idc_unlock(ha);
3678         } else if (IS_QLA82XX(ha)) {
3679                 qla82xx_idc_lock(ha);
3680                 qla82xx_clear_drv_active(ha);
3681                 qla82xx_idc_unlock(ha);
3682         }
3683 }
3684
3685 static void
3686 qla2x00_remove_one(struct pci_dev *pdev)
3687 {
3688         scsi_qla_host_t *base_vha;
3689         struct qla_hw_data  *ha;
3690
3691         base_vha = pci_get_drvdata(pdev);
3692         ha = base_vha->hw;
3693         ql_log(ql_log_info, base_vha, 0xb079,
3694             "Removing driver\n");
3695
3696         /* Indicate device removal to prevent future board_disable and wait
3697          * until any pending board_disable has completed. */
3698         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3699         cancel_work_sync(&ha->board_disable);
3700
3701         /*
3702          * If the PCI device is disabled then there was a PCI-disconnect and
3703          * qla2x00_disable_board_on_pci_error has taken care of most of the
3704          * resources.
3705          */
3706         if (!atomic_read(&pdev->enable_cnt)) {
3707                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3708                     base_vha->gnl.l, base_vha->gnl.ldma);
3709
3710                 scsi_host_put(base_vha->host);
3711                 kfree(ha);
3712                 pci_set_drvdata(pdev, NULL);
3713                 return;
3714         }
3715         qla2x00_wait_for_hba_ready(base_vha);
3716
3717         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3718             IS_QLA28XX(ha)) {
3719                 if (ha->flags.fw_started)
3720                         qla2x00_abort_isp_cleanup(base_vha);
3721         } else if (!IS_QLAFX00(ha)) {
3722                 if (IS_QLA8031(ha)) {
3723                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3724                             "Clearing fcoe driver presence.\n");
3725                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3726                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3727                                     "Error while clearing DRV-Presence.\n");
3728                 }
3729
3730                 qla2x00_try_to_stop_firmware(base_vha);
3731         }
3732
3733         qla2x00_wait_for_sess_deletion(base_vha);
3734
3735         /*
3736          * if UNLOAD flag is already set, then continue unload,
3737          * where it was set first.
3738          */
3739         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3740                 return;
3741
3742         set_bit(UNLOADING, &base_vha->dpc_flags);
3743
3744         qla_nvme_delete(base_vha);
3745
3746         dma_free_coherent(&ha->pdev->dev,
3747                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3748
3749         vfree(base_vha->scan.l);
3750
3751         if (IS_QLAFX00(ha))
3752                 qlafx00_driver_shutdown(base_vha, 20);
3753
3754         qla2x00_delete_all_vps(ha, base_vha);
3755
3756         qla2x00_dfs_remove(base_vha);
3757
3758         qla84xx_put_chip(base_vha);
3759
3760         /* Disable timer */
3761         if (base_vha->timer_active)
3762                 qla2x00_stop_timer(base_vha);
3763
3764         base_vha->flags.online = 0;
3765
3766         /* free DMA memory */
3767         if (ha->exlogin_buf)
3768                 qla2x00_free_exlogin_buffer(ha);
3769
3770         /* free DMA memory */
3771         if (ha->exchoffld_buf)
3772                 qla2x00_free_exchoffld_buffer(ha);
3773
3774         qla2x00_destroy_deferred_work(ha);
3775
3776         qlt_remove_target(ha, base_vha);
3777
3778         qla2x00_free_sysfs_attr(base_vha, true);
3779
3780         fc_remove_host(base_vha->host);
3781         qlt_remove_target_resources(ha);
3782
3783         scsi_remove_host(base_vha->host);
3784
3785         qla2x00_free_device(base_vha);
3786
3787         qla2x00_clear_drv_active(ha);
3788
3789         scsi_host_put(base_vha->host);
3790
3791         qla2x00_unmap_iobases(ha);
3792
3793         pci_release_selected_regions(ha->pdev, ha->bars);
3794         kfree(ha);
3795
3796         pci_disable_pcie_error_reporting(pdev);
3797
3798         pci_disable_device(pdev);
3799 }
3800
3801 static void
3802 qla2x00_free_device(scsi_qla_host_t *vha)
3803 {
3804         struct qla_hw_data *ha = vha->hw;
3805
3806         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3807
3808         /* Disable timer */
3809         if (vha->timer_active)
3810                 qla2x00_stop_timer(vha);
3811
3812         qla25xx_delete_queues(vha);
3813         vha->flags.online = 0;
3814
3815         /* turn-off interrupts on the card */
3816         if (ha->interrupts_on) {
3817                 vha->flags.init_done = 0;
3818                 ha->isp_ops->disable_intrs(ha);
3819         }
3820
3821         qla2x00_free_fcports(vha);
3822
3823         qla2x00_free_irqs(vha);
3824
3825         /* Flush the work queue and remove it */
3826         if (ha->wq) {
3827                 flush_workqueue(ha->wq);
3828                 destroy_workqueue(ha->wq);
3829                 ha->wq = NULL;
3830         }
3831
3832
3833         qla2x00_mem_free(ha);
3834
3835         qla82xx_md_free(vha);
3836
3837         qla2x00_free_queues(ha);
3838 }
3839
3840 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3841 {
3842         fc_port_t *fcport, *tfcport;
3843
3844         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3845                 qla2x00_free_fcport(fcport);
3846 }
3847
3848 static inline void
3849 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3850     int defer)
3851 {
3852         struct fc_rport *rport;
3853         scsi_qla_host_t *base_vha;
3854         unsigned long flags;
3855
3856         if (!fcport->rport)
3857                 return;
3858
3859         rport = fcport->rport;
3860         if (defer) {
3861                 base_vha = pci_get_drvdata(vha->hw->pdev);
3862                 spin_lock_irqsave(vha->host->host_lock, flags);
3863                 fcport->drport = rport;
3864                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3865                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3866                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3867                 qla2xxx_wake_dpc(base_vha);
3868         } else {
3869                 int now;
3870
3871                 if (rport) {
3872                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3873                             "%s %8phN. rport %p roles %x\n",
3874                             __func__, fcport->port_name, rport,
3875                             rport->roles);
3876                         fc_remote_port_delete(rport);
3877                 }
3878                 qlt_do_generation_tick(vha, &now);
3879         }
3880 }
3881
3882 /*
3883  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3884  *
3885  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3886  *
3887  * Return: None.
3888  *
3889  * Context:
3890  */
3891 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3892     int do_login, int defer)
3893 {
3894         if (IS_QLAFX00(vha->hw)) {
3895                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3896                 qla2x00_schedule_rport_del(vha, fcport, defer);
3897                 return;
3898         }
3899
3900         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3901             vha->vp_idx == fcport->vha->vp_idx) {
3902                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3903                 qla2x00_schedule_rport_del(vha, fcport, defer);
3904         }
3905         /*
3906          * We may need to retry the login, so don't change the state of the
3907          * port but do the retries.
3908          */
3909         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3910                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3911
3912         if (!do_login)
3913                 return;
3914
3915         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3916 }
3917
3918 /*
3919  * qla2x00_mark_all_devices_lost
3920  *      Updates fcport state when device goes offline.
3921  *
3922  * Input:
3923  *      ha = adapter block pointer.
3924  *      fcport = port structure pointer.
3925  *
3926  * Return:
3927  *      None.
3928  *
3929  * Context:
3930  */
3931 void
3932 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3933 {
3934         fc_port_t *fcport;
3935
3936         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3937             "Mark all dev lost\n");
3938
3939         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3940                 fcport->scan_state = 0;
3941                 qlt_schedule_sess_for_deletion(fcport);
3942
3943                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3944                         continue;
3945
3946                 /*
3947                  * No point in marking the device as lost, if the device is
3948                  * already DEAD.
3949                  */
3950                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3951                         continue;
3952                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3953                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3954                         if (defer)
3955                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3956                         else if (vha->vp_idx == fcport->vha->vp_idx)
3957                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3958                 }
3959         }
3960 }
3961
3962 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
3963 {
3964         int i;
3965
3966         if (IS_FWI2_CAPABLE(ha))
3967                 return;
3968
3969         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
3970                 set_bit(i, ha->loop_id_map);
3971         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
3972         set_bit(BROADCAST, ha->loop_id_map);
3973 }
3974
3975 /*
3976 * qla2x00_mem_alloc
3977 *      Allocates adapter memory.
3978 *
3979 * Returns:
3980 *      0  = success.
3981 *      !0  = failure.
3982 */
3983 static int
3984 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3985         struct req_que **req, struct rsp_que **rsp)
3986 {
3987         char    name[16];
3988
3989         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3990                 &ha->init_cb_dma, GFP_KERNEL);
3991         if (!ha->init_cb)
3992                 goto fail;
3993
3994         if (qlt_mem_alloc(ha) < 0)
3995                 goto fail_free_init_cb;
3996
3997         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3998                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3999         if (!ha->gid_list)
4000                 goto fail_free_tgt_mem;
4001
4002         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
4003         if (!ha->srb_mempool)
4004                 goto fail_free_gid_list;
4005
4006         if (IS_P3P_TYPE(ha)) {
4007                 /* Allocate cache for CT6 Ctx. */
4008                 if (!ctx_cachep) {
4009                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
4010                                 sizeof(struct ct6_dsd), 0,
4011                                 SLAB_HWCACHE_ALIGN, NULL);
4012                         if (!ctx_cachep)
4013                                 goto fail_free_srb_mempool;
4014                 }
4015                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
4016                         ctx_cachep);
4017                 if (!ha->ctx_mempool)
4018                         goto fail_free_srb_mempool;
4019                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
4020                     "ctx_cachep=%p ctx_mempool=%p.\n",
4021                     ctx_cachep, ha->ctx_mempool);
4022         }
4023
4024         /* Get memory for cached NVRAM */
4025         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
4026         if (!ha->nvram)
4027                 goto fail_free_ctx_mempool;
4028
4029         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
4030                 ha->pdev->device);
4031         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4032                 DMA_POOL_SIZE, 8, 0);
4033         if (!ha->s_dma_pool)
4034                 goto fail_free_nvram;
4035
4036         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4037             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4038             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4039
4040         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
4041                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4042                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4043                 if (!ha->dl_dma_pool) {
4044                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4045                             "Failed to allocate memory for dl_dma_pool.\n");
4046                         goto fail_s_dma_pool;
4047                 }
4048
4049                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4050                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4051                 if (!ha->fcp_cmnd_dma_pool) {
4052                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4053                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4054                         goto fail_dl_dma_pool;
4055                 }
4056
4057                 if (ql2xenabledif) {
4058                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4059                         struct dsd_dma *dsd, *nxt;
4060                         uint i;
4061                         /* Creata a DMA pool of buffers for DIF bundling */
4062                         ha->dif_bundl_pool = dma_pool_create(name,
4063                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4064                         if (!ha->dif_bundl_pool) {
4065                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4066                                     "%s: failed create dif_bundl_pool\n",
4067                                     __func__);
4068                                 goto fail_dif_bundl_dma_pool;
4069                         }
4070
4071                         INIT_LIST_HEAD(&ha->pool.good.head);
4072                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4073                         ha->pool.good.count = 0;
4074                         ha->pool.unusable.count = 0;
4075                         for (i = 0; i < 128; i++) {
4076                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4077                                 if (!dsd) {
4078                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4079                                             0xe0ee, "%s: failed alloc dsd\n",
4080                                             __func__);
4081                                         return 1;
4082                                 }
4083                                 ha->dif_bundle_kallocs++;
4084
4085                                 dsd->dsd_addr = dma_pool_alloc(
4086                                     ha->dif_bundl_pool, GFP_ATOMIC,
4087                                     &dsd->dsd_list_dma);
4088                                 if (!dsd->dsd_addr) {
4089                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4090                                             0xe0ee,
4091                                             "%s: failed alloc ->dsd_addr\n",
4092                                             __func__);
4093                                         kfree(dsd);
4094                                         ha->dif_bundle_kallocs--;
4095                                         continue;
4096                                 }
4097                                 ha->dif_bundle_dma_allocs++;
4098
4099                                 /*
4100                                  * if DMA buffer crosses 4G boundary,
4101                                  * put it on bad list
4102                                  */
4103                                 if (MSD(dsd->dsd_list_dma) ^
4104                                     MSD(dsd->dsd_list_dma + bufsize)) {
4105                                         list_add_tail(&dsd->list,
4106                                             &ha->pool.unusable.head);
4107                                         ha->pool.unusable.count++;
4108                                 } else {
4109                                         list_add_tail(&dsd->list,
4110                                             &ha->pool.good.head);
4111                                         ha->pool.good.count++;
4112                                 }
4113                         }
4114
4115                         /* return the good ones back to the pool */
4116                         list_for_each_entry_safe(dsd, nxt,
4117                             &ha->pool.good.head, list) {
4118                                 list_del(&dsd->list);
4119                                 dma_pool_free(ha->dif_bundl_pool,
4120                                     dsd->dsd_addr, dsd->dsd_list_dma);
4121                                 ha->dif_bundle_dma_allocs--;
4122                                 kfree(dsd);
4123                                 ha->dif_bundle_kallocs--;
4124                         }
4125
4126                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4127                             "%s: dif dma pool (good=%u unusable=%u)\n",
4128                             __func__, ha->pool.good.count,
4129                             ha->pool.unusable.count);
4130                 }
4131
4132                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4133                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4134                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4135                     ha->dif_bundl_pool);
4136         }
4137
4138         /* Allocate memory for SNS commands */
4139         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4140         /* Get consistent memory allocated for SNS commands */
4141                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4142                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4143                 if (!ha->sns_cmd)
4144                         goto fail_dma_pool;
4145                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4146                     "sns_cmd: %p.\n", ha->sns_cmd);
4147         } else {
4148         /* Get consistent memory allocated for MS IOCB */
4149                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4150                         &ha->ms_iocb_dma);
4151                 if (!ha->ms_iocb)
4152                         goto fail_dma_pool;
4153         /* Get consistent memory allocated for CT SNS commands */
4154                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4155                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4156                 if (!ha->ct_sns)
4157                         goto fail_free_ms_iocb;
4158                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4159                     "ms_iocb=%p ct_sns=%p.\n",
4160                     ha->ms_iocb, ha->ct_sns);
4161         }
4162
4163         /* Allocate memory for request ring */
4164         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4165         if (!*req) {
4166                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4167                     "Failed to allocate memory for req.\n");
4168                 goto fail_req;
4169         }
4170         (*req)->length = req_len;
4171         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4172                 ((*req)->length + 1) * sizeof(request_t),
4173                 &(*req)->dma, GFP_KERNEL);
4174         if (!(*req)->ring) {
4175                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4176                     "Failed to allocate memory for req_ring.\n");
4177                 goto fail_req_ring;
4178         }
4179         /* Allocate memory for response ring */
4180         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4181         if (!*rsp) {
4182                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4183                     "Failed to allocate memory for rsp.\n");
4184                 goto fail_rsp;
4185         }
4186         (*rsp)->hw = ha;
4187         (*rsp)->length = rsp_len;
4188         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4189                 ((*rsp)->length + 1) * sizeof(response_t),
4190                 &(*rsp)->dma, GFP_KERNEL);
4191         if (!(*rsp)->ring) {
4192                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4193                     "Failed to allocate memory for rsp_ring.\n");
4194                 goto fail_rsp_ring;
4195         }
4196         (*req)->rsp = *rsp;
4197         (*rsp)->req = *req;
4198         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4199             "req=%p req->length=%d req->ring=%p rsp=%p "
4200             "rsp->length=%d rsp->ring=%p.\n",
4201             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4202             (*rsp)->ring);
4203         /* Allocate memory for NVRAM data for vports */
4204         if (ha->nvram_npiv_size) {
4205                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4206                                         sizeof(struct qla_npiv_entry),
4207                                         GFP_KERNEL);
4208                 if (!ha->npiv_info) {
4209                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4210                             "Failed to allocate memory for npiv_info.\n");
4211                         goto fail_npiv_info;
4212                 }
4213         } else
4214                 ha->npiv_info = NULL;
4215
4216         /* Get consistent memory allocated for EX-INIT-CB. */
4217         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4218             IS_QLA28XX(ha)) {
4219                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4220                     &ha->ex_init_cb_dma);
4221                 if (!ha->ex_init_cb)
4222                         goto fail_ex_init_cb;
4223                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4224                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4225         }
4226
4227         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4228
4229         /* Get consistent memory allocated for Async Port-Database. */
4230         if (!IS_FWI2_CAPABLE(ha)) {
4231                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4232                         &ha->async_pd_dma);
4233                 if (!ha->async_pd)
4234                         goto fail_async_pd;
4235                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4236                     "async_pd=%p.\n", ha->async_pd);
4237         }
4238
4239         INIT_LIST_HEAD(&ha->vp_list);
4240
4241         /* Allocate memory for our loop_id bitmap */
4242         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4243                                   sizeof(long),
4244                                   GFP_KERNEL);
4245         if (!ha->loop_id_map)
4246                 goto fail_loop_id_map;
4247         else {
4248                 qla2x00_set_reserved_loop_ids(ha);
4249                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4250                     "loop_id_map=%p.\n", ha->loop_id_map);
4251         }
4252
4253         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4254             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4255         if (!ha->sfp_data) {
4256                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4257                     "Unable to allocate memory for SFP read-data.\n");
4258                 goto fail_sfp_data;
4259         }
4260
4261         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4262             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4263             GFP_KERNEL);
4264         if (!ha->flt) {
4265                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4266                     "Unable to allocate memory for FLT.\n");
4267                 goto fail_flt_buffer;
4268         }
4269
4270         return 0;
4271
4272 fail_flt_buffer:
4273         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4274             ha->sfp_data, ha->sfp_data_dma);
4275 fail_sfp_data:
4276         kfree(ha->loop_id_map);
4277 fail_loop_id_map:
4278         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4279 fail_async_pd:
4280         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4281 fail_ex_init_cb:
4282         kfree(ha->npiv_info);
4283 fail_npiv_info:
4284         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4285                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4286         (*rsp)->ring = NULL;
4287         (*rsp)->dma = 0;
4288 fail_rsp_ring:
4289         kfree(*rsp);
4290         *rsp = NULL;
4291 fail_rsp:
4292         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4293                 sizeof(request_t), (*req)->ring, (*req)->dma);
4294         (*req)->ring = NULL;
4295         (*req)->dma = 0;
4296 fail_req_ring:
4297         kfree(*req);
4298         *req = NULL;
4299 fail_req:
4300         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4301                 ha->ct_sns, ha->ct_sns_dma);
4302         ha->ct_sns = NULL;
4303         ha->ct_sns_dma = 0;
4304 fail_free_ms_iocb:
4305         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4306         ha->ms_iocb = NULL;
4307         ha->ms_iocb_dma = 0;
4308
4309         if (ha->sns_cmd)
4310                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4311                     ha->sns_cmd, ha->sns_cmd_dma);
4312 fail_dma_pool:
4313         if (ql2xenabledif) {
4314                 struct dsd_dma *dsd, *nxt;
4315
4316                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4317                     list) {
4318                         list_del(&dsd->list);
4319                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4320                             dsd->dsd_list_dma);
4321                         ha->dif_bundle_dma_allocs--;
4322                         kfree(dsd);
4323                         ha->dif_bundle_kallocs--;
4324                         ha->pool.unusable.count--;
4325                 }
4326                 dma_pool_destroy(ha->dif_bundl_pool);
4327                 ha->dif_bundl_pool = NULL;
4328         }
4329
4330 fail_dif_bundl_dma_pool:
4331         if (IS_QLA82XX(ha) || ql2xenabledif) {
4332                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4333                 ha->fcp_cmnd_dma_pool = NULL;
4334         }
4335 fail_dl_dma_pool:
4336         if (IS_QLA82XX(ha) || ql2xenabledif) {
4337                 dma_pool_destroy(ha->dl_dma_pool);
4338                 ha->dl_dma_pool = NULL;
4339         }
4340 fail_s_dma_pool:
4341         dma_pool_destroy(ha->s_dma_pool);
4342         ha->s_dma_pool = NULL;
4343 fail_free_nvram:
4344         kfree(ha->nvram);
4345         ha->nvram = NULL;
4346 fail_free_ctx_mempool:
4347         mempool_destroy(ha->ctx_mempool);
4348         ha->ctx_mempool = NULL;
4349 fail_free_srb_mempool:
4350         mempool_destroy(ha->srb_mempool);
4351         ha->srb_mempool = NULL;
4352 fail_free_gid_list:
4353         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4354         ha->gid_list,
4355         ha->gid_list_dma);
4356         ha->gid_list = NULL;
4357         ha->gid_list_dma = 0;
4358 fail_free_tgt_mem:
4359         qlt_mem_free(ha);
4360 fail_free_init_cb:
4361         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4362         ha->init_cb_dma);
4363         ha->init_cb = NULL;
4364         ha->init_cb_dma = 0;
4365 fail:
4366         ql_log(ql_log_fatal, NULL, 0x0030,
4367             "Memory allocation failure.\n");
4368         return -ENOMEM;
4369 }
4370
4371 int
4372 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4373 {
4374         int rval;
4375         uint16_t        size, max_cnt, temp;
4376         struct qla_hw_data *ha = vha->hw;
4377
4378         /* Return if we don't need to alloacate any extended logins */
4379         if (!ql2xexlogins)
4380                 return QLA_SUCCESS;
4381
4382         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4383                 return QLA_SUCCESS;
4384
4385         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4386         max_cnt = 0;
4387         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4388         if (rval != QLA_SUCCESS) {
4389                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4390                     "Failed to get exlogin status.\n");
4391                 return rval;
4392         }
4393
4394         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4395         temp *= size;
4396
4397         if (temp != ha->exlogin_size) {
4398                 qla2x00_free_exlogin_buffer(ha);
4399                 ha->exlogin_size = temp;
4400
4401                 ql_log(ql_log_info, vha, 0xd024,
4402                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4403                     max_cnt, size, temp);
4404
4405                 ql_log(ql_log_info, vha, 0xd025,
4406                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4407
4408                 /* Get consistent memory for extended logins */
4409                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4410                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4411                 if (!ha->exlogin_buf) {
4412                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4413                     "Failed to allocate memory for exlogin_buf_dma.\n");
4414                         return -ENOMEM;
4415                 }
4416         }
4417
4418         /* Now configure the dma buffer */
4419         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4420         if (rval) {
4421                 ql_log(ql_log_fatal, vha, 0xd033,
4422                     "Setup extended login buffer  ****FAILED****.\n");
4423                 qla2x00_free_exlogin_buffer(ha);
4424         }
4425
4426         return rval;
4427 }
4428
4429 /*
4430 * qla2x00_free_exlogin_buffer
4431 *
4432 * Input:
4433 *       ha = adapter block pointer
4434 */
4435 void
4436 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4437 {
4438         if (ha->exlogin_buf) {
4439                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4440                     ha->exlogin_buf, ha->exlogin_buf_dma);
4441                 ha->exlogin_buf = NULL;
4442                 ha->exlogin_size = 0;
4443         }
4444 }
4445
4446 static void
4447 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4448 {
4449         u32 temp;
4450         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4451         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4452
4453         if (max_cnt > vha->hw->max_exchg)
4454                 max_cnt = vha->hw->max_exchg;
4455
4456         if (qla_ini_mode_enabled(vha)) {
4457                 if (vha->ql2xiniexchg > max_cnt)
4458                         vha->ql2xiniexchg = max_cnt;
4459
4460                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4461                         *ret_cnt = vha->ql2xiniexchg;
4462
4463         } else if (qla_tgt_mode_enabled(vha)) {
4464                 if (vha->ql2xexchoffld > max_cnt) {
4465                         vha->ql2xexchoffld = max_cnt;
4466                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4467                 }
4468
4469                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4470                         *ret_cnt = vha->ql2xexchoffld;
4471         } else if (qla_dual_mode_enabled(vha)) {
4472                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4473                 if (temp > max_cnt) {
4474                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4475                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4476                         temp = max_cnt;
4477                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4478                 }
4479
4480                 if (temp > FW_DEF_EXCHANGES_CNT)
4481                         *ret_cnt = temp;
4482         }
4483 }
4484
4485 int
4486 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4487 {
4488         int rval;
4489         u16     size, max_cnt;
4490         u32 actual_cnt, totsz;
4491         struct qla_hw_data *ha = vha->hw;
4492
4493         if (!ha->flags.exchoffld_enabled)
4494                 return QLA_SUCCESS;
4495
4496         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4497                 return QLA_SUCCESS;
4498
4499         max_cnt = 0;
4500         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4501         if (rval != QLA_SUCCESS) {
4502                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4503                     "Failed to get exlogin status.\n");
4504                 return rval;
4505         }
4506
4507         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4508         ql_log(ql_log_info, vha, 0xd014,
4509             "Actual exchange offload count: %d.\n", actual_cnt);
4510
4511         totsz = actual_cnt * size;
4512
4513         if (totsz != ha->exchoffld_size) {
4514                 qla2x00_free_exchoffld_buffer(ha);
4515                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4516                         ha->exchoffld_size = 0;
4517                         ha->flags.exchoffld_enabled = 0;
4518                         return QLA_SUCCESS;
4519                 }
4520
4521                 ha->exchoffld_size = totsz;
4522
4523                 ql_log(ql_log_info, vha, 0xd016,
4524                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4525                     max_cnt, actual_cnt, size, totsz);
4526
4527                 ql_log(ql_log_info, vha, 0xd017,
4528                     "Exchange Buffers requested size = 0x%x\n",
4529                     ha->exchoffld_size);
4530
4531                 /* Get consistent memory for extended logins */
4532                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4533                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4534                 if (!ha->exchoffld_buf) {
4535                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4536                         "Failed to allocate memory for Exchange Offload.\n");
4537
4538                         if (ha->max_exchg >
4539                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4540                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4541                         } else if (ha->max_exchg >
4542                             (FW_DEF_EXCHANGES_CNT + 512)) {
4543                                 ha->max_exchg -= 512;
4544                         } else {
4545                                 ha->flags.exchoffld_enabled = 0;
4546                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4547                                     "Disabling Exchange offload due to lack of memory\n");
4548                         }
4549                         ha->exchoffld_size = 0;
4550
4551                         return -ENOMEM;
4552                 }
4553         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4554                 /* pathological case */
4555                 qla2x00_free_exchoffld_buffer(ha);
4556                 ha->exchoffld_size = 0;
4557                 ha->flags.exchoffld_enabled = 0;
4558                 ql_log(ql_log_info, vha, 0xd016,
4559                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4560                     ha->exchoffld_size, actual_cnt, size, totsz);
4561                 return 0;
4562         }
4563
4564         /* Now configure the dma buffer */
4565         rval = qla_set_exchoffld_mem_cfg(vha);
4566         if (rval) {
4567                 ql_log(ql_log_fatal, vha, 0xd02e,
4568                     "Setup exchange offload buffer ****FAILED****.\n");
4569                 qla2x00_free_exchoffld_buffer(ha);
4570         } else {
4571                 /* re-adjust number of target exchange */
4572                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4573
4574                 if (qla_ini_mode_enabled(vha))
4575                         icb->exchange_count = 0;
4576                 else
4577                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4578         }
4579
4580         return rval;
4581 }
4582
4583 /*
4584 * qla2x00_free_exchoffld_buffer
4585 *
4586 * Input:
4587 *       ha = adapter block pointer
4588 */
4589 void
4590 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4591 {
4592         if (ha->exchoffld_buf) {
4593                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4594                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4595                 ha->exchoffld_buf = NULL;
4596                 ha->exchoffld_size = 0;
4597         }
4598 }
4599
4600 /*
4601 * qla2x00_free_fw_dump
4602 *       Frees fw dump stuff.
4603 *
4604 * Input:
4605 *       ha = adapter block pointer
4606 */
4607 static void
4608 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4609 {
4610         struct fwdt *fwdt = ha->fwdt;
4611         uint j;
4612
4613         if (ha->fce)
4614                 dma_free_coherent(&ha->pdev->dev,
4615                     FCE_SIZE, ha->fce, ha->fce_dma);
4616
4617         if (ha->eft)
4618                 dma_free_coherent(&ha->pdev->dev,
4619                     EFT_SIZE, ha->eft, ha->eft_dma);
4620
4621         if (ha->fw_dump)
4622                 vfree(ha->fw_dump);
4623
4624         ha->fce = NULL;
4625         ha->fce_dma = 0;
4626         ha->eft = NULL;
4627         ha->eft_dma = 0;
4628         ha->fw_dumped = 0;
4629         ha->fw_dump_cap_flags = 0;
4630         ha->fw_dump_reading = 0;
4631         ha->fw_dump = NULL;
4632         ha->fw_dump_len = 0;
4633
4634         for (j = 0; j < 2; j++, fwdt++) {
4635                 if (fwdt->template)
4636                         vfree(fwdt->template);
4637                 fwdt->template = NULL;
4638                 fwdt->length = 0;
4639         }
4640 }
4641
4642 /*
4643 * qla2x00_mem_free
4644 *      Frees all adapter allocated memory.
4645 *
4646 * Input:
4647 *      ha = adapter block pointer.
4648 */
4649 static void
4650 qla2x00_mem_free(struct qla_hw_data *ha)
4651 {
4652         qla2x00_free_fw_dump(ha);
4653
4654         if (ha->mctp_dump)
4655                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4656                     ha->mctp_dump_dma);
4657         ha->mctp_dump = NULL;
4658
4659         mempool_destroy(ha->srb_mempool);
4660         ha->srb_mempool = NULL;
4661
4662         if (ha->dcbx_tlv)
4663                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4664                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4665         ha->dcbx_tlv = NULL;
4666
4667         if (ha->xgmac_data)
4668                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4669                     ha->xgmac_data, ha->xgmac_data_dma);
4670         ha->xgmac_data = NULL;
4671
4672         if (ha->sns_cmd)
4673                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4674                 ha->sns_cmd, ha->sns_cmd_dma);
4675         ha->sns_cmd = NULL;
4676         ha->sns_cmd_dma = 0;
4677
4678         if (ha->ct_sns)
4679                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4680                 ha->ct_sns, ha->ct_sns_dma);
4681         ha->ct_sns = NULL;
4682         ha->ct_sns_dma = 0;
4683
4684         if (ha->sfp_data)
4685                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4686                     ha->sfp_data_dma);
4687         ha->sfp_data = NULL;
4688
4689         if (ha->flt)
4690                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4691                     ha->flt, ha->flt_dma);
4692         ha->flt = NULL;
4693         ha->flt_dma = 0;
4694
4695         if (ha->ms_iocb)
4696                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4697         ha->ms_iocb = NULL;
4698         ha->ms_iocb_dma = 0;
4699
4700         if (ha->ex_init_cb)
4701                 dma_pool_free(ha->s_dma_pool,
4702                         ha->ex_init_cb, ha->ex_init_cb_dma);
4703         ha->ex_init_cb = NULL;
4704         ha->ex_init_cb_dma = 0;
4705
4706         if (ha->async_pd)
4707                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4708         ha->async_pd = NULL;
4709         ha->async_pd_dma = 0;
4710
4711         dma_pool_destroy(ha->s_dma_pool);
4712         ha->s_dma_pool = NULL;
4713
4714         if (ha->gid_list)
4715                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4716                 ha->gid_list, ha->gid_list_dma);
4717         ha->gid_list = NULL;
4718         ha->gid_list_dma = 0;
4719
4720         if (IS_QLA82XX(ha)) {
4721                 if (!list_empty(&ha->gbl_dsd_list)) {
4722                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4723
4724                         /* clean up allocated prev pool */
4725                         list_for_each_entry_safe(dsd_ptr,
4726                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4727                                 dma_pool_free(ha->dl_dma_pool,
4728                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4729                                 list_del(&dsd_ptr->list);
4730                                 kfree(dsd_ptr);
4731                         }
4732                 }
4733         }
4734
4735         dma_pool_destroy(ha->dl_dma_pool);
4736         ha->dl_dma_pool = NULL;
4737
4738         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4739         ha->fcp_cmnd_dma_pool = NULL;
4740
4741         mempool_destroy(ha->ctx_mempool);
4742         ha->ctx_mempool = NULL;
4743
4744         if (ql2xenabledif && ha->dif_bundl_pool) {
4745                 struct dsd_dma *dsd, *nxt;
4746
4747                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4748                                          list) {
4749                         list_del(&dsd->list);
4750                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4751                                       dsd->dsd_list_dma);
4752                         ha->dif_bundle_dma_allocs--;
4753                         kfree(dsd);
4754                         ha->dif_bundle_kallocs--;
4755                         ha->pool.unusable.count--;
4756                 }
4757                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4758                         list_del(&dsd->list);
4759                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4760                                       dsd->dsd_list_dma);
4761                         ha->dif_bundle_dma_allocs--;
4762                         kfree(dsd);
4763                         ha->dif_bundle_kallocs--;
4764                 }
4765         }
4766
4767         dma_pool_destroy(ha->dif_bundl_pool);
4768         ha->dif_bundl_pool = NULL;
4769
4770         qlt_mem_free(ha);
4771
4772         if (ha->init_cb)
4773                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4774                         ha->init_cb, ha->init_cb_dma);
4775         ha->init_cb = NULL;
4776         ha->init_cb_dma = 0;
4777
4778         vfree(ha->optrom_buffer);
4779         ha->optrom_buffer = NULL;
4780         kfree(ha->nvram);
4781         ha->nvram = NULL;
4782         kfree(ha->npiv_info);
4783         ha->npiv_info = NULL;
4784         kfree(ha->swl);
4785         ha->swl = NULL;
4786         kfree(ha->loop_id_map);
4787         ha->loop_id_map = NULL;
4788 }
4789
4790 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4791                                                 struct qla_hw_data *ha)
4792 {
4793         struct Scsi_Host *host;
4794         struct scsi_qla_host *vha = NULL;
4795
4796         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4797         if (!host) {
4798                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4799                     "Failed to allocate host from the scsi layer, aborting.\n");
4800                 return NULL;
4801         }
4802
4803         /* Clear our data area */
4804         vha = shost_priv(host);
4805         memset(vha, 0, sizeof(scsi_qla_host_t));
4806
4807         vha->host = host;
4808         vha->host_no = host->host_no;
4809         vha->hw = ha;
4810
4811         vha->qlini_mode = ql2x_ini_mode;
4812         vha->ql2xexchoffld = ql2xexchoffld;
4813         vha->ql2xiniexchg = ql2xiniexchg;
4814
4815         INIT_LIST_HEAD(&vha->vp_fcports);
4816         INIT_LIST_HEAD(&vha->work_list);
4817         INIT_LIST_HEAD(&vha->list);
4818         INIT_LIST_HEAD(&vha->qla_cmd_list);
4819         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4820         INIT_LIST_HEAD(&vha->logo_list);
4821         INIT_LIST_HEAD(&vha->plogi_ack_list);
4822         INIT_LIST_HEAD(&vha->qp_list);
4823         INIT_LIST_HEAD(&vha->gnl.fcports);
4824         INIT_LIST_HEAD(&vha->gpnid_list);
4825         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4826
4827         spin_lock_init(&vha->work_lock);
4828         spin_lock_init(&vha->cmd_list_lock);
4829         init_waitqueue_head(&vha->fcport_waitQ);
4830         init_waitqueue_head(&vha->vref_waitq);
4831
4832         vha->gnl.size = sizeof(struct get_name_list_extended) *
4833                         (ha->max_loop_id + 1);
4834         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4835             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4836         if (!vha->gnl.l) {
4837                 ql_log(ql_log_fatal, vha, 0xd04a,
4838                     "Alloc failed for name list.\n");
4839                 scsi_host_put(vha->host);
4840                 return NULL;
4841         }
4842
4843         /* todo: what about ext login? */
4844         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4845         vha->scan.l = vmalloc(vha->scan.size);
4846         if (!vha->scan.l) {
4847                 ql_log(ql_log_fatal, vha, 0xd04a,
4848                     "Alloc failed for scan database.\n");
4849                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4850                     vha->gnl.l, vha->gnl.ldma);
4851                 scsi_host_put(vha->host);
4852                 return NULL;
4853         }
4854         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4855
4856         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4857         ql_dbg(ql_dbg_init, vha, 0x0041,
4858             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4859             vha->host, vha->hw, vha,
4860             dev_name(&(ha->pdev->dev)));
4861
4862         return vha;
4863 }
4864
4865 struct qla_work_evt *
4866 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4867 {
4868         struct qla_work_evt *e;
4869         uint8_t bail;
4870
4871         QLA_VHA_MARK_BUSY(vha, bail);
4872         if (bail)
4873                 return NULL;
4874
4875         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4876         if (!e) {
4877                 QLA_VHA_MARK_NOT_BUSY(vha);
4878                 return NULL;
4879         }
4880
4881         INIT_LIST_HEAD(&e->list);
4882         e->type = type;
4883         e->flags = QLA_EVT_FLAG_FREE;
4884         return e;
4885 }
4886
4887 int
4888 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4889 {
4890         unsigned long flags;
4891         bool q = false;
4892
4893         spin_lock_irqsave(&vha->work_lock, flags);
4894         list_add_tail(&e->list, &vha->work_list);
4895
4896         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4897                 q = true;
4898
4899         spin_unlock_irqrestore(&vha->work_lock, flags);
4900
4901         if (q)
4902                 queue_work(vha->hw->wq, &vha->iocb_work);
4903
4904         return QLA_SUCCESS;
4905 }
4906
4907 int
4908 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4909     u32 data)
4910 {
4911         struct qla_work_evt *e;
4912
4913         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4914         if (!e)
4915                 return QLA_FUNCTION_FAILED;
4916
4917         e->u.aen.code = code;
4918         e->u.aen.data = data;
4919         return qla2x00_post_work(vha, e);
4920 }
4921
4922 int
4923 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4924 {
4925         struct qla_work_evt *e;
4926
4927         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4928         if (!e)
4929                 return QLA_FUNCTION_FAILED;
4930
4931         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4932         return qla2x00_post_work(vha, e);
4933 }
4934
4935 #define qla2x00_post_async_work(name, type)     \
4936 int qla2x00_post_async_##name##_work(           \
4937     struct scsi_qla_host *vha,                  \
4938     fc_port_t *fcport, uint16_t *data)          \
4939 {                                               \
4940         struct qla_work_evt *e;                 \
4941                                                 \
4942         e = qla2x00_alloc_work(vha, type);      \
4943         if (!e)                                 \
4944                 return QLA_FUNCTION_FAILED;     \
4945                                                 \
4946         e->u.logio.fcport = fcport;             \
4947         if (data) {                             \
4948                 e->u.logio.data[0] = data[0];   \
4949                 e->u.logio.data[1] = data[1];   \
4950         }                                       \
4951         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4952         return qla2x00_post_work(vha, e);       \
4953 }
4954
4955 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4956 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4957 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4958 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4959 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4960 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4961
4962 int
4963 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4964 {
4965         struct qla_work_evt *e;
4966
4967         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4968         if (!e)
4969                 return QLA_FUNCTION_FAILED;
4970
4971         e->u.uevent.code = code;
4972         return qla2x00_post_work(vha, e);
4973 }
4974
4975 static void
4976 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4977 {
4978         char event_string[40];
4979         char *envp[] = { event_string, NULL };
4980
4981         switch (code) {
4982         case QLA_UEVENT_CODE_FW_DUMP:
4983                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4984                     vha->host_no);
4985                 break;
4986         default:
4987                 /* do nothing */
4988                 break;
4989         }
4990         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4991 }
4992
4993 int
4994 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4995                         uint32_t *data, int cnt)
4996 {
4997         struct qla_work_evt *e;
4998
4999         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
5000         if (!e)
5001                 return QLA_FUNCTION_FAILED;
5002
5003         e->u.aenfx.evtcode = evtcode;
5004         e->u.aenfx.count = cnt;
5005         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
5006         return qla2x00_post_work(vha, e);
5007 }
5008
5009 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
5010 {
5011         unsigned long flags;
5012
5013         if (IS_SW_RESV_ADDR(fcport->d_id))
5014                 return;
5015
5016         spin_lock_irqsave(&fcport->vha->work_lock, flags);
5017         if (fcport->disc_state == DSC_UPD_FCPORT) {
5018                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5019                 return;
5020         }
5021         fcport->jiffies_at_registration = jiffies;
5022         fcport->sec_since_registration = 0;
5023         fcport->next_disc_state = DSC_DELETED;
5024         fcport->disc_state = DSC_UPD_FCPORT;
5025         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5026
5027         queue_work(system_unbound_wq, &fcport->reg_work);
5028 }
5029
5030 static
5031 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5032 {
5033         unsigned long flags;
5034         fc_port_t *fcport =  NULL, *tfcp;
5035         struct qlt_plogi_ack_t *pla =
5036             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5037         uint8_t free_fcport = 0;
5038
5039         ql_dbg(ql_dbg_disc, vha, 0xffff,
5040             "%s %d %8phC enter\n",
5041             __func__, __LINE__, e->u.new_sess.port_name);
5042
5043         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5044         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5045         if (fcport) {
5046                 fcport->d_id = e->u.new_sess.id;
5047                 if (pla) {
5048                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5049                         memcpy(fcport->node_name,
5050                             pla->iocb.u.isp24.u.plogi.node_name,
5051                             WWN_SIZE);
5052                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5053                         /* we took an extra ref_count to prevent PLOGI ACK when
5054                          * fcport/sess has not been created.
5055                          */
5056                         pla->ref_count--;
5057                 }
5058         } else {
5059                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5060                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5061                 if (fcport) {
5062                         fcport->d_id = e->u.new_sess.id;
5063                         fcport->flags |= FCF_FABRIC_DEVICE;
5064                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5065                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_FCP)
5066                                 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
5067
5068                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_NVME) {
5069                                 fcport->fc4_type = FC4_TYPE_OTHER;
5070                                 fcport->fc4f_nvme = FC4_TYPE_NVME;
5071                         }
5072
5073                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5074                             WWN_SIZE);
5075                 } else {
5076                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5077                                    "%s %8phC mem alloc fail.\n",
5078                                    __func__, e->u.new_sess.port_name);
5079
5080                         if (pla) {
5081                                 list_del(&pla->list);
5082                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5083                         }
5084                         return;
5085                 }
5086
5087                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5088                 /* search again to make sure no one else got ahead */
5089                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5090                     e->u.new_sess.port_name, 1);
5091                 if (tfcp) {
5092                         /* should rarily happen */
5093                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5094                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5095                             __func__, tfcp->port_name, tfcp->disc_state,
5096                             tfcp->fw_login_state);
5097
5098                         free_fcport = 1;
5099                 } else {
5100                         list_add_tail(&fcport->list, &vha->vp_fcports);
5101
5102                 }
5103                 if (pla) {
5104                         qlt_plogi_ack_link(vha, pla, fcport,
5105                             QLT_PLOGI_LINK_SAME_WWN);
5106                         pla->ref_count--;
5107                 }
5108         }
5109         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5110
5111         if (fcport) {
5112                 fcport->id_changed = 1;
5113                 fcport->scan_state = QLA_FCPORT_FOUND;
5114                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5115                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5116
5117                 if (pla) {
5118                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5119                                 u16 wd3_lo;
5120
5121                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5122                                 fcport->local = 0;
5123                                 fcport->loop_id =
5124                                         le16_to_cpu(
5125                                             pla->iocb.u.isp24.nport_handle);
5126                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5127                                 wd3_lo =
5128                                     le16_to_cpu(
5129                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5130
5131                                 if (wd3_lo & BIT_7)
5132                                         fcport->conf_compl_supported = 1;
5133
5134                                 if ((wd3_lo & BIT_4) == 0)
5135                                         fcport->port_type = FCT_INITIATOR;
5136                                 else
5137                                         fcport->port_type = FCT_TARGET;
5138                         }
5139                         qlt_plogi_ack_unref(vha, pla);
5140                 } else {
5141                         fc_port_t *dfcp = NULL;
5142
5143                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5144                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5145                             &e->u.new_sess.id, 1);
5146                         if (tfcp && (tfcp != fcport)) {
5147                                 /*
5148                                  * We have a conflict fcport with same NportID.
5149                                  */
5150                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5151                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5152                                     __func__, tfcp->port_name, tfcp->disc_state,
5153                                     tfcp->fw_login_state);
5154
5155                                 switch (tfcp->disc_state) {
5156                                 case DSC_DELETED:
5157                                         break;
5158                                 case DSC_DELETE_PEND:
5159                                         fcport->login_pause = 1;
5160                                         tfcp->conflict = fcport;
5161                                         break;
5162                                 default:
5163                                         fcport->login_pause = 1;
5164                                         tfcp->conflict = fcport;
5165                                         dfcp = tfcp;
5166                                         break;
5167                                 }
5168                         }
5169                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5170                         if (dfcp)
5171                                 qlt_schedule_sess_for_deletion(tfcp);
5172
5173
5174                         if (N2N_TOPO(vha->hw))
5175                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5176
5177                         if (N2N_TOPO(vha->hw)) {
5178                                 if (vha->flags.nvme_enabled) {
5179                                         fcport->fc4f_nvme = 1;
5180                                         fcport->n2n_flag = 1;
5181                                 }
5182                                 fcport->fw_login_state = 0;
5183                                 /*
5184                                  * wait link init done before sending login
5185                                  */
5186                         } else {
5187                                 qla24xx_fcport_handle_login(vha, fcport);
5188                         }
5189                 }
5190         }
5191
5192         if (free_fcport) {
5193                 qla2x00_free_fcport(fcport);
5194                 if (pla) {
5195                         list_del(&pla->list);
5196                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5197                 }
5198         }
5199 }
5200
5201 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5202 {
5203         struct srb *sp = e->u.iosb.sp;
5204         int rval;
5205
5206         rval = qla2x00_start_sp(sp);
5207         if (rval != QLA_SUCCESS) {
5208                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5209                     "%s: %s: Re-issue IOCB failed (%d).\n",
5210                     __func__, sp->name, rval);
5211                 qla24xx_sp_unmap(vha, sp);
5212         }
5213 }
5214
5215 void
5216 qla2x00_do_work(struct scsi_qla_host *vha)
5217 {
5218         struct qla_work_evt *e, *tmp;
5219         unsigned long flags;
5220         LIST_HEAD(work);
5221         int rc;
5222
5223         spin_lock_irqsave(&vha->work_lock, flags);
5224         list_splice_init(&vha->work_list, &work);
5225         spin_unlock_irqrestore(&vha->work_lock, flags);
5226
5227         list_for_each_entry_safe(e, tmp, &work, list) {
5228                 rc = QLA_SUCCESS;
5229                 switch (e->type) {
5230                 case QLA_EVT_AEN:
5231                         fc_host_post_event(vha->host, fc_get_event_number(),
5232                             e->u.aen.code, e->u.aen.data);
5233                         break;
5234                 case QLA_EVT_IDC_ACK:
5235                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5236                         break;
5237                 case QLA_EVT_ASYNC_LOGIN:
5238                         qla2x00_async_login(vha, e->u.logio.fcport,
5239                             e->u.logio.data);
5240                         break;
5241                 case QLA_EVT_ASYNC_LOGOUT:
5242                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5243                         break;
5244                 case QLA_EVT_ASYNC_LOGOUT_DONE:
5245                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
5246                             e->u.logio.data);
5247                         break;
5248                 case QLA_EVT_ASYNC_ADISC:
5249                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5250                             e->u.logio.data);
5251                         break;
5252                 case QLA_EVT_UEVENT:
5253                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5254                         break;
5255                 case QLA_EVT_AENFX:
5256                         qlafx00_process_aen(vha, e);
5257                         break;
5258                 case QLA_EVT_GPNID:
5259                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5260                         break;
5261                 case QLA_EVT_UNMAP:
5262                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5263                         break;
5264                 case QLA_EVT_RELOGIN:
5265                         qla2x00_relogin(vha);
5266                         break;
5267                 case QLA_EVT_NEW_SESS:
5268                         qla24xx_create_new_sess(vha, e);
5269                         break;
5270                 case QLA_EVT_GPDB:
5271                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5272                             e->u.fcport.opt);
5273                         break;
5274                 case QLA_EVT_PRLI:
5275                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5276                         break;
5277                 case QLA_EVT_GPSC:
5278                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5279                         break;
5280                 case QLA_EVT_GNL:
5281                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5282                         break;
5283                 case QLA_EVT_NACK:
5284                         qla24xx_do_nack_work(vha, e);
5285                         break;
5286                 case QLA_EVT_ASYNC_PRLO:
5287                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5288                         break;
5289                 case QLA_EVT_ASYNC_PRLO_DONE:
5290                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5291                             e->u.logio.data);
5292                         break;
5293                 case QLA_EVT_GPNFT:
5294                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5295                             e->u.gpnft.sp);
5296                         break;
5297                 case QLA_EVT_GPNFT_DONE:
5298                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5299                         break;
5300                 case QLA_EVT_GNNFT_DONE:
5301                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5302                         break;
5303                 case QLA_EVT_GNNID:
5304                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5305                         break;
5306                 case QLA_EVT_GFPNID:
5307                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5308                         break;
5309                 case QLA_EVT_SP_RETRY:
5310                         qla_sp_retry(vha, e);
5311                         break;
5312                 case QLA_EVT_IIDMA:
5313                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5314                         break;
5315                 case QLA_EVT_ELS_PLOGI:
5316                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5317                             e->u.fcport.fcport, false);
5318                         break;
5319                 }
5320
5321                 if (rc == EAGAIN) {
5322                         /* put 'work' at head of 'vha->work_list' */
5323                         spin_lock_irqsave(&vha->work_lock, flags);
5324                         list_splice(&work, &vha->work_list);
5325                         spin_unlock_irqrestore(&vha->work_lock, flags);
5326                         break;
5327                 }
5328                 list_del_init(&e->list);
5329                 if (e->flags & QLA_EVT_FLAG_FREE)
5330                         kfree(e);
5331
5332                 /* For each work completed decrement vha ref count */
5333                 QLA_VHA_MARK_NOT_BUSY(vha);
5334         }
5335 }
5336
5337 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5338 {
5339         struct qla_work_evt *e;
5340
5341         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5342
5343         if (!e) {
5344                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5345                 return QLA_FUNCTION_FAILED;
5346         }
5347
5348         return qla2x00_post_work(vha, e);
5349 }
5350
5351 /* Relogins all the fcports of a vport
5352  * Context: dpc thread
5353  */
5354 void qla2x00_relogin(struct scsi_qla_host *vha)
5355 {
5356         fc_port_t       *fcport;
5357         int status, relogin_needed = 0;
5358         struct event_arg ea;
5359
5360         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5361                 /*
5362                  * If the port is not ONLINE then try to login
5363                  * to it if we haven't run out of retries.
5364                  */
5365                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5366                     fcport->login_retry) {
5367                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5368                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5369                                 continue;
5370
5371                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5372                                 fcport->disc_state == DSC_DELETE_PEND) {
5373                                 relogin_needed = 1;
5374                         } else {
5375                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5376                                         memset(&ea, 0, sizeof(ea));
5377                                         ea.event = FCME_RELOGIN;
5378                                         ea.fcport = fcport;
5379                                         qla2x00_fcport_event_handler(vha, &ea);
5380                                 } else if (vha->hw->current_topology ==
5381                                     ISP_CFG_NL) {
5382                                         fcport->login_retry--;
5383                                         status =
5384                                             qla2x00_local_device_login(vha,
5385                                                 fcport);
5386                                         if (status == QLA_SUCCESS) {
5387                                                 fcport->old_loop_id =
5388                                                     fcport->loop_id;
5389                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5390                                                     "Port login OK: logged in ID 0x%x.\n",
5391                                                     fcport->loop_id);
5392                                                 qla2x00_update_fcport
5393                                                         (vha, fcport);
5394                                         } else if (status == 1) {
5395                                                 set_bit(RELOGIN_NEEDED,
5396                                                     &vha->dpc_flags);
5397                                                 /* retry the login again */
5398                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5399                                                     "Retrying %d login again loop_id 0x%x.\n",
5400                                                     fcport->login_retry,
5401                                                     fcport->loop_id);
5402                                         } else {
5403                                                 fcport->login_retry = 0;
5404                                         }
5405
5406                                         if (fcport->login_retry == 0 &&
5407                                             status != QLA_SUCCESS)
5408                                                 qla2x00_clear_loop_id(fcport);
5409                                 }
5410                         }
5411                 }
5412                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5413                         break;
5414         }
5415
5416         if (relogin_needed)
5417                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5418
5419         ql_dbg(ql_dbg_disc, vha, 0x400e,
5420             "Relogin end.\n");
5421 }
5422
5423 /* Schedule work on any of the dpc-workqueues */
5424 void
5425 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5426 {
5427         struct qla_hw_data *ha = base_vha->hw;
5428
5429         switch (work_code) {
5430         case MBA_IDC_AEN: /* 0x8200 */
5431                 if (ha->dpc_lp_wq)
5432                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5433                 break;
5434
5435         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5436                 if (!ha->flags.nic_core_reset_hdlr_active) {
5437                         if (ha->dpc_hp_wq)
5438                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5439                 } else
5440                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5441                             "NIC Core reset is already active. Skip "
5442                             "scheduling it again.\n");
5443                 break;
5444         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5445                 if (ha->dpc_hp_wq)
5446                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5447                 break;
5448         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5449                 if (ha->dpc_hp_wq)
5450                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5451                 break;
5452         default:
5453                 ql_log(ql_log_warn, base_vha, 0xb05f,
5454                     "Unknown work-code=0x%x.\n", work_code);
5455         }
5456
5457         return;
5458 }
5459
5460 /* Work: Perform NIC Core Unrecoverable state handling */
5461 void
5462 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5463 {
5464         struct qla_hw_data *ha =
5465                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5466         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5467         uint32_t dev_state = 0;
5468
5469         qla83xx_idc_lock(base_vha, 0);
5470         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5471         qla83xx_reset_ownership(base_vha);
5472         if (ha->flags.nic_core_reset_owner) {
5473                 ha->flags.nic_core_reset_owner = 0;
5474                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5475                     QLA8XXX_DEV_FAILED);
5476                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5477                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5478         }
5479         qla83xx_idc_unlock(base_vha, 0);
5480 }
5481
5482 /* Work: Execute IDC state handler */
5483 void
5484 qla83xx_idc_state_handler_work(struct work_struct *work)
5485 {
5486         struct qla_hw_data *ha =
5487                 container_of(work, struct qla_hw_data, idc_state_handler);
5488         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5489         uint32_t dev_state = 0;
5490
5491         qla83xx_idc_lock(base_vha, 0);
5492         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5493         if (dev_state == QLA8XXX_DEV_FAILED ||
5494                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5495                 qla83xx_idc_state_handler(base_vha);
5496         qla83xx_idc_unlock(base_vha, 0);
5497 }
5498
5499 static int
5500 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5501 {
5502         int rval = QLA_SUCCESS;
5503         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5504         uint32_t heart_beat_counter1, heart_beat_counter2;
5505
5506         do {
5507                 if (time_after(jiffies, heart_beat_wait)) {
5508                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5509                             "Nic Core f/w is not alive.\n");
5510                         rval = QLA_FUNCTION_FAILED;
5511                         break;
5512                 }
5513
5514                 qla83xx_idc_lock(base_vha, 0);
5515                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5516                     &heart_beat_counter1);
5517                 qla83xx_idc_unlock(base_vha, 0);
5518                 msleep(100);
5519                 qla83xx_idc_lock(base_vha, 0);
5520                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5521                     &heart_beat_counter2);
5522                 qla83xx_idc_unlock(base_vha, 0);
5523         } while (heart_beat_counter1 == heart_beat_counter2);
5524
5525         return rval;
5526 }
5527
5528 /* Work: Perform NIC Core Reset handling */
5529 void
5530 qla83xx_nic_core_reset_work(struct work_struct *work)
5531 {
5532         struct qla_hw_data *ha =
5533                 container_of(work, struct qla_hw_data, nic_core_reset);
5534         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5535         uint32_t dev_state = 0;
5536
5537         if (IS_QLA2031(ha)) {
5538                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5539                         ql_log(ql_log_warn, base_vha, 0xb081,
5540                             "Failed to dump mctp\n");
5541                 return;
5542         }
5543
5544         if (!ha->flags.nic_core_reset_hdlr_active) {
5545                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5546                         qla83xx_idc_lock(base_vha, 0);
5547                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5548                             &dev_state);
5549                         qla83xx_idc_unlock(base_vha, 0);
5550                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5551                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5552                                     "Nic Core f/w is alive.\n");
5553                                 return;
5554                         }
5555                 }
5556
5557                 ha->flags.nic_core_reset_hdlr_active = 1;
5558                 if (qla83xx_nic_core_reset(base_vha)) {
5559                         /* NIC Core reset failed. */
5560                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5561                             "NIC Core reset failed.\n");
5562                 }
5563                 ha->flags.nic_core_reset_hdlr_active = 0;
5564         }
5565 }
5566
5567 /* Work: Handle 8200 IDC aens */
5568 void
5569 qla83xx_service_idc_aen(struct work_struct *work)
5570 {
5571         struct qla_hw_data *ha =
5572                 container_of(work, struct qla_hw_data, idc_aen);
5573         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5574         uint32_t dev_state, idc_control;
5575
5576         qla83xx_idc_lock(base_vha, 0);
5577         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5578         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5579         qla83xx_idc_unlock(base_vha, 0);
5580         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5581                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5582                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5583                             "Application requested NIC Core Reset.\n");
5584                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5585                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5586                     QLA_SUCCESS) {
5587                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5588                             "Other protocol driver requested NIC Core Reset.\n");
5589                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5590                 }
5591         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5592                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5593                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5594         }
5595 }
5596
5597 static void
5598 qla83xx_wait_logic(void)
5599 {
5600         int i;
5601
5602         /* Yield CPU */
5603         if (!in_interrupt()) {
5604                 /*
5605                  * Wait about 200ms before retrying again.
5606                  * This controls the number of retries for single
5607                  * lock operation.
5608                  */
5609                 msleep(100);
5610                 schedule();
5611         } else {
5612                 for (i = 0; i < 20; i++)
5613                         cpu_relax(); /* This a nop instr on i386 */
5614         }
5615 }
5616
5617 static int
5618 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5619 {
5620         int rval;
5621         uint32_t data;
5622         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5623         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5624         struct qla_hw_data *ha = base_vha->hw;
5625
5626         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5627             "Trying force recovery of the IDC lock.\n");
5628
5629         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5630         if (rval)
5631                 return rval;
5632
5633         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5634                 return QLA_SUCCESS;
5635         } else {
5636                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5637                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5638                     data);
5639                 if (rval)
5640                         return rval;
5641
5642                 msleep(200);
5643
5644                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5645                     &data);
5646                 if (rval)
5647                         return rval;
5648
5649                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5650                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5651                                         ~(idc_lck_rcvry_stage_mask));
5652                         rval = qla83xx_wr_reg(base_vha,
5653                             QLA83XX_IDC_LOCK_RECOVERY, data);
5654                         if (rval)
5655                                 return rval;
5656
5657                         /* Forcefully perform IDC UnLock */
5658                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5659                             &data);
5660                         if (rval)
5661                                 return rval;
5662                         /* Clear lock-id by setting 0xff */
5663                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5664                             0xff);
5665                         if (rval)
5666                                 return rval;
5667                         /* Clear lock-recovery by setting 0x0 */
5668                         rval = qla83xx_wr_reg(base_vha,
5669                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5670                         if (rval)
5671                                 return rval;
5672                 } else
5673                         return QLA_SUCCESS;
5674         }
5675
5676         return rval;
5677 }
5678
5679 static int
5680 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5681 {
5682         int rval = QLA_SUCCESS;
5683         uint32_t o_drv_lockid, n_drv_lockid;
5684         unsigned long lock_recovery_timeout;
5685
5686         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5687 retry_lockid:
5688         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5689         if (rval)
5690                 goto exit;
5691
5692         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5693         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5694                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5695                         return QLA_SUCCESS;
5696                 else
5697                         return QLA_FUNCTION_FAILED;
5698         }
5699
5700         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5701         if (rval)
5702                 goto exit;
5703
5704         if (o_drv_lockid == n_drv_lockid) {
5705                 qla83xx_wait_logic();
5706                 goto retry_lockid;
5707         } else
5708                 return QLA_SUCCESS;
5709
5710 exit:
5711         return rval;
5712 }
5713
5714 void
5715 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5716 {
5717         uint32_t data;
5718         uint32_t lock_owner;
5719         struct qla_hw_data *ha = base_vha->hw;
5720
5721         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5722 retry_lock:
5723         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5724             == QLA_SUCCESS) {
5725                 if (data) {
5726                         /* Setting lock-id to our function-number */
5727                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5728                             ha->portnum);
5729                 } else {
5730                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5731                             &lock_owner);
5732                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5733                             "Failed to acquire IDC lock, acquired by %d, "
5734                             "retrying...\n", lock_owner);
5735
5736                         /* Retry/Perform IDC-Lock recovery */
5737                         if (qla83xx_idc_lock_recovery(base_vha)
5738                             == QLA_SUCCESS) {
5739                                 qla83xx_wait_logic();
5740                                 goto retry_lock;
5741                         } else
5742                                 ql_log(ql_log_warn, base_vha, 0xb075,
5743                                     "IDC Lock recovery FAILED.\n");
5744                 }
5745
5746         }
5747
5748         return;
5749 }
5750
5751 void
5752 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5753 {
5754 #if 0
5755         uint16_t options = (requester_id << 15) | BIT_7;
5756 #endif
5757         uint16_t retry;
5758         uint32_t data;
5759         struct qla_hw_data *ha = base_vha->hw;
5760
5761         /* IDC-unlock implementation using driver-unlock/lock-id
5762          * remote registers
5763          */
5764         retry = 0;
5765 retry_unlock:
5766         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5767             == QLA_SUCCESS) {
5768                 if (data == ha->portnum) {
5769                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5770                         /* Clearing lock-id by setting 0xff */
5771                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5772                 } else if (retry < 10) {
5773                         /* SV: XXX: IDC unlock retrying needed here? */
5774
5775                         /* Retry for IDC-unlock */
5776                         qla83xx_wait_logic();
5777                         retry++;
5778                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5779                             "Failed to release IDC lock, retrying=%d\n", retry);
5780                         goto retry_unlock;
5781                 }
5782         } else if (retry < 10) {
5783                 /* Retry for IDC-unlock */
5784                 qla83xx_wait_logic();
5785                 retry++;
5786                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5787                     "Failed to read drv-lockid, retrying=%d\n", retry);
5788                 goto retry_unlock;
5789         }
5790
5791         return;
5792
5793 #if 0
5794         /* XXX: IDC-unlock implementation using access-control mbx */
5795         retry = 0;
5796 retry_unlock2:
5797         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5798                 if (retry < 10) {
5799                         /* Retry for IDC-unlock */
5800                         qla83xx_wait_logic();
5801                         retry++;
5802                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5803                             "Failed to release IDC lock, retrying=%d\n", retry);
5804                         goto retry_unlock2;
5805                 }
5806         }
5807
5808         return;
5809 #endif
5810 }
5811
5812 int
5813 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5814 {
5815         int rval = QLA_SUCCESS;
5816         struct qla_hw_data *ha = vha->hw;
5817         uint32_t drv_presence;
5818
5819         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5820         if (rval == QLA_SUCCESS) {
5821                 drv_presence |= (1 << ha->portnum);
5822                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5823                     drv_presence);
5824         }
5825
5826         return rval;
5827 }
5828
5829 int
5830 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5831 {
5832         int rval = QLA_SUCCESS;
5833
5834         qla83xx_idc_lock(vha, 0);
5835         rval = __qla83xx_set_drv_presence(vha);
5836         qla83xx_idc_unlock(vha, 0);
5837
5838         return rval;
5839 }
5840
5841 int
5842 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5843 {
5844         int rval = QLA_SUCCESS;
5845         struct qla_hw_data *ha = vha->hw;
5846         uint32_t drv_presence;
5847
5848         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5849         if (rval == QLA_SUCCESS) {
5850                 drv_presence &= ~(1 << ha->portnum);
5851                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5852                     drv_presence);
5853         }
5854
5855         return rval;
5856 }
5857
5858 int
5859 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5860 {
5861         int rval = QLA_SUCCESS;
5862
5863         qla83xx_idc_lock(vha, 0);
5864         rval = __qla83xx_clear_drv_presence(vha);
5865         qla83xx_idc_unlock(vha, 0);
5866
5867         return rval;
5868 }
5869
5870 static void
5871 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5872 {
5873         struct qla_hw_data *ha = vha->hw;
5874         uint32_t drv_ack, drv_presence;
5875         unsigned long ack_timeout;
5876
5877         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5878         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5879         while (1) {
5880                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5881                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5882                 if ((drv_ack & drv_presence) == drv_presence)
5883                         break;
5884
5885                 if (time_after_eq(jiffies, ack_timeout)) {
5886                         ql_log(ql_log_warn, vha, 0xb067,
5887                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5888                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5889                         /*
5890                          * The function(s) which did not ack in time are forced
5891                          * to withdraw any further participation in the IDC
5892                          * reset.
5893                          */
5894                         if (drv_ack != drv_presence)
5895                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5896                                     drv_ack);
5897                         break;
5898                 }
5899
5900                 qla83xx_idc_unlock(vha, 0);
5901                 msleep(1000);
5902                 qla83xx_idc_lock(vha, 0);
5903         }
5904
5905         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5906         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5907 }
5908
5909 static int
5910 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5911 {
5912         int rval = QLA_SUCCESS;
5913         uint32_t idc_control;
5914
5915         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5916         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5917
5918         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5919         __qla83xx_get_idc_control(vha, &idc_control);
5920         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5921         __qla83xx_set_idc_control(vha, 0);
5922
5923         qla83xx_idc_unlock(vha, 0);
5924         rval = qla83xx_restart_nic_firmware(vha);
5925         qla83xx_idc_lock(vha, 0);
5926
5927         if (rval != QLA_SUCCESS) {
5928                 ql_log(ql_log_fatal, vha, 0xb06a,
5929                     "Failed to restart NIC f/w.\n");
5930                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5931                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5932         } else {
5933                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5934                     "Success in restarting nic f/w.\n");
5935                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5936                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5937         }
5938
5939         return rval;
5940 }
5941
5942 /* Assumes idc_lock always held on entry */
5943 int
5944 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5945 {
5946         struct qla_hw_data *ha = base_vha->hw;
5947         int rval = QLA_SUCCESS;
5948         unsigned long dev_init_timeout;
5949         uint32_t dev_state;
5950
5951         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5952         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5953
5954         while (1) {
5955
5956                 if (time_after_eq(jiffies, dev_init_timeout)) {
5957                         ql_log(ql_log_warn, base_vha, 0xb06e,
5958                             "Initialization TIMEOUT!\n");
5959                         /* Init timeout. Disable further NIC Core
5960                          * communication.
5961                          */
5962                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5963                                 QLA8XXX_DEV_FAILED);
5964                         ql_log(ql_log_info, base_vha, 0xb06f,
5965                             "HW State: FAILED.\n");
5966                 }
5967
5968                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5969                 switch (dev_state) {
5970                 case QLA8XXX_DEV_READY:
5971                         if (ha->flags.nic_core_reset_owner)
5972                                 qla83xx_idc_audit(base_vha,
5973                                     IDC_AUDIT_COMPLETION);
5974                         ha->flags.nic_core_reset_owner = 0;
5975                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5976                             "Reset_owner reset by 0x%x.\n",
5977                             ha->portnum);
5978                         goto exit;
5979                 case QLA8XXX_DEV_COLD:
5980                         if (ha->flags.nic_core_reset_owner)
5981                                 rval = qla83xx_device_bootstrap(base_vha);
5982                         else {
5983                         /* Wait for AEN to change device-state */
5984                                 qla83xx_idc_unlock(base_vha, 0);
5985                                 msleep(1000);
5986                                 qla83xx_idc_lock(base_vha, 0);
5987                         }
5988                         break;
5989                 case QLA8XXX_DEV_INITIALIZING:
5990                         /* Wait for AEN to change device-state */
5991                         qla83xx_idc_unlock(base_vha, 0);
5992                         msleep(1000);
5993                         qla83xx_idc_lock(base_vha, 0);
5994                         break;
5995                 case QLA8XXX_DEV_NEED_RESET:
5996                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5997                                 qla83xx_need_reset_handler(base_vha);
5998                         else {
5999                                 /* Wait for AEN to change device-state */
6000                                 qla83xx_idc_unlock(base_vha, 0);
6001                                 msleep(1000);
6002                                 qla83xx_idc_lock(base_vha, 0);
6003                         }
6004                         /* reset timeout value after need reset handler */
6005                         dev_init_timeout = jiffies +
6006                             (ha->fcoe_dev_init_timeout * HZ);
6007                         break;
6008                 case QLA8XXX_DEV_NEED_QUIESCENT:
6009                         /* XXX: DEBUG for now */
6010                         qla83xx_idc_unlock(base_vha, 0);
6011                         msleep(1000);
6012                         qla83xx_idc_lock(base_vha, 0);
6013                         break;
6014                 case QLA8XXX_DEV_QUIESCENT:
6015                         /* XXX: DEBUG for now */
6016                         if (ha->flags.quiesce_owner)
6017                                 goto exit;
6018
6019                         qla83xx_idc_unlock(base_vha, 0);
6020                         msleep(1000);
6021                         qla83xx_idc_lock(base_vha, 0);
6022                         dev_init_timeout = jiffies +
6023                             (ha->fcoe_dev_init_timeout * HZ);
6024                         break;
6025                 case QLA8XXX_DEV_FAILED:
6026                         if (ha->flags.nic_core_reset_owner)
6027                                 qla83xx_idc_audit(base_vha,
6028                                     IDC_AUDIT_COMPLETION);
6029                         ha->flags.nic_core_reset_owner = 0;
6030                         __qla83xx_clear_drv_presence(base_vha);
6031                         qla83xx_idc_unlock(base_vha, 0);
6032                         qla8xxx_dev_failed_handler(base_vha);
6033                         rval = QLA_FUNCTION_FAILED;
6034                         qla83xx_idc_lock(base_vha, 0);
6035                         goto exit;
6036                 case QLA8XXX_BAD_VALUE:
6037                         qla83xx_idc_unlock(base_vha, 0);
6038                         msleep(1000);
6039                         qla83xx_idc_lock(base_vha, 0);
6040                         break;
6041                 default:
6042                         ql_log(ql_log_warn, base_vha, 0xb071,
6043                             "Unknown Device State: %x.\n", dev_state);
6044                         qla83xx_idc_unlock(base_vha, 0);
6045                         qla8xxx_dev_failed_handler(base_vha);
6046                         rval = QLA_FUNCTION_FAILED;
6047                         qla83xx_idc_lock(base_vha, 0);
6048                         goto exit;
6049                 }
6050         }
6051
6052 exit:
6053         return rval;
6054 }
6055
6056 void
6057 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6058 {
6059         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6060             board_disable);
6061         struct pci_dev *pdev = ha->pdev;
6062         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6063
6064         /*
6065          * if UNLOAD flag is already set, then continue unload,
6066          * where it was set first.
6067          */
6068         if (test_bit(UNLOADING, &base_vha->dpc_flags))
6069                 return;
6070
6071         ql_log(ql_log_warn, base_vha, 0x015b,
6072             "Disabling adapter.\n");
6073
6074         if (!atomic_read(&pdev->enable_cnt)) {
6075                 ql_log(ql_log_info, base_vha, 0xfffc,
6076                     "PCI device disabled, no action req for PCI error=%lx\n",
6077                     base_vha->pci_flags);
6078                 return;
6079         }
6080
6081         qla2x00_wait_for_sess_deletion(base_vha);
6082
6083         set_bit(UNLOADING, &base_vha->dpc_flags);
6084
6085         qla2x00_delete_all_vps(ha, base_vha);
6086
6087         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6088
6089         qla2x00_dfs_remove(base_vha);
6090
6091         qla84xx_put_chip(base_vha);
6092
6093         if (base_vha->timer_active)
6094                 qla2x00_stop_timer(base_vha);
6095
6096         base_vha->flags.online = 0;
6097
6098         qla2x00_destroy_deferred_work(ha);
6099
6100         /*
6101          * Do not try to stop beacon blink as it will issue a mailbox
6102          * command.
6103          */
6104         qla2x00_free_sysfs_attr(base_vha, false);
6105
6106         fc_remove_host(base_vha->host);
6107
6108         scsi_remove_host(base_vha->host);
6109
6110         base_vha->flags.init_done = 0;
6111         qla25xx_delete_queues(base_vha);
6112         qla2x00_free_fcports(base_vha);
6113         qla2x00_free_irqs(base_vha);
6114         qla2x00_mem_free(ha);
6115         qla82xx_md_free(base_vha);
6116         qla2x00_free_queues(ha);
6117
6118         qla2x00_unmap_iobases(ha);
6119
6120         pci_release_selected_regions(ha->pdev, ha->bars);
6121         pci_disable_pcie_error_reporting(pdev);
6122         pci_disable_device(pdev);
6123
6124         /*
6125          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6126          */
6127 }
6128
6129 /**************************************************************************
6130 * qla2x00_do_dpc
6131 *   This kernel thread is a task that is schedule by the interrupt handler
6132 *   to perform the background processing for interrupts.
6133 *
6134 * Notes:
6135 * This task always run in the context of a kernel thread.  It
6136 * is kick-off by the driver's detect code and starts up
6137 * up one per adapter. It immediately goes to sleep and waits for
6138 * some fibre event.  When either the interrupt handler or
6139 * the timer routine detects a event it will one of the task
6140 * bits then wake us up.
6141 **************************************************************************/
6142 static int
6143 qla2x00_do_dpc(void *data)
6144 {
6145         scsi_qla_host_t *base_vha;
6146         struct qla_hw_data *ha;
6147         uint32_t online;
6148         struct qla_qpair *qpair;
6149
6150         ha = (struct qla_hw_data *)data;
6151         base_vha = pci_get_drvdata(ha->pdev);
6152
6153         set_user_nice(current, MIN_NICE);
6154
6155         set_current_state(TASK_INTERRUPTIBLE);
6156         while (!kthread_should_stop()) {
6157                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6158                     "DPC handler sleeping.\n");
6159
6160                 schedule();
6161
6162                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6163                         goto end_loop;
6164
6165                 if (ha->flags.eeh_busy) {
6166                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6167                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6168                         goto end_loop;
6169                 }
6170
6171                 ha->dpc_active = 1;
6172
6173                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6174                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6175                     base_vha->dpc_flags);
6176
6177                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6178                         break;
6179
6180                 if (IS_P3P_TYPE(ha)) {
6181                         if (IS_QLA8044(ha)) {
6182                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6183                                         &base_vha->dpc_flags)) {
6184                                         qla8044_idc_lock(ha);
6185                                         qla8044_wr_direct(base_vha,
6186                                                 QLA8044_CRB_DEV_STATE_INDEX,
6187                                                 QLA8XXX_DEV_FAILED);
6188                                         qla8044_idc_unlock(ha);
6189                                         ql_log(ql_log_info, base_vha, 0x4004,
6190                                                 "HW State: FAILED.\n");
6191                                         qla8044_device_state_handler(base_vha);
6192                                         continue;
6193                                 }
6194
6195                         } else {
6196                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6197                                         &base_vha->dpc_flags)) {
6198                                         qla82xx_idc_lock(ha);
6199                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6200                                                 QLA8XXX_DEV_FAILED);
6201                                         qla82xx_idc_unlock(ha);
6202                                         ql_log(ql_log_info, base_vha, 0x0151,
6203                                                 "HW State: FAILED.\n");
6204                                         qla82xx_device_state_handler(base_vha);
6205                                         continue;
6206                                 }
6207                         }
6208
6209                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6210                                 &base_vha->dpc_flags)) {
6211
6212                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6213                                     "FCoE context reset scheduled.\n");
6214                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6215                                         &base_vha->dpc_flags))) {
6216                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6217                                                 /* FCoE-ctx reset failed.
6218                                                  * Escalate to chip-reset
6219                                                  */
6220                                                 set_bit(ISP_ABORT_NEEDED,
6221                                                         &base_vha->dpc_flags);
6222                                         }
6223                                         clear_bit(ABORT_ISP_ACTIVE,
6224                                                 &base_vha->dpc_flags);
6225                                 }
6226
6227                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6228                                     "FCoE context reset end.\n");
6229                         }
6230                 } else if (IS_QLAFX00(ha)) {
6231                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6232                                 &base_vha->dpc_flags)) {
6233                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6234                                     "Firmware Reset Recovery\n");
6235                                 if (qlafx00_reset_initialize(base_vha)) {
6236                                         /* Failed. Abort isp later. */
6237                                         if (!test_bit(UNLOADING,
6238                                             &base_vha->dpc_flags)) {
6239                                                 set_bit(ISP_UNRECOVERABLE,
6240                                                     &base_vha->dpc_flags);
6241                                                 ql_dbg(ql_dbg_dpc, base_vha,
6242                                                     0x4021,
6243                                                     "Reset Recovery Failed\n");
6244                                         }
6245                                 }
6246                         }
6247
6248                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6249                                 &base_vha->dpc_flags)) {
6250                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6251                                     "ISPFx00 Target Scan scheduled\n");
6252                                 if (qlafx00_rescan_isp(base_vha)) {
6253                                         if (!test_bit(UNLOADING,
6254                                             &base_vha->dpc_flags))
6255                                                 set_bit(ISP_UNRECOVERABLE,
6256                                                     &base_vha->dpc_flags);
6257                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6258                                             "ISPFx00 Target Scan Failed\n");
6259                                 }
6260                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6261                                     "ISPFx00 Target Scan End\n");
6262                         }
6263                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6264                                 &base_vha->dpc_flags)) {
6265                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6266                                     "ISPFx00 Host Info resend scheduled\n");
6267                                 qlafx00_fx_disc(base_vha,
6268                                     &base_vha->hw->mr.fcport,
6269                                     FXDISC_REG_HOST_INFO);
6270                         }
6271                 }
6272
6273                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6274                         &base_vha->dpc_flags) &&
6275                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6276                         qla24xx_detect_sfp(base_vha);
6277
6278                         if (ha->flags.detected_lr_sfp !=
6279                             ha->flags.using_lr_setting)
6280                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6281                 }
6282
6283                 if (test_and_clear_bit
6284                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6285                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6286                         bool do_reset = true;
6287
6288                         switch (base_vha->qlini_mode) {
6289                         case QLA2XXX_INI_MODE_ENABLED:
6290                                 break;
6291                         case QLA2XXX_INI_MODE_DISABLED:
6292                                 if (!qla_tgt_mode_enabled(base_vha) &&
6293                                     !ha->flags.fw_started)
6294                                         do_reset = false;
6295                                 break;
6296                         case QLA2XXX_INI_MODE_DUAL:
6297                                 if (!qla_dual_mode_enabled(base_vha) &&
6298                                     !ha->flags.fw_started)
6299                                         do_reset = false;
6300                                 break;
6301                         default:
6302                                 break;
6303                         }
6304
6305                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6306                             &base_vha->dpc_flags))) {
6307                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6308                                     "ISP abort scheduled.\n");
6309                                 if (ha->isp_ops->abort_isp(base_vha)) {
6310                                         /* failed. retry later */
6311                                         set_bit(ISP_ABORT_NEEDED,
6312                                             &base_vha->dpc_flags);
6313                                 }
6314                                 clear_bit(ABORT_ISP_ACTIVE,
6315                                                 &base_vha->dpc_flags);
6316                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6317                                     "ISP abort end.\n");
6318                         }
6319                 }
6320
6321                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6322                     &base_vha->dpc_flags)) {
6323                         qla2x00_update_fcports(base_vha);
6324                 }
6325
6326                 if (IS_QLAFX00(ha))
6327                         goto loop_resync_check;
6328
6329                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6330                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6331                             "Quiescence mode scheduled.\n");
6332                         if (IS_P3P_TYPE(ha)) {
6333                                 if (IS_QLA82XX(ha))
6334                                         qla82xx_device_state_handler(base_vha);
6335                                 if (IS_QLA8044(ha))
6336                                         qla8044_device_state_handler(base_vha);
6337                                 clear_bit(ISP_QUIESCE_NEEDED,
6338                                     &base_vha->dpc_flags);
6339                                 if (!ha->flags.quiesce_owner) {
6340                                         qla2x00_perform_loop_resync(base_vha);
6341                                         if (IS_QLA82XX(ha)) {
6342                                                 qla82xx_idc_lock(ha);
6343                                                 qla82xx_clear_qsnt_ready(
6344                                                     base_vha);
6345                                                 qla82xx_idc_unlock(ha);
6346                                         } else if (IS_QLA8044(ha)) {
6347                                                 qla8044_idc_lock(ha);
6348                                                 qla8044_clear_qsnt_ready(
6349                                                     base_vha);
6350                                                 qla8044_idc_unlock(ha);
6351                                         }
6352                                 }
6353                         } else {
6354                                 clear_bit(ISP_QUIESCE_NEEDED,
6355                                     &base_vha->dpc_flags);
6356                                 qla2x00_quiesce_io(base_vha);
6357                         }
6358                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6359                             "Quiescence mode end.\n");
6360                 }
6361
6362                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6363                                 &base_vha->dpc_flags) &&
6364                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6365
6366                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6367                             "Reset marker scheduled.\n");
6368                         qla2x00_rst_aen(base_vha);
6369                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6370                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6371                             "Reset marker end.\n");
6372                 }
6373
6374                 /* Retry each device up to login retry count */
6375                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6376                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6377                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6378
6379                         if (!base_vha->relogin_jif ||
6380                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6381                                 base_vha->relogin_jif = jiffies + HZ;
6382                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6383
6384                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6385                                     "Relogin scheduled.\n");
6386                                 qla24xx_post_relogin_work(base_vha);
6387                         }
6388                 }
6389 loop_resync_check:
6390                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6391                     &base_vha->dpc_flags)) {
6392
6393                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6394                             "Loop resync scheduled.\n");
6395
6396                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6397                             &base_vha->dpc_flags))) {
6398
6399                                 qla2x00_loop_resync(base_vha);
6400
6401                                 clear_bit(LOOP_RESYNC_ACTIVE,
6402                                                 &base_vha->dpc_flags);
6403                         }
6404
6405                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6406                             "Loop resync end.\n");
6407                 }
6408
6409                 if (IS_QLAFX00(ha))
6410                         goto intr_on_check;
6411
6412                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6413                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6414                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6415                         qla2xxx_flash_npiv_conf(base_vha);
6416                 }
6417
6418 intr_on_check:
6419                 if (!ha->interrupts_on)
6420                         ha->isp_ops->enable_intrs(ha);
6421
6422                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6423                                         &base_vha->dpc_flags)) {
6424                         if (ha->beacon_blink_led == 1)
6425                                 ha->isp_ops->beacon_blink(base_vha);
6426                 }
6427
6428                 /* qpair online check */
6429                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6430                     &base_vha->dpc_flags)) {
6431                         if (ha->flags.eeh_busy ||
6432                             ha->flags.pci_channel_io_perm_failure)
6433                                 online = 0;
6434                         else
6435                                 online = 1;
6436
6437                         mutex_lock(&ha->mq_lock);
6438                         list_for_each_entry(qpair, &base_vha->qp_list,
6439                             qp_list_elem)
6440                         qpair->online = online;
6441                         mutex_unlock(&ha->mq_lock);
6442                 }
6443
6444                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
6445                     &base_vha->dpc_flags)) {
6446                         ql_log(ql_log_info, base_vha, 0xffffff,
6447                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6448                                                 ha->nvme_last_rptd_aen);
6449                         if (qla27xx_set_zio_threshold(base_vha,
6450                             ha->nvme_last_rptd_aen)) {
6451                                 ql_log(ql_log_info, base_vha, 0xffffff,
6452                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6453                                     ha->nvme_last_rptd_aen);
6454                         }
6455                 }
6456
6457                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
6458                     &base_vha->dpc_flags)) {
6459                         ql_log(ql_log_info, base_vha, 0xffffff,
6460                             "SET ZIO Activity exchange threshold to %d.\n",
6461                             ha->last_zio_threshold);
6462                         qla27xx_set_zio_threshold(base_vha,
6463                             ha->last_zio_threshold);
6464                 }
6465
6466                 if (!IS_QLAFX00(ha))
6467                         qla2x00_do_dpc_all_vps(base_vha);
6468
6469                 if (test_and_clear_bit(N2N_LINK_RESET,
6470                         &base_vha->dpc_flags)) {
6471                         qla2x00_lip_reset(base_vha);
6472                 }
6473
6474                 ha->dpc_active = 0;
6475 end_loop:
6476                 set_current_state(TASK_INTERRUPTIBLE);
6477         } /* End of while(1) */
6478         __set_current_state(TASK_RUNNING);
6479
6480         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6481             "DPC handler exiting.\n");
6482
6483         /*
6484          * Make sure that nobody tries to wake us up again.
6485          */
6486         ha->dpc_active = 0;
6487
6488         /* Cleanup any residual CTX SRBs. */
6489         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6490
6491         return 0;
6492 }
6493
6494 void
6495 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6496 {
6497         struct qla_hw_data *ha = vha->hw;
6498         struct task_struct *t = ha->dpc_thread;
6499
6500         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6501                 wake_up_process(t);
6502 }
6503
6504 /*
6505 *  qla2x00_rst_aen
6506 *      Processes asynchronous reset.
6507 *
6508 * Input:
6509 *      ha  = adapter block pointer.
6510 */
6511 static void
6512 qla2x00_rst_aen(scsi_qla_host_t *vha)
6513 {
6514         if (vha->flags.online && !vha->flags.reset_active &&
6515             !atomic_read(&vha->loop_down_timer) &&
6516             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6517                 do {
6518                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6519
6520                         /*
6521                          * Issue marker command only when we are going to start
6522                          * the I/O.
6523                          */
6524                         vha->marker_needed = 1;
6525                 } while (!atomic_read(&vha->loop_down_timer) &&
6526                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6527         }
6528 }
6529
6530 /**************************************************************************
6531 *   qla2x00_timer
6532 *
6533 * Description:
6534 *   One second timer
6535 *
6536 * Context: Interrupt
6537 ***************************************************************************/
6538 void
6539 qla2x00_timer(struct timer_list *t)
6540 {
6541         scsi_qla_host_t *vha = from_timer(vha, t, timer);
6542         unsigned long   cpu_flags = 0;
6543         int             start_dpc = 0;
6544         int             index;
6545         srb_t           *sp;
6546         uint16_t        w;
6547         struct qla_hw_data *ha = vha->hw;
6548         struct req_que *req;
6549
6550         if (ha->flags.eeh_busy) {
6551                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6552                     "EEH = %d, restarting timer.\n",
6553                     ha->flags.eeh_busy);
6554                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6555                 return;
6556         }
6557
6558         /*
6559          * Hardware read to raise pending EEH errors during mailbox waits. If
6560          * the read returns -1 then disable the board.
6561          */
6562         if (!pci_channel_offline(ha->pdev)) {
6563                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6564                 qla2x00_check_reg16_for_disconnect(vha, w);
6565         }
6566
6567         /* Make sure qla82xx_watchdog is run only for physical port */
6568         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6569                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6570                         start_dpc++;
6571                 if (IS_QLA82XX(ha))
6572                         qla82xx_watchdog(vha);
6573                 else if (IS_QLA8044(ha))
6574                         qla8044_watchdog(vha);
6575         }
6576
6577         if (!vha->vp_idx && IS_QLAFX00(ha))
6578                 qlafx00_timer_routine(vha);
6579
6580         /* Loop down handler. */
6581         if (atomic_read(&vha->loop_down_timer) > 0 &&
6582             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6583             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6584                 && vha->flags.online) {
6585
6586                 if (atomic_read(&vha->loop_down_timer) ==
6587                     vha->loop_down_abort_time) {
6588
6589                         ql_log(ql_log_info, vha, 0x6008,
6590                             "Loop down - aborting the queues before time expires.\n");
6591
6592                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6593                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6594
6595                         /*
6596                          * Schedule an ISP abort to return any FCP2-device
6597                          * commands.
6598                          */
6599                         /* NPIV - scan physical port only */
6600                         if (!vha->vp_idx) {
6601                                 spin_lock_irqsave(&ha->hardware_lock,
6602                                     cpu_flags);
6603                                 req = ha->req_q_map[0];
6604                                 for (index = 1;
6605                                     index < req->num_outstanding_cmds;
6606                                     index++) {
6607                                         fc_port_t *sfcp;
6608
6609                                         sp = req->outstanding_cmds[index];
6610                                         if (!sp)
6611                                                 continue;
6612                                         if (sp->cmd_type != TYPE_SRB)
6613                                                 continue;
6614                                         if (sp->type != SRB_SCSI_CMD)
6615                                                 continue;
6616                                         sfcp = sp->fcport;
6617                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6618                                                 continue;
6619
6620                                         if (IS_QLA82XX(ha))
6621                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6622                                                         &vha->dpc_flags);
6623                                         else
6624                                                 set_bit(ISP_ABORT_NEEDED,
6625                                                         &vha->dpc_flags);
6626                                         break;
6627                                 }
6628                                 spin_unlock_irqrestore(&ha->hardware_lock,
6629                                                                 cpu_flags);
6630                         }
6631                         start_dpc++;
6632                 }
6633
6634                 /* if the loop has been down for 4 minutes, reinit adapter */
6635                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6636                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6637                                 ql_log(ql_log_warn, vha, 0x6009,
6638                                     "Loop down - aborting ISP.\n");
6639
6640                                 if (IS_QLA82XX(ha))
6641                                         set_bit(FCOE_CTX_RESET_NEEDED,
6642                                                 &vha->dpc_flags);
6643                                 else
6644                                         set_bit(ISP_ABORT_NEEDED,
6645                                                 &vha->dpc_flags);
6646                         }
6647                 }
6648                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6649                     "Loop down - seconds remaining %d.\n",
6650                     atomic_read(&vha->loop_down_timer));
6651         }
6652         /* Check if beacon LED needs to be blinked for physical host only */
6653         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6654                 /* There is no beacon_blink function for ISP82xx */
6655                 if (!IS_P3P_TYPE(ha)) {
6656                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6657                         start_dpc++;
6658                 }
6659         }
6660
6661         /* Process any deferred work. */
6662         if (!list_empty(&vha->work_list)) {
6663                 unsigned long flags;
6664                 bool q = false;
6665
6666                 spin_lock_irqsave(&vha->work_lock, flags);
6667                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6668                         q = true;
6669                 spin_unlock_irqrestore(&vha->work_lock, flags);
6670                 if (q)
6671                         queue_work(vha->hw->wq, &vha->iocb_work);
6672         }
6673
6674         /*
6675          * FC-NVME
6676          * see if the active AEN count has changed from what was last reported.
6677          */
6678         if (!vha->vp_idx &&
6679             (atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen) &&
6680             ha->zio_mode == QLA_ZIO_MODE_6 &&
6681             !ha->flags.host_shutting_down) {
6682                 ql_log(ql_log_info, vha, 0x3002,
6683                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6684                     ha->nvme_last_rptd_aen);
6685                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6686                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6687                 start_dpc++;
6688         }
6689
6690         if (!vha->vp_idx &&
6691             (atomic_read(&ha->zio_threshold) != ha->last_zio_threshold) &&
6692             (ha->zio_mode == QLA_ZIO_MODE_6) &&
6693             (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
6694                 ql_log(ql_log_info, vha, 0x3002,
6695                     "Sched: Set ZIO exchange threshold to %d.\n",
6696                     ha->last_zio_threshold);
6697                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
6698                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6699                 start_dpc++;
6700         }
6701
6702         /* Schedule the DPC routine if needed */
6703         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6704             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6705             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6706             start_dpc ||
6707             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6708             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6709             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6710             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6711             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6712             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6713                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6714                     "isp_abort_needed=%d loop_resync_needed=%d "
6715                     "fcport_update_needed=%d start_dpc=%d "
6716                     "reset_marker_needed=%d",
6717                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6718                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6719                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6720                     start_dpc,
6721                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6722                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6723                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6724                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6725                     "relogin_needed=%d.\n",
6726                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6727                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6728                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6729                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6730                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6731                 qla2xxx_wake_dpc(vha);
6732         }
6733
6734         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6735 }
6736
6737 /* Firmware interface routines. */
6738
6739 #define FW_ISP21XX      0
6740 #define FW_ISP22XX      1
6741 #define FW_ISP2300      2
6742 #define FW_ISP2322      3
6743 #define FW_ISP24XX      4
6744 #define FW_ISP25XX      5
6745 #define FW_ISP81XX      6
6746 #define FW_ISP82XX      7
6747 #define FW_ISP2031      8
6748 #define FW_ISP8031      9
6749 #define FW_ISP27XX      10
6750 #define FW_ISP28XX      11
6751
6752 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6753 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6754 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6755 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6756 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6757 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6758 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6759 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6760 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6761 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6762 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6763 #define FW_FILE_ISP28XX "ql2800_fw.bin"
6764
6765
6766 static DEFINE_MUTEX(qla_fw_lock);
6767
6768 static struct fw_blob qla_fw_blobs[] = {
6769         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6770         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6771         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6772         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6773         { .name = FW_FILE_ISP24XX, },
6774         { .name = FW_FILE_ISP25XX, },
6775         { .name = FW_FILE_ISP81XX, },
6776         { .name = FW_FILE_ISP82XX, },
6777         { .name = FW_FILE_ISP2031, },
6778         { .name = FW_FILE_ISP8031, },
6779         { .name = FW_FILE_ISP27XX, },
6780         { .name = FW_FILE_ISP28XX, },
6781         { .name = NULL, },
6782 };
6783
6784 struct fw_blob *
6785 qla2x00_request_firmware(scsi_qla_host_t *vha)
6786 {
6787         struct qla_hw_data *ha = vha->hw;
6788         struct fw_blob *blob;
6789
6790         if (IS_QLA2100(ha)) {
6791                 blob = &qla_fw_blobs[FW_ISP21XX];
6792         } else if (IS_QLA2200(ha)) {
6793                 blob = &qla_fw_blobs[FW_ISP22XX];
6794         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6795                 blob = &qla_fw_blobs[FW_ISP2300];
6796         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6797                 blob = &qla_fw_blobs[FW_ISP2322];
6798         } else if (IS_QLA24XX_TYPE(ha)) {
6799                 blob = &qla_fw_blobs[FW_ISP24XX];
6800         } else if (IS_QLA25XX(ha)) {
6801                 blob = &qla_fw_blobs[FW_ISP25XX];
6802         } else if (IS_QLA81XX(ha)) {
6803                 blob = &qla_fw_blobs[FW_ISP81XX];
6804         } else if (IS_QLA82XX(ha)) {
6805                 blob = &qla_fw_blobs[FW_ISP82XX];
6806         } else if (IS_QLA2031(ha)) {
6807                 blob = &qla_fw_blobs[FW_ISP2031];
6808         } else if (IS_QLA8031(ha)) {
6809                 blob = &qla_fw_blobs[FW_ISP8031];
6810         } else if (IS_QLA27XX(ha)) {
6811                 blob = &qla_fw_blobs[FW_ISP27XX];
6812         } else if (IS_QLA28XX(ha)) {
6813                 blob = &qla_fw_blobs[FW_ISP28XX];
6814         } else {
6815                 return NULL;
6816         }
6817
6818         if (!blob->name)
6819                 return NULL;
6820
6821         mutex_lock(&qla_fw_lock);
6822         if (blob->fw)
6823                 goto out;
6824
6825         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6826                 ql_log(ql_log_warn, vha, 0x0063,
6827                     "Failed to load firmware image (%s).\n", blob->name);
6828                 blob->fw = NULL;
6829                 blob = NULL;
6830         }
6831
6832 out:
6833         mutex_unlock(&qla_fw_lock);
6834         return blob;
6835 }
6836
6837 static void
6838 qla2x00_release_firmware(void)
6839 {
6840         struct fw_blob *blob;
6841
6842         mutex_lock(&qla_fw_lock);
6843         for (blob = qla_fw_blobs; blob->name; blob++)
6844                 release_firmware(blob->fw);
6845         mutex_unlock(&qla_fw_lock);
6846 }
6847
6848 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
6849 {
6850         struct qla_hw_data *ha = vha->hw;
6851         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6852         struct qla_qpair *qpair = NULL;
6853         struct scsi_qla_host *vp;
6854         fc_port_t *fcport;
6855         int i;
6856         unsigned long flags;
6857
6858         ha->chip_reset++;
6859
6860         ha->base_qpair->chip_reset = ha->chip_reset;
6861         for (i = 0; i < ha->max_qpairs; i++) {
6862                 if (ha->queue_pair_map[i])
6863                         ha->queue_pair_map[i]->chip_reset =
6864                             ha->base_qpair->chip_reset;
6865         }
6866
6867         /* purge MBox commands */
6868         if (atomic_read(&ha->num_pend_mbx_stage3)) {
6869                 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6870                 complete(&ha->mbx_intr_comp);
6871         }
6872
6873         i = 0;
6874
6875         while (atomic_read(&ha->num_pend_mbx_stage3) ||
6876             atomic_read(&ha->num_pend_mbx_stage2) ||
6877             atomic_read(&ha->num_pend_mbx_stage1)) {
6878                 msleep(20);
6879                 i++;
6880                 if (i > 50)
6881                         break;
6882         }
6883
6884         ha->flags.purge_mbox = 0;
6885
6886         mutex_lock(&ha->mq_lock);
6887         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
6888                 qpair->online = 0;
6889         mutex_unlock(&ha->mq_lock);
6890
6891         qla2x00_mark_all_devices_lost(vha, 0);
6892
6893         spin_lock_irqsave(&ha->vport_slock, flags);
6894         list_for_each_entry(vp, &ha->vp_list, list) {
6895                 atomic_inc(&vp->vref_count);
6896                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6897                 qla2x00_mark_all_devices_lost(vp, 0);
6898                 spin_lock_irqsave(&ha->vport_slock, flags);
6899                 atomic_dec(&vp->vref_count);
6900         }
6901         spin_unlock_irqrestore(&ha->vport_slock, flags);
6902
6903         /* Clear all async request states across all VPs. */
6904         list_for_each_entry(fcport, &vha->vp_fcports, list)
6905                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6906
6907         spin_lock_irqsave(&ha->vport_slock, flags);
6908         list_for_each_entry(vp, &ha->vp_list, list) {
6909                 atomic_inc(&vp->vref_count);
6910                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6911                 list_for_each_entry(fcport, &vp->vp_fcports, list)
6912                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6913                 spin_lock_irqsave(&ha->vport_slock, flags);
6914                 atomic_dec(&vp->vref_count);
6915         }
6916         spin_unlock_irqrestore(&ha->vport_slock, flags);
6917 }
6918
6919
6920 static pci_ers_result_t
6921 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6922 {
6923         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6924         struct qla_hw_data *ha = vha->hw;
6925
6926         ql_dbg(ql_dbg_aer, vha, 0x9000,
6927             "PCI error detected, state %x.\n", state);
6928
6929         if (!atomic_read(&pdev->enable_cnt)) {
6930                 ql_log(ql_log_info, vha, 0xffff,
6931                         "PCI device is disabled,state %x\n", state);
6932                 return PCI_ERS_RESULT_NEED_RESET;
6933         }
6934
6935         switch (state) {
6936         case pci_channel_io_normal:
6937                 ha->flags.eeh_busy = 0;
6938                 if (ql2xmqsupport || ql2xnvmeenable) {
6939                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6940                         qla2xxx_wake_dpc(vha);
6941                 }
6942                 return PCI_ERS_RESULT_CAN_RECOVER;
6943         case pci_channel_io_frozen:
6944                 ha->flags.eeh_busy = 1;
6945                 qla_pci_error_cleanup(vha);
6946                 return PCI_ERS_RESULT_NEED_RESET;
6947         case pci_channel_io_perm_failure:
6948                 ha->flags.pci_channel_io_perm_failure = 1;
6949                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6950                 if (ql2xmqsupport || ql2xnvmeenable) {
6951                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6952                         qla2xxx_wake_dpc(vha);
6953                 }
6954                 return PCI_ERS_RESULT_DISCONNECT;
6955         }
6956         return PCI_ERS_RESULT_NEED_RESET;
6957 }
6958
6959 static pci_ers_result_t
6960 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6961 {
6962         int risc_paused = 0;
6963         uint32_t stat;
6964         unsigned long flags;
6965         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6966         struct qla_hw_data *ha = base_vha->hw;
6967         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6968         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6969
6970         if (IS_QLA82XX(ha))
6971                 return PCI_ERS_RESULT_RECOVERED;
6972
6973         spin_lock_irqsave(&ha->hardware_lock, flags);
6974         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6975                 stat = RD_REG_DWORD(&reg->hccr);
6976                 if (stat & HCCR_RISC_PAUSE)
6977                         risc_paused = 1;
6978         } else if (IS_QLA23XX(ha)) {
6979                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6980                 if (stat & HSR_RISC_PAUSED)
6981                         risc_paused = 1;
6982         } else if (IS_FWI2_CAPABLE(ha)) {
6983                 stat = RD_REG_DWORD(&reg24->host_status);
6984                 if (stat & HSRX_RISC_PAUSED)
6985                         risc_paused = 1;
6986         }
6987         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6988
6989         if (risc_paused) {
6990                 ql_log(ql_log_info, base_vha, 0x9003,
6991                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6992                 ha->isp_ops->fw_dump(base_vha, 0);
6993
6994                 return PCI_ERS_RESULT_NEED_RESET;
6995         } else
6996                 return PCI_ERS_RESULT_RECOVERED;
6997 }
6998
6999 static pci_ers_result_t
7000 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
7001 {
7002         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
7003         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7004         struct qla_hw_data *ha = base_vha->hw;
7005         int rc;
7006         struct qla_qpair *qpair = NULL;
7007
7008         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
7009             "Slot Reset.\n");
7010
7011         /* Workaround: qla2xxx driver which access hardware earlier
7012          * needs error state to be pci_channel_io_online.
7013          * Otherwise mailbox command timesout.
7014          */
7015         pdev->error_state = pci_channel_io_normal;
7016
7017         pci_restore_state(pdev);
7018
7019         /* pci_restore_state() clears the saved_state flag of the device
7020          * save restored state which resets saved_state flag
7021          */
7022         pci_save_state(pdev);
7023
7024         if (ha->mem_only)
7025                 rc = pci_enable_device_mem(pdev);
7026         else
7027                 rc = pci_enable_device(pdev);
7028
7029         if (rc) {
7030                 ql_log(ql_log_warn, base_vha, 0x9005,
7031                     "Can't re-enable PCI device after reset.\n");
7032                 goto exit_slot_reset;
7033         }
7034
7035
7036         if (ha->isp_ops->pci_config(base_vha))
7037                 goto exit_slot_reset;
7038
7039         mutex_lock(&ha->mq_lock);
7040         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7041                 qpair->online = 1;
7042         mutex_unlock(&ha->mq_lock);
7043
7044         base_vha->flags.online = 1;
7045         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7046         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
7047                 ret =  PCI_ERS_RESULT_RECOVERED;
7048         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7049
7050
7051 exit_slot_reset:
7052         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7053             "slot_reset return %x.\n", ret);
7054
7055         return ret;
7056 }
7057
7058 static void
7059 qla2xxx_pci_resume(struct pci_dev *pdev)
7060 {
7061         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7062         struct qla_hw_data *ha = base_vha->hw;
7063         int ret;
7064
7065         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
7066             "pci_resume.\n");
7067
7068         ha->flags.eeh_busy = 0;
7069
7070         ret = qla2x00_wait_for_hba_online(base_vha);
7071         if (ret != QLA_SUCCESS) {
7072                 ql_log(ql_log_fatal, base_vha, 0x9002,
7073                     "The device failed to resume I/O from slot/link_reset.\n");
7074         }
7075 }
7076
7077 static void
7078 qla_pci_reset_prepare(struct pci_dev *pdev)
7079 {
7080         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7081         struct qla_hw_data *ha = base_vha->hw;
7082         struct qla_qpair *qpair;
7083
7084         ql_log(ql_log_warn, base_vha, 0xffff,
7085             "%s.\n", __func__);
7086
7087         /*
7088          * PCI FLR/function reset is about to reset the
7089          * slot. Stop the chip to stop all DMA access.
7090          * It is assumed that pci_reset_done will be called
7091          * after FLR to resume Chip operation.
7092          */
7093         ha->flags.eeh_busy = 1;
7094         mutex_lock(&ha->mq_lock);
7095         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7096                 qpair->online = 0;
7097         mutex_unlock(&ha->mq_lock);
7098
7099         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7100         qla2x00_abort_isp_cleanup(base_vha);
7101         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7102 }
7103
7104 static void
7105 qla_pci_reset_done(struct pci_dev *pdev)
7106 {
7107         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7108         struct qla_hw_data *ha = base_vha->hw;
7109         struct qla_qpair *qpair;
7110
7111         ql_log(ql_log_warn, base_vha, 0xffff,
7112             "%s.\n", __func__);
7113
7114         /*
7115          * FLR just completed by PCI layer. Resume adapter
7116          */
7117         ha->flags.eeh_busy = 0;
7118         mutex_lock(&ha->mq_lock);
7119         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7120                 qpair->online = 1;
7121         mutex_unlock(&ha->mq_lock);
7122
7123         base_vha->flags.online = 1;
7124         ha->isp_ops->abort_isp(base_vha);
7125         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7126 }
7127
7128 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7129 {
7130         int rc;
7131         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7132         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7133
7134         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7135                 rc = blk_mq_map_queues(qmap);
7136         else
7137                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7138         return rc;
7139 }
7140
7141 struct scsi_host_template qla2xxx_driver_template = {
7142         .module                 = THIS_MODULE,
7143         .name                   = QLA2XXX_DRIVER_NAME,
7144         .queuecommand           = qla2xxx_queuecommand,
7145
7146         .eh_timed_out           = fc_eh_timed_out,
7147         .eh_abort_handler       = qla2xxx_eh_abort,
7148         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7149         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7150         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7151         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7152
7153         .slave_configure        = qla2xxx_slave_configure,
7154
7155         .slave_alloc            = qla2xxx_slave_alloc,
7156         .slave_destroy          = qla2xxx_slave_destroy,
7157         .scan_finished          = qla2xxx_scan_finished,
7158         .scan_start             = qla2xxx_scan_start,
7159         .change_queue_depth     = scsi_change_queue_depth,
7160         .map_queues             = qla2xxx_map_queues,
7161         .this_id                = -1,
7162         .cmd_per_lun            = 3,
7163         .sg_tablesize           = SG_ALL,
7164
7165         .max_sectors            = 0xFFFF,
7166         .shost_attrs            = qla2x00_host_attrs,
7167
7168         .supported_mode         = MODE_INITIATOR,
7169         .track_queue_depth      = 1,
7170 };
7171
7172 static const struct pci_error_handlers qla2xxx_err_handler = {
7173         .error_detected = qla2xxx_pci_error_detected,
7174         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7175         .slot_reset = qla2xxx_pci_slot_reset,
7176         .resume = qla2xxx_pci_resume,
7177         .reset_prepare = qla_pci_reset_prepare,
7178         .reset_done = qla_pci_reset_done,
7179 };
7180
7181 static struct pci_device_id qla2xxx_pci_tbl[] = {
7182         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7183         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7184         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7185         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7186         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7187         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7188         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7189         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7190         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7191         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7192         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7193         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7194         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7195         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7196         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7197         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7198         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7199         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7200         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7201         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7202         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7203         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7204         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7205         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7206         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7207         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7208         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7209         { 0 },
7210 };
7211 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
7212
7213 static struct pci_driver qla2xxx_pci_driver = {
7214         .name           = QLA2XXX_DRIVER_NAME,
7215         .driver         = {
7216                 .owner          = THIS_MODULE,
7217         },
7218         .id_table       = qla2xxx_pci_tbl,
7219         .probe          = qla2x00_probe_one,
7220         .remove         = qla2x00_remove_one,
7221         .shutdown       = qla2x00_shutdown,
7222         .err_handler    = &qla2xxx_err_handler,
7223 };
7224
7225 static const struct file_operations apidev_fops = {
7226         .owner = THIS_MODULE,
7227         .llseek = noop_llseek,
7228 };
7229
7230 /**
7231  * qla2x00_module_init - Module initialization.
7232  **/
7233 static int __init
7234 qla2x00_module_init(void)
7235 {
7236         int ret = 0;
7237
7238         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
7239         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
7240         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
7241         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
7242         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
7243         BUILD_BUG_ON(sizeof(request_t) != 64);
7244         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
7245         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
7246         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
7247         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
7248         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
7249         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
7250         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
7251         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
7252         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
7253         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
7254         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
7255         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
7256         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
7257         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
7258         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
7259         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
7260         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
7261
7262         /* Allocate cache for SRBs. */
7263         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7264             SLAB_HWCACHE_ALIGN, NULL);
7265         if (srb_cachep == NULL) {
7266                 ql_log(ql_log_fatal, NULL, 0x0001,
7267                     "Unable to allocate SRB cache...Failing load!.\n");
7268                 return -ENOMEM;
7269         }
7270
7271         /* Initialize target kmem_cache and mem_pools */
7272         ret = qlt_init();
7273         if (ret < 0) {
7274                 goto destroy_cache;
7275         } else if (ret > 0) {
7276                 /*
7277                  * If initiator mode is explictly disabled by qlt_init(),
7278                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7279                  * performing scsi_scan_target() during LOOP UP event.
7280                  */
7281                 qla2xxx_transport_functions.disable_target_scan = 1;
7282                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7283         }
7284
7285         /* Derive version string. */
7286         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7287         if (ql2xextended_error_logging)
7288                 strcat(qla2x00_version_str, "-debug");
7289         if (ql2xextended_error_logging == 1)
7290                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7291
7292         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7293                 qla_insert_tgt_attrs();
7294
7295         qla2xxx_transport_template =
7296             fc_attach_transport(&qla2xxx_transport_functions);
7297         if (!qla2xxx_transport_template) {
7298                 ql_log(ql_log_fatal, NULL, 0x0002,
7299                     "fc_attach_transport failed...Failing load!.\n");
7300                 ret = -ENODEV;
7301                 goto qlt_exit;
7302         }
7303
7304         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7305         if (apidev_major < 0) {
7306                 ql_log(ql_log_fatal, NULL, 0x0003,
7307                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7308         }
7309
7310         qla2xxx_transport_vport_template =
7311             fc_attach_transport(&qla2xxx_transport_vport_functions);
7312         if (!qla2xxx_transport_vport_template) {
7313                 ql_log(ql_log_fatal, NULL, 0x0004,
7314                     "fc_attach_transport vport failed...Failing load!.\n");
7315                 ret = -ENODEV;
7316                 goto unreg_chrdev;
7317         }
7318         ql_log(ql_log_info, NULL, 0x0005,
7319             "QLogic Fibre Channel HBA Driver: %s.\n",
7320             qla2x00_version_str);
7321         ret = pci_register_driver(&qla2xxx_pci_driver);
7322         if (ret) {
7323                 ql_log(ql_log_fatal, NULL, 0x0006,
7324                     "pci_register_driver failed...ret=%d Failing load!.\n",
7325                     ret);
7326                 goto release_vport_transport;
7327         }
7328         return ret;
7329
7330 release_vport_transport:
7331         fc_release_transport(qla2xxx_transport_vport_template);
7332
7333 unreg_chrdev:
7334         if (apidev_major >= 0)
7335                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7336         fc_release_transport(qla2xxx_transport_template);
7337
7338 qlt_exit:
7339         qlt_exit();
7340
7341 destroy_cache:
7342         kmem_cache_destroy(srb_cachep);
7343         return ret;
7344 }
7345
7346 /**
7347  * qla2x00_module_exit - Module cleanup.
7348  **/
7349 static void __exit
7350 qla2x00_module_exit(void)
7351 {
7352         pci_unregister_driver(&qla2xxx_pci_driver);
7353         qla2x00_release_firmware();
7354         kmem_cache_destroy(ctx_cachep);
7355         fc_release_transport(qla2xxx_transport_vport_template);
7356         if (apidev_major >= 0)
7357                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7358         fc_release_transport(qla2xxx_transport_template);
7359         qlt_exit();
7360         kmem_cache_destroy(srb_cachep);
7361 }
7362
7363 module_init(qla2x00_module_init);
7364 module_exit(qla2x00_module_exit);
7365
7366 MODULE_AUTHOR("QLogic Corporation");
7367 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7368 MODULE_LICENSE("GPL");
7369 MODULE_VERSION(QLA2XXX_VERSION);
7370 MODULE_FIRMWARE(FW_FILE_ISP21XX);
7371 MODULE_FIRMWARE(FW_FILE_ISP22XX);
7372 MODULE_FIRMWARE(FW_FILE_ISP2300);
7373 MODULE_FIRMWARE(FW_FILE_ISP2322);
7374 MODULE_FIRMWARE(FW_FILE_ISP24XX);
7375 MODULE_FIRMWARE(FW_FILE_ISP25XX);