2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
8 #include "qla_target.h"
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
13 static struct mb_cmd_name {
17 {MBC_GET_PORT_DATABASE, "GPDB"},
18 {MBC_GET_ID_LIST, "GIDList"},
19 {MBC_GET_LINK_PRIV_STATS, "Stats"},
20 {MBC_GET_RESOURCE_COUNTS, "ResCnt"},
23 static const char *mb_to_str(uint16_t cmd)
26 struct mb_cmd_name *e;
28 for (i = 0; i < ARRAY_SIZE(mb_str); i++) {
36 static struct rom_cmd {
40 { MBC_EXECUTE_FIRMWARE },
41 { MBC_READ_RAM_WORD },
42 { MBC_MAILBOX_REGISTER_TEST },
43 { MBC_VERIFY_CHECKSUM },
44 { MBC_GET_FIRMWARE_VERSION },
45 { MBC_LOAD_RISC_RAM },
46 { MBC_DUMP_RISC_RAM },
47 { MBC_LOAD_RISC_RAM_EXTENDED },
48 { MBC_DUMP_RISC_RAM_EXTENDED },
49 { MBC_WRITE_RAM_WORD_EXTENDED },
50 { MBC_READ_RAM_EXTENDED },
51 { MBC_GET_RESOURCE_COUNTS },
52 { MBC_SET_FIRMWARE_OPTION },
53 { MBC_MID_INITIALIZE_FIRMWARE },
54 { MBC_GET_FIRMWARE_STATE },
55 { MBC_GET_MEM_OFFLOAD_CNTRL_STAT },
56 { MBC_GET_RETRY_COUNT },
57 { MBC_TRACE_CONTROL },
58 { MBC_INITIALIZE_MULTIQ },
59 { MBC_IOCB_COMMAND_A64 },
60 { MBC_GET_ADAPTER_LOOP_ID },
62 { MBC_GET_RNID_PARAMS },
63 { MBC_GET_SET_ZIO_THRESHOLD },
66 static int is_rom_cmd(uint16_t cmd)
71 for (i = 0; i < ARRAY_SIZE(rom_cmds); i++) {
81 * qla2x00_mailbox_command
82 * Issue mailbox command and waits for completion.
85 * ha = adapter block pointer.
86 * mcp = driver internal mbx struct pointer.
89 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
92 * 0 : QLA_SUCCESS = cmd performed success
93 * 1 : QLA_FUNCTION_FAILED (error encountered)
94 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
100 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
103 unsigned long flags = 0;
105 uint8_t abort_active;
107 uint16_t command = 0;
109 uint16_t __iomem *optr;
112 unsigned long wait_time;
113 struct qla_hw_data *ha = vha->hw;
114 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
118 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
120 if (ha->pdev->error_state > pci_channel_io_frozen) {
121 ql_log(ql_log_warn, vha, 0x1001,
122 "error_state is greater than pci_channel_io_frozen, "
124 return QLA_FUNCTION_TIMEOUT;
127 if (vha->device_flags & DFLG_DEV_FAILED) {
128 ql_log(ql_log_warn, vha, 0x1002,
129 "Device in failed state, exiting.\n");
130 return QLA_FUNCTION_TIMEOUT;
133 /* if PCI error, then avoid mbx processing.*/
134 if (test_bit(PFLG_DISCONNECTED, &base_vha->dpc_flags) &&
135 test_bit(UNLOADING, &base_vha->dpc_flags)) {
136 ql_log(ql_log_warn, vha, 0xd04e,
137 "PCI error, exiting.\n");
138 return QLA_FUNCTION_TIMEOUT;
142 io_lock_on = base_vha->flags.init_done;
145 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
146 chip_reset = ha->chip_reset;
148 if (ha->flags.pci_channel_io_perm_failure) {
149 ql_log(ql_log_warn, vha, 0x1003,
150 "Perm failure on EEH timeout MBX, exiting.\n");
151 return QLA_FUNCTION_TIMEOUT;
154 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
155 /* Setting Link-Down error */
156 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
157 ql_log(ql_log_warn, vha, 0x1004,
158 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
159 return QLA_FUNCTION_TIMEOUT;
162 /* check if ISP abort is active and return cmd with timeout */
163 if ((test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
164 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
165 test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) &&
166 !is_rom_cmd(mcp->mb[0])) {
167 ql_log(ql_log_info, vha, 0x1005,
168 "Cmd 0x%x aborted with timeout since ISP Abort is pending\n",
170 return QLA_FUNCTION_TIMEOUT;
173 atomic_inc(&ha->num_pend_mbx_stage1);
175 * Wait for active mailbox commands to finish by waiting at most tov
176 * seconds. This is to serialize actual issuing of mailbox cmds during
177 * non ISP abort time.
179 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
180 /* Timeout occurred. Return error. */
181 ql_log(ql_log_warn, vha, 0xd035,
182 "Cmd access timeout, cmd=0x%x, Exiting.\n",
184 atomic_dec(&ha->num_pend_mbx_stage1);
185 return QLA_FUNCTION_TIMEOUT;
187 atomic_dec(&ha->num_pend_mbx_stage1);
188 if (ha->flags.purge_mbox || chip_reset != ha->chip_reset) {
194 /* Save mailbox command for debug */
197 ql_dbg(ql_dbg_mbx, vha, 0x1006,
198 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
200 spin_lock_irqsave(&ha->hardware_lock, flags);
202 if (ha->flags.purge_mbox || chip_reset != ha->chip_reset ||
203 ha->flags.mbox_busy) {
205 spin_unlock_irqrestore(&ha->hardware_lock, flags);
208 ha->flags.mbox_busy = 1;
210 /* Load mailbox registers. */
212 optr = (uint16_t __iomem *)®->isp82.mailbox_in[0];
213 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
214 optr = (uint16_t __iomem *)®->isp24.mailbox0;
216 optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0);
219 command = mcp->mb[0];
220 mboxes = mcp->out_mb;
222 ql_dbg(ql_dbg_mbx, vha, 0x1111,
223 "Mailbox registers (OUT):\n");
224 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
225 if (IS_QLA2200(ha) && cnt == 8)
227 (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8);
228 if (mboxes & BIT_0) {
229 ql_dbg(ql_dbg_mbx, vha, 0x1112,
230 "mbox[%d]<-0x%04x\n", cnt, *iptr);
231 WRT_REG_WORD(optr, *iptr);
239 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
240 "I/O Address = %p.\n", optr);
242 /* Issue set host interrupt command to send cmd out. */
243 ha->flags.mbox_int = 0;
244 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
246 /* Unlock mbx registers and wait for interrupt */
247 ql_dbg(ql_dbg_mbx, vha, 0x100f,
248 "Going to unlock irq & waiting for interrupts. "
249 "jiffies=%lx.\n", jiffies);
251 /* Wait for mbx cmd completion until timeout */
252 atomic_inc(&ha->num_pend_mbx_stage2);
253 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
254 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
256 if (IS_P3P_TYPE(ha)) {
257 if (RD_REG_DWORD(®->isp82.hint) &
258 HINT_MBX_INT_PENDING) {
259 ha->flags.mbox_busy = 0;
260 spin_unlock_irqrestore(&ha->hardware_lock,
263 atomic_dec(&ha->num_pend_mbx_stage2);
264 ql_dbg(ql_dbg_mbx, vha, 0x1010,
265 "Pending mailbox timeout, exiting.\n");
266 rval = QLA_FUNCTION_TIMEOUT;
269 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
270 } else if (IS_FWI2_CAPABLE(ha))
271 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
273 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
274 spin_unlock_irqrestore(&ha->hardware_lock, flags);
277 atomic_inc(&ha->num_pend_mbx_stage3);
278 if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
280 if (chip_reset != ha->chip_reset) {
281 spin_lock_irqsave(&ha->hardware_lock, flags);
282 ha->flags.mbox_busy = 0;
283 spin_unlock_irqrestore(&ha->hardware_lock,
285 atomic_dec(&ha->num_pend_mbx_stage2);
286 atomic_dec(&ha->num_pend_mbx_stage3);
290 ql_dbg(ql_dbg_mbx, vha, 0x117a,
291 "cmd=%x Timeout.\n", command);
292 spin_lock_irqsave(&ha->hardware_lock, flags);
293 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
294 spin_unlock_irqrestore(&ha->hardware_lock, flags);
296 } else if (ha->flags.purge_mbox ||
297 chip_reset != ha->chip_reset) {
298 spin_lock_irqsave(&ha->hardware_lock, flags);
299 ha->flags.mbox_busy = 0;
300 spin_unlock_irqrestore(&ha->hardware_lock, flags);
301 atomic_dec(&ha->num_pend_mbx_stage2);
302 atomic_dec(&ha->num_pend_mbx_stage3);
306 atomic_dec(&ha->num_pend_mbx_stage3);
308 if (time_after(jiffies, wait_time + 5 * HZ))
309 ql_log(ql_log_warn, vha, 0x1015, "cmd=0x%x, waited %d msecs\n",
310 command, jiffies_to_msecs(jiffies - wait_time));
312 ql_dbg(ql_dbg_mbx, vha, 0x1011,
313 "Cmd=%x Polling Mode.\n", command);
315 if (IS_P3P_TYPE(ha)) {
316 if (RD_REG_DWORD(®->isp82.hint) &
317 HINT_MBX_INT_PENDING) {
318 ha->flags.mbox_busy = 0;
319 spin_unlock_irqrestore(&ha->hardware_lock,
321 atomic_dec(&ha->num_pend_mbx_stage2);
322 ql_dbg(ql_dbg_mbx, vha, 0x1012,
323 "Pending mailbox timeout, exiting.\n");
324 rval = QLA_FUNCTION_TIMEOUT;
327 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
328 } else if (IS_FWI2_CAPABLE(ha))
329 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
331 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
332 spin_unlock_irqrestore(&ha->hardware_lock, flags);
334 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
335 while (!ha->flags.mbox_int) {
336 if (ha->flags.purge_mbox ||
337 chip_reset != ha->chip_reset) {
338 spin_lock_irqsave(&ha->hardware_lock, flags);
339 ha->flags.mbox_busy = 0;
340 spin_unlock_irqrestore(&ha->hardware_lock,
342 atomic_dec(&ha->num_pend_mbx_stage2);
347 if (time_after(jiffies, wait_time))
351 * Check if it's UNLOADING, cause we cannot poll in
352 * this case, or else a NULL pointer dereference
355 if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)))
356 return QLA_FUNCTION_TIMEOUT;
358 /* Check for pending interrupts. */
359 qla2x00_poll(ha->rsp_q_map[0]);
361 if (!ha->flags.mbox_int &&
363 command == MBC_LOAD_RISC_RAM_EXTENDED))
366 ql_dbg(ql_dbg_mbx, vha, 0x1013,
368 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
370 atomic_dec(&ha->num_pend_mbx_stage2);
372 /* Check whether we timed out */
373 if (ha->flags.mbox_int) {
376 ql_dbg(ql_dbg_mbx, vha, 0x1014,
377 "Cmd=%x completed.\n", command);
379 /* Got interrupt. Clear the flag. */
380 ha->flags.mbox_int = 0;
381 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
383 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
384 spin_lock_irqsave(&ha->hardware_lock, flags);
385 ha->flags.mbox_busy = 0;
386 spin_unlock_irqrestore(&ha->hardware_lock, flags);
388 /* Setting Link-Down error */
389 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
391 rval = QLA_FUNCTION_FAILED;
392 ql_log(ql_log_warn, vha, 0xd048,
393 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
397 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE) {
398 ql_dbg(ql_dbg_mbx, vha, 0x11ff,
399 "mb_out[0] = %#x <> %#x\n", ha->mailbox_out[0],
400 MBS_COMMAND_COMPLETE);
401 rval = QLA_FUNCTION_FAILED;
404 /* Load return mailbox registers. */
406 iptr = (uint16_t *)&ha->mailbox_out[0];
409 ql_dbg(ql_dbg_mbx, vha, 0x1113,
410 "Mailbox registers (IN):\n");
411 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
412 if (mboxes & BIT_0) {
414 ql_dbg(ql_dbg_mbx, vha, 0x1114,
415 "mbox[%d]->0x%04x\n", cnt, *iptr2);
425 uint32_t ictrl, host_status, hccr;
428 if (IS_FWI2_CAPABLE(ha)) {
429 mb[0] = RD_REG_WORD(®->isp24.mailbox0);
430 mb[1] = RD_REG_WORD(®->isp24.mailbox1);
431 mb[2] = RD_REG_WORD(®->isp24.mailbox2);
432 mb[3] = RD_REG_WORD(®->isp24.mailbox3);
433 mb[7] = RD_REG_WORD(®->isp24.mailbox7);
434 ictrl = RD_REG_DWORD(®->isp24.ictrl);
435 host_status = RD_REG_DWORD(®->isp24.host_status);
436 hccr = RD_REG_DWORD(®->isp24.hccr);
438 ql_log(ql_log_warn, vha, 0xd04c,
439 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
440 "mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n",
441 command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3],
442 mb[7], host_status, hccr);
445 mb[0] = RD_MAILBOX_REG(ha, ®->isp, 0);
446 ictrl = RD_REG_WORD(®->isp.ictrl);
447 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
448 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
449 "mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]);
451 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
453 /* Capture FW dump only, if PCI device active */
454 if (!pci_channel_offline(vha->hw->pdev)) {
455 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
456 if (w == 0xffff || ictrl == 0xffffffff ||
457 (chip_reset != ha->chip_reset)) {
458 /* This is special case if there is unload
459 * of driver happening and if PCI device go
460 * into bad state due to PCI error condition
461 * then only PCI ERR flag would be set.
462 * we will do premature exit for above case.
464 spin_lock_irqsave(&ha->hardware_lock, flags);
465 ha->flags.mbox_busy = 0;
466 spin_unlock_irqrestore(&ha->hardware_lock,
468 rval = QLA_FUNCTION_TIMEOUT;
472 /* Attempt to capture firmware dump for further
473 * anallysis of the current formware state. we do not
474 * need to do this if we are intentionally generating
477 if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
478 ha->isp_ops->fw_dump(vha, 0);
479 rval = QLA_FUNCTION_TIMEOUT;
482 spin_lock_irqsave(&ha->hardware_lock, flags);
483 ha->flags.mbox_busy = 0;
484 spin_unlock_irqrestore(&ha->hardware_lock, flags);
489 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
490 ql_dbg(ql_dbg_mbx, vha, 0x101a,
491 "Checking for additional resp interrupt.\n");
493 /* polling mode for non isp_abort commands. */
494 qla2x00_poll(ha->rsp_q_map[0]);
497 if (rval == QLA_FUNCTION_TIMEOUT &&
498 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
499 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
500 ha->flags.eeh_busy) {
501 /* not in dpc. schedule it for dpc to take over. */
502 ql_dbg(ql_dbg_mbx, vha, 0x101b,
503 "Timeout, schedule isp_abort_needed.\n");
505 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
506 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
507 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
508 if (IS_QLA82XX(ha)) {
509 ql_dbg(ql_dbg_mbx, vha, 0x112a,
510 "disabling pause transmit on port "
513 QLA82XX_CRB_NIU + 0x98,
514 CRB_NIU_XG_PAUSE_CTL_P0|
515 CRB_NIU_XG_PAUSE_CTL_P1);
517 ql_log(ql_log_info, base_vha, 0x101c,
518 "Mailbox cmd timeout occurred, cmd=0x%x, "
519 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
520 "abort.\n", command, mcp->mb[0],
522 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
523 qla2xxx_wake_dpc(vha);
525 } else if (current == ha->dpc_thread) {
526 /* call abort directly since we are in the DPC thread */
527 ql_dbg(ql_dbg_mbx, vha, 0x101d,
528 "Timeout, calling abort_isp.\n");
530 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
531 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
532 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
533 if (IS_QLA82XX(ha)) {
534 ql_dbg(ql_dbg_mbx, vha, 0x112b,
535 "disabling pause transmit on port "
538 QLA82XX_CRB_NIU + 0x98,
539 CRB_NIU_XG_PAUSE_CTL_P0|
540 CRB_NIU_XG_PAUSE_CTL_P1);
542 ql_log(ql_log_info, base_vha, 0x101e,
543 "Mailbox cmd timeout occurred, cmd=0x%x, "
544 "mb[0]=0x%x. Scheduling ISP abort ",
545 command, mcp->mb[0]);
546 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
547 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
548 /* Allow next mbx cmd to come in. */
549 complete(&ha->mbx_cmd_comp);
550 if (ha->isp_ops->abort_isp(vha)) {
551 /* Failed. retry later. */
552 set_bit(ISP_ABORT_NEEDED,
555 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
556 ql_dbg(ql_dbg_mbx, vha, 0x101f,
557 "Finished abort_isp.\n");
564 /* Allow next mbx cmd to come in. */
565 complete(&ha->mbx_cmd_comp);
568 if (rval == QLA_ABORTED) {
569 ql_log(ql_log_info, vha, 0xd035,
570 "Chip Reset in progress. Purging Mbox cmd=0x%x.\n",
573 if (ql2xextended_error_logging & (ql_dbg_disc|ql_dbg_mbx)) {
574 pr_warn("%s [%s]-%04x:%ld: **** Failed=%x", QL_MSGHDR,
575 dev_name(&ha->pdev->dev), 0x1020+0x800,
579 for (i = 0; i < ha->mbx_count && cnt; i++, mboxes >>= 1)
580 if (mboxes & BIT_0) {
581 printk(" mb[%u]=%x", i, mcp->mb[i]);
584 pr_warn(" cmd=%x ****\n", command);
586 if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha))) {
587 ql_dbg(ql_dbg_mbx, vha, 0x1198,
588 "host_status=%#x intr_ctrl=%#x intr_status=%#x\n",
589 RD_REG_DWORD(®->isp24.host_status),
590 RD_REG_DWORD(®->isp24.ictrl),
591 RD_REG_DWORD(®->isp24.istatus));
593 ql_dbg(ql_dbg_mbx, vha, 0x1206,
594 "ctrl_status=%#x ictrl=%#x istatus=%#x\n",
595 RD_REG_WORD(®->isp.ctrl_status),
596 RD_REG_WORD(®->isp.ictrl),
597 RD_REG_WORD(®->isp.istatus));
600 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
607 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
608 uint32_t risc_code_size)
611 struct qla_hw_data *ha = vha->hw;
613 mbx_cmd_t *mcp = &mc;
615 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
616 "Entered %s.\n", __func__);
618 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
619 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
620 mcp->mb[8] = MSW(risc_addr);
621 mcp->out_mb = MBX_8|MBX_0;
623 mcp->mb[0] = MBC_LOAD_RISC_RAM;
626 mcp->mb[1] = LSW(risc_addr);
627 mcp->mb[2] = MSW(req_dma);
628 mcp->mb[3] = LSW(req_dma);
629 mcp->mb[6] = MSW(MSD(req_dma));
630 mcp->mb[7] = LSW(MSD(req_dma));
631 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
632 if (IS_FWI2_CAPABLE(ha)) {
633 mcp->mb[4] = MSW(risc_code_size);
634 mcp->mb[5] = LSW(risc_code_size);
635 mcp->out_mb |= MBX_5|MBX_4;
637 mcp->mb[4] = LSW(risc_code_size);
638 mcp->out_mb |= MBX_4;
641 mcp->in_mb = MBX_1|MBX_0;
642 mcp->tov = MBX_TOV_SECONDS;
644 rval = qla2x00_mailbox_command(vha, mcp);
646 if (rval != QLA_SUCCESS) {
647 ql_dbg(ql_dbg_mbx, vha, 0x1023,
648 "Failed=%x mb[0]=%x mb[1]=%x.\n",
649 rval, mcp->mb[0], mcp->mb[1]);
651 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
652 "Done %s.\n", __func__);
658 #define EXTENDED_BB_CREDITS BIT_0
659 #define NVME_ENABLE_FLAG BIT_3
660 static inline uint16_t qla25xx_set_sfp_lr_dist(struct qla_hw_data *ha)
662 uint16_t mb4 = BIT_0;
664 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
665 mb4 |= ha->long_range_distance << LR_DIST_FW_POS;
670 static inline uint16_t qla25xx_set_nvr_lr_dist(struct qla_hw_data *ha)
672 uint16_t mb4 = BIT_0;
674 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
675 struct nvram_81xx *nv = ha->nvram;
677 mb4 |= LR_DIST_FW_FIELD(nv->enhanced_features);
685 * Start adapter firmware.
688 * ha = adapter block pointer.
689 * TARGET_QUEUE_LOCK must be released.
690 * ADAPTER_STATE_LOCK must be released.
693 * qla2x00 local function return status code.
699 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
702 struct qla_hw_data *ha = vha->hw;
704 mbx_cmd_t *mcp = &mc;
706 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
707 "Entered %s.\n", __func__);
709 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
712 if (IS_FWI2_CAPABLE(ha)) {
713 mcp->mb[1] = MSW(risc_addr);
714 mcp->mb[2] = LSW(risc_addr);
717 ha->flags.using_lr_setting = 0;
718 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
719 IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
720 if (ql2xautodetectsfp) {
721 if (ha->flags.detected_lr_sfp) {
723 qla25xx_set_sfp_lr_dist(ha);
724 ha->flags.using_lr_setting = 1;
727 struct nvram_81xx *nv = ha->nvram;
728 /* set LR distance if specified in nvram */
729 if (nv->enhanced_features &
730 NEF_LR_DIST_ENABLE) {
732 qla25xx_set_nvr_lr_dist(ha);
733 ha->flags.using_lr_setting = 1;
738 if (ql2xnvmeenable && (IS_QLA27XX(ha) || IS_QLA28XX(ha)))
739 mcp->mb[4] |= NVME_ENABLE_FLAG;
741 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
742 struct nvram_81xx *nv = ha->nvram;
743 /* set minimum speed if specified in nvram */
744 if (nv->min_supported_speed >= 2 &&
745 nv->min_supported_speed <= 5) {
747 mcp->mb[11] |= nv->min_supported_speed & 0xF;
748 mcp->out_mb |= MBX_11;
750 vha->min_supported_speed =
751 nv->min_supported_speed;
755 if (ha->flags.exlogins_enabled)
756 mcp->mb[4] |= ENABLE_EXTENDED_LOGIN;
758 if (ha->flags.exchoffld_enabled)
759 mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD;
761 mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
762 mcp->in_mb |= MBX_3 | MBX_2 | MBX_1;
764 mcp->mb[1] = LSW(risc_addr);
765 mcp->out_mb |= MBX_1;
766 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
768 mcp->out_mb |= MBX_2;
772 mcp->tov = MBX_TOV_SECONDS;
774 rval = qla2x00_mailbox_command(vha, mcp);
776 if (rval != QLA_SUCCESS) {
777 ql_dbg(ql_dbg_mbx, vha, 0x1026,
778 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
782 if (!IS_FWI2_CAPABLE(ha))
785 ha->fw_ability_mask = mcp->mb[3] << 16 | mcp->mb[2];
786 ql_dbg(ql_dbg_mbx, vha, 0x119a,
787 "fw_ability_mask=%x.\n", ha->fw_ability_mask);
788 ql_dbg(ql_dbg_mbx, vha, 0x1027, "exchanges=%x.\n", mcp->mb[1]);
789 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
790 ha->max_supported_speed = mcp->mb[2] & (BIT_0|BIT_1);
791 ql_dbg(ql_dbg_mbx, vha, 0x119b, "max_supported_speed=%s.\n",
792 ha->max_supported_speed == 0 ? "16Gps" :
793 ha->max_supported_speed == 1 ? "32Gps" :
794 ha->max_supported_speed == 2 ? "64Gps" : "unknown");
795 if (vha->min_supported_speed) {
796 ha->min_supported_speed = mcp->mb[5] &
797 (BIT_0 | BIT_1 | BIT_2);
798 ql_dbg(ql_dbg_mbx, vha, 0x119c,
799 "min_supported_speed=%s.\n",
800 ha->min_supported_speed == 6 ? "64Gps" :
801 ha->min_supported_speed == 5 ? "32Gps" :
802 ha->min_supported_speed == 4 ? "16Gps" :
803 ha->min_supported_speed == 3 ? "8Gps" :
804 ha->min_supported_speed == 2 ? "4Gps" : "unknown");
809 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
810 "Done %s.\n", __func__);
816 * qla_get_exlogin_status
817 * Get extended login status
818 * uses the memory offload control/status Mailbox
821 * ha: adapter state pointer.
822 * fwopt: firmware options
825 * qla2x00 local function status
830 #define FETCH_XLOGINS_STAT 0x8
832 qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
833 uint16_t *ex_logins_cnt)
837 mbx_cmd_t *mcp = &mc;
839 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f,
840 "Entered %s\n", __func__);
842 memset(mcp->mb, 0 , sizeof(mcp->mb));
843 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
844 mcp->mb[1] = FETCH_XLOGINS_STAT;
845 mcp->out_mb = MBX_1|MBX_0;
846 mcp->in_mb = MBX_10|MBX_4|MBX_0;
847 mcp->tov = MBX_TOV_SECONDS;
850 rval = qla2x00_mailbox_command(vha, mcp);
851 if (rval != QLA_SUCCESS) {
852 ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval);
854 *buf_sz = mcp->mb[4];
855 *ex_logins_cnt = mcp->mb[10];
857 ql_log(ql_log_info, vha, 0x1190,
858 "buffer size 0x%x, exchange login count=%d\n",
859 mcp->mb[4], mcp->mb[10]);
861 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116,
862 "Done %s.\n", __func__);
869 * qla_set_exlogin_mem_cfg
870 * set extended login memory configuration
871 * Mbx needs to be issues before init_cb is set
874 * ha: adapter state pointer.
875 * buffer: buffer pointer
876 * phys_addr: physical address of buffer
877 * size: size of buffer
878 * TARGET_QUEUE_LOCK must be released
879 * ADAPTER_STATE_LOCK must be release
882 * qla2x00 local funxtion status code.
887 #define CONFIG_XLOGINS_MEM 0x3
889 qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
893 mbx_cmd_t *mcp = &mc;
894 struct qla_hw_data *ha = vha->hw;
896 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
897 "Entered %s.\n", __func__);
899 memset(mcp->mb, 0 , sizeof(mcp->mb));
900 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
901 mcp->mb[1] = CONFIG_XLOGINS_MEM;
902 mcp->mb[2] = MSW(phys_addr);
903 mcp->mb[3] = LSW(phys_addr);
904 mcp->mb[6] = MSW(MSD(phys_addr));
905 mcp->mb[7] = LSW(MSD(phys_addr));
906 mcp->mb[8] = MSW(ha->exlogin_size);
907 mcp->mb[9] = LSW(ha->exlogin_size);
908 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
909 mcp->in_mb = MBX_11|MBX_0;
910 mcp->tov = MBX_TOV_SECONDS;
912 rval = qla2x00_mailbox_command(vha, mcp);
913 if (rval != QLA_SUCCESS) {
915 ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
917 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
918 "Done %s.\n", __func__);
925 * qla_get_exchoffld_status
926 * Get exchange offload status
927 * uses the memory offload control/status Mailbox
930 * ha: adapter state pointer.
931 * fwopt: firmware options
934 * qla2x00 local function status
939 #define FETCH_XCHOFFLD_STAT 0x2
941 qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
942 uint16_t *ex_logins_cnt)
946 mbx_cmd_t *mcp = &mc;
948 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019,
949 "Entered %s\n", __func__);
951 memset(mcp->mb, 0 , sizeof(mcp->mb));
952 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
953 mcp->mb[1] = FETCH_XCHOFFLD_STAT;
954 mcp->out_mb = MBX_1|MBX_0;
955 mcp->in_mb = MBX_10|MBX_4|MBX_0;
956 mcp->tov = MBX_TOV_SECONDS;
959 rval = qla2x00_mailbox_command(vha, mcp);
960 if (rval != QLA_SUCCESS) {
961 ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval);
963 *buf_sz = mcp->mb[4];
964 *ex_logins_cnt = mcp->mb[10];
966 ql_log(ql_log_info, vha, 0x118e,
967 "buffer size 0x%x, exchange offload count=%d\n",
968 mcp->mb[4], mcp->mb[10]);
970 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156,
971 "Done %s.\n", __func__);
978 * qla_set_exchoffld_mem_cfg
979 * Set exchange offload memory configuration
980 * Mbx needs to be issues before init_cb is set
983 * ha: adapter state pointer.
984 * buffer: buffer pointer
985 * phys_addr: physical address of buffer
986 * size: size of buffer
987 * TARGET_QUEUE_LOCK must be released
988 * ADAPTER_STATE_LOCK must be release
991 * qla2x00 local funxtion status code.
996 #define CONFIG_XCHOFFLD_MEM 0x3
998 qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha)
1002 mbx_cmd_t *mcp = &mc;
1003 struct qla_hw_data *ha = vha->hw;
1005 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157,
1006 "Entered %s.\n", __func__);
1008 memset(mcp->mb, 0 , sizeof(mcp->mb));
1009 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
1010 mcp->mb[1] = CONFIG_XCHOFFLD_MEM;
1011 mcp->mb[2] = MSW(ha->exchoffld_buf_dma);
1012 mcp->mb[3] = LSW(ha->exchoffld_buf_dma);
1013 mcp->mb[6] = MSW(MSD(ha->exchoffld_buf_dma));
1014 mcp->mb[7] = LSW(MSD(ha->exchoffld_buf_dma));
1015 mcp->mb[8] = MSW(ha->exchoffld_size);
1016 mcp->mb[9] = LSW(ha->exchoffld_size);
1017 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1018 mcp->in_mb = MBX_11|MBX_0;
1019 mcp->tov = MBX_TOV_SECONDS;
1021 rval = qla2x00_mailbox_command(vha, mcp);
1022 if (rval != QLA_SUCCESS) {
1024 ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval);
1026 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
1027 "Done %s.\n", __func__);
1034 * qla2x00_get_fw_version
1035 * Get firmware version.
1038 * ha: adapter state pointer.
1039 * major: pointer for major number.
1040 * minor: pointer for minor number.
1041 * subminor: pointer for subminor number.
1044 * qla2x00 local function return status code.
1050 qla2x00_get_fw_version(scsi_qla_host_t *vha)
1054 mbx_cmd_t *mcp = &mc;
1055 struct qla_hw_data *ha = vha->hw;
1057 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
1058 "Entered %s.\n", __func__);
1060 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
1061 mcp->out_mb = MBX_0;
1062 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1063 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
1064 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
1065 if (IS_FWI2_CAPABLE(ha))
1066 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
1067 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
1069 MBX_25|MBX_24|MBX_23|MBX_22|MBX_21|MBX_20|MBX_19|MBX_18|
1070 MBX_14|MBX_13|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7;
1073 mcp->tov = MBX_TOV_SECONDS;
1074 rval = qla2x00_mailbox_command(vha, mcp);
1075 if (rval != QLA_SUCCESS)
1078 /* Return mailbox data. */
1079 ha->fw_major_version = mcp->mb[1];
1080 ha->fw_minor_version = mcp->mb[2];
1081 ha->fw_subminor_version = mcp->mb[3];
1082 ha->fw_attributes = mcp->mb[6];
1083 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
1084 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
1086 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
1088 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
1089 ha->mpi_version[0] = mcp->mb[10] & 0xff;
1090 ha->mpi_version[1] = mcp->mb[11] >> 8;
1091 ha->mpi_version[2] = mcp->mb[11] & 0xff;
1092 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
1093 ha->phy_version[0] = mcp->mb[8] & 0xff;
1094 ha->phy_version[1] = mcp->mb[9] >> 8;
1095 ha->phy_version[2] = mcp->mb[9] & 0xff;
1098 if (IS_FWI2_CAPABLE(ha)) {
1099 ha->fw_attributes_h = mcp->mb[15];
1100 ha->fw_attributes_ext[0] = mcp->mb[16];
1101 ha->fw_attributes_ext[1] = mcp->mb[17];
1102 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
1103 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
1104 __func__, mcp->mb[15], mcp->mb[6]);
1105 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
1106 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
1107 __func__, mcp->mb[17], mcp->mb[16]);
1109 if (ha->fw_attributes_h & 0x4)
1110 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d,
1111 "%s: Firmware supports Extended Login 0x%x\n",
1112 __func__, ha->fw_attributes_h);
1114 if (ha->fw_attributes_h & 0x8)
1115 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191,
1116 "%s: Firmware supports Exchange Offload 0x%x\n",
1117 __func__, ha->fw_attributes_h);
1120 * FW supports nvme and driver load parameter requested nvme.
1121 * BIT 26 of fw_attributes indicates NVMe support.
1123 if ((ha->fw_attributes_h &
1124 (FW_ATTR_H_NVME | FW_ATTR_H_NVME_UPDATED)) &&
1126 if (ha->fw_attributes_h & FW_ATTR_H_NVME_FBURST)
1127 vha->flags.nvme_first_burst = 1;
1129 vha->flags.nvme_enabled = 1;
1130 ql_log(ql_log_info, vha, 0xd302,
1131 "%s: FC-NVMe is Enabled (0x%x)\n",
1132 __func__, ha->fw_attributes_h);
1136 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1137 ha->serdes_version[0] = mcp->mb[7] & 0xff;
1138 ha->serdes_version[1] = mcp->mb[8] >> 8;
1139 ha->serdes_version[2] = mcp->mb[8] & 0xff;
1140 ha->mpi_version[0] = mcp->mb[10] & 0xff;
1141 ha->mpi_version[1] = mcp->mb[11] >> 8;
1142 ha->mpi_version[2] = mcp->mb[11] & 0xff;
1143 ha->pep_version[0] = mcp->mb[13] & 0xff;
1144 ha->pep_version[1] = mcp->mb[14] >> 8;
1145 ha->pep_version[2] = mcp->mb[14] & 0xff;
1146 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
1147 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
1148 ha->fw_ddr_ram_start = (mcp->mb[23] << 16) | mcp->mb[22];
1149 ha->fw_ddr_ram_end = (mcp->mb[25] << 16) | mcp->mb[24];
1150 if (IS_QLA28XX(ha)) {
1151 if (mcp->mb[16] & BIT_10) {
1152 ql_log(ql_log_info, vha, 0xffff,
1153 "FW support secure flash updates\n");
1154 ha->flags.secure_fw = 1;
1160 if (rval != QLA_SUCCESS) {
1162 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
1165 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
1166 "Done %s.\n", __func__);
1172 * qla2x00_get_fw_options
1173 * Set firmware options.
1176 * ha = adapter block pointer.
1177 * fwopt = pointer for firmware options.
1180 * qla2x00 local function return status code.
1186 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
1190 mbx_cmd_t *mcp = &mc;
1192 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
1193 "Entered %s.\n", __func__);
1195 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
1196 mcp->out_mb = MBX_0;
1197 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1198 mcp->tov = MBX_TOV_SECONDS;
1200 rval = qla2x00_mailbox_command(vha, mcp);
1202 if (rval != QLA_SUCCESS) {
1204 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
1206 fwopts[0] = mcp->mb[0];
1207 fwopts[1] = mcp->mb[1];
1208 fwopts[2] = mcp->mb[2];
1209 fwopts[3] = mcp->mb[3];
1211 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
1212 "Done %s.\n", __func__);
1220 * qla2x00_set_fw_options
1221 * Set firmware options.
1224 * ha = adapter block pointer.
1225 * fwopt = pointer for firmware options.
1228 * qla2x00 local function return status code.
1234 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
1238 mbx_cmd_t *mcp = &mc;
1240 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
1241 "Entered %s.\n", __func__);
1243 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
1244 mcp->mb[1] = fwopts[1];
1245 mcp->mb[2] = fwopts[2];
1246 mcp->mb[3] = fwopts[3];
1247 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1249 if (IS_FWI2_CAPABLE(vha->hw)) {
1250 mcp->in_mb |= MBX_1;
1251 mcp->mb[10] = fwopts[10];
1252 mcp->out_mb |= MBX_10;
1254 mcp->mb[10] = fwopts[10];
1255 mcp->mb[11] = fwopts[11];
1256 mcp->mb[12] = 0; /* Undocumented, but used */
1257 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
1259 mcp->tov = MBX_TOV_SECONDS;
1261 rval = qla2x00_mailbox_command(vha, mcp);
1263 fwopts[0] = mcp->mb[0];
1265 if (rval != QLA_SUCCESS) {
1267 ql_dbg(ql_dbg_mbx, vha, 0x1030,
1268 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
1271 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
1272 "Done %s.\n", __func__);
1279 * qla2x00_mbx_reg_test
1280 * Mailbox register wrap test.
1283 * ha = adapter block pointer.
1284 * TARGET_QUEUE_LOCK must be released.
1285 * ADAPTER_STATE_LOCK must be released.
1288 * qla2x00 local function return status code.
1294 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
1298 mbx_cmd_t *mcp = &mc;
1300 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
1301 "Entered %s.\n", __func__);
1303 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
1304 mcp->mb[1] = 0xAAAA;
1305 mcp->mb[2] = 0x5555;
1306 mcp->mb[3] = 0xAA55;
1307 mcp->mb[4] = 0x55AA;
1308 mcp->mb[5] = 0xA5A5;
1309 mcp->mb[6] = 0x5A5A;
1310 mcp->mb[7] = 0x2525;
1311 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1312 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1313 mcp->tov = MBX_TOV_SECONDS;
1315 rval = qla2x00_mailbox_command(vha, mcp);
1317 if (rval == QLA_SUCCESS) {
1318 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
1319 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
1320 rval = QLA_FUNCTION_FAILED;
1321 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
1322 mcp->mb[7] != 0x2525)
1323 rval = QLA_FUNCTION_FAILED;
1326 if (rval != QLA_SUCCESS) {
1328 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
1331 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
1332 "Done %s.\n", __func__);
1339 * qla2x00_verify_checksum
1340 * Verify firmware checksum.
1343 * ha = adapter block pointer.
1344 * TARGET_QUEUE_LOCK must be released.
1345 * ADAPTER_STATE_LOCK must be released.
1348 * qla2x00 local function return status code.
1354 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
1358 mbx_cmd_t *mcp = &mc;
1360 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
1361 "Entered %s.\n", __func__);
1363 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1364 mcp->out_mb = MBX_0;
1366 if (IS_FWI2_CAPABLE(vha->hw)) {
1367 mcp->mb[1] = MSW(risc_addr);
1368 mcp->mb[2] = LSW(risc_addr);
1369 mcp->out_mb |= MBX_2|MBX_1;
1370 mcp->in_mb |= MBX_2|MBX_1;
1372 mcp->mb[1] = LSW(risc_addr);
1373 mcp->out_mb |= MBX_1;
1374 mcp->in_mb |= MBX_1;
1377 mcp->tov = MBX_TOV_SECONDS;
1379 rval = qla2x00_mailbox_command(vha, mcp);
1381 if (rval != QLA_SUCCESS) {
1382 ql_dbg(ql_dbg_mbx, vha, 0x1036,
1383 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
1384 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
1386 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
1387 "Done %s.\n", __func__);
1394 * qla2x00_issue_iocb
1395 * Issue IOCB using mailbox command
1398 * ha = adapter state pointer.
1399 * buffer = buffer pointer.
1400 * phys_addr = physical address of buffer.
1401 * size = size of buffer.
1402 * TARGET_QUEUE_LOCK must be released.
1403 * ADAPTER_STATE_LOCK must be released.
1406 * qla2x00 local function return status code.
1412 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
1413 dma_addr_t phys_addr, size_t size, uint32_t tov)
1417 mbx_cmd_t *mcp = &mc;
1419 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
1420 "Entered %s.\n", __func__);
1422 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
1424 mcp->mb[2] = MSW(phys_addr);
1425 mcp->mb[3] = LSW(phys_addr);
1426 mcp->mb[6] = MSW(MSD(phys_addr));
1427 mcp->mb[7] = LSW(MSD(phys_addr));
1428 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1429 mcp->in_mb = MBX_2|MBX_0;
1432 rval = qla2x00_mailbox_command(vha, mcp);
1434 if (rval != QLA_SUCCESS) {
1436 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
1438 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
1440 /* Mask reserved bits. */
1441 sts_entry->entry_status &=
1442 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
1443 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
1444 "Done %s.\n", __func__);
1451 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
1454 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
1459 * qla2x00_abort_command
1460 * Abort command aborts a specified IOCB.
1463 * ha = adapter block pointer.
1464 * sp = SB structure pointer.
1467 * qla2x00 local function return status code.
1473 qla2x00_abort_command(srb_t *sp)
1475 unsigned long flags = 0;
1477 uint32_t handle = 0;
1479 mbx_cmd_t *mcp = &mc;
1480 fc_port_t *fcport = sp->fcport;
1481 scsi_qla_host_t *vha = fcport->vha;
1482 struct qla_hw_data *ha = vha->hw;
1483 struct req_que *req;
1484 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1486 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
1487 "Entered %s.\n", __func__);
1489 if (vha->flags.qpairs_available && sp->qpair)
1490 req = sp->qpair->req;
1494 spin_lock_irqsave(&ha->hardware_lock, flags);
1495 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1496 if (req->outstanding_cmds[handle] == sp)
1499 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1501 if (handle == req->num_outstanding_cmds) {
1502 /* command not found */
1503 return QLA_FUNCTION_FAILED;
1506 mcp->mb[0] = MBC_ABORT_COMMAND;
1507 if (HAS_EXTENDED_IDS(ha))
1508 mcp->mb[1] = fcport->loop_id;
1510 mcp->mb[1] = fcport->loop_id << 8;
1511 mcp->mb[2] = (uint16_t)handle;
1512 mcp->mb[3] = (uint16_t)(handle >> 16);
1513 mcp->mb[6] = (uint16_t)cmd->device->lun;
1514 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1516 mcp->tov = MBX_TOV_SECONDS;
1518 rval = qla2x00_mailbox_command(vha, mcp);
1520 if (rval != QLA_SUCCESS) {
1521 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
1523 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
1524 "Done %s.\n", __func__);
1531 qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
1535 mbx_cmd_t *mcp = &mc;
1536 scsi_qla_host_t *vha;
1540 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
1541 "Entered %s.\n", __func__);
1543 mcp->mb[0] = MBC_ABORT_TARGET;
1544 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
1545 if (HAS_EXTENDED_IDS(vha->hw)) {
1546 mcp->mb[1] = fcport->loop_id;
1548 mcp->out_mb |= MBX_10;
1550 mcp->mb[1] = fcport->loop_id << 8;
1552 mcp->mb[2] = vha->hw->loop_reset_delay;
1553 mcp->mb[9] = vha->vp_idx;
1556 mcp->tov = MBX_TOV_SECONDS;
1558 rval = qla2x00_mailbox_command(vha, mcp);
1559 if (rval != QLA_SUCCESS) {
1560 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
1561 "Failed=%x.\n", rval);
1564 /* Issue marker IOCB. */
1565 rval2 = qla2x00_marker(vha, vha->hw->base_qpair, fcport->loop_id, 0,
1567 if (rval2 != QLA_SUCCESS) {
1568 ql_dbg(ql_dbg_mbx, vha, 0x1040,
1569 "Failed to issue marker IOCB (%x).\n", rval2);
1571 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
1572 "Done %s.\n", __func__);
1579 qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1583 mbx_cmd_t *mcp = &mc;
1584 scsi_qla_host_t *vha;
1588 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1589 "Entered %s.\n", __func__);
1591 mcp->mb[0] = MBC_LUN_RESET;
1592 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1593 if (HAS_EXTENDED_IDS(vha->hw))
1594 mcp->mb[1] = fcport->loop_id;
1596 mcp->mb[1] = fcport->loop_id << 8;
1597 mcp->mb[2] = (u32)l;
1599 mcp->mb[9] = vha->vp_idx;
1602 mcp->tov = MBX_TOV_SECONDS;
1604 rval = qla2x00_mailbox_command(vha, mcp);
1605 if (rval != QLA_SUCCESS) {
1606 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1609 /* Issue marker IOCB. */
1610 rval2 = qla2x00_marker(vha, vha->hw->base_qpair, fcport->loop_id, l,
1612 if (rval2 != QLA_SUCCESS) {
1613 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1614 "Failed to issue marker IOCB (%x).\n", rval2);
1616 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1617 "Done %s.\n", __func__);
1624 * qla2x00_get_adapter_id
1625 * Get adapter ID and topology.
1628 * ha = adapter block pointer.
1629 * id = pointer for loop ID.
1630 * al_pa = pointer for AL_PA.
1631 * area = pointer for area.
1632 * domain = pointer for domain.
1633 * top = pointer for topology.
1634 * TARGET_QUEUE_LOCK must be released.
1635 * ADAPTER_STATE_LOCK must be released.
1638 * qla2x00 local function return status code.
1644 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1645 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1649 mbx_cmd_t *mcp = &mc;
1651 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1652 "Entered %s.\n", __func__);
1654 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1655 mcp->mb[9] = vha->vp_idx;
1656 mcp->out_mb = MBX_9|MBX_0;
1657 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1658 if (IS_CNA_CAPABLE(vha->hw))
1659 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1660 if (IS_FWI2_CAPABLE(vha->hw))
1661 mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1662 if (IS_QLA27XX(vha->hw) || IS_QLA28XX(vha->hw))
1663 mcp->in_mb |= MBX_15;
1664 mcp->tov = MBX_TOV_SECONDS;
1666 rval = qla2x00_mailbox_command(vha, mcp);
1667 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1668 rval = QLA_COMMAND_ERROR;
1669 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1670 rval = QLA_INVALID_COMMAND;
1674 *al_pa = LSB(mcp->mb[2]);
1675 *area = MSB(mcp->mb[2]);
1676 *domain = LSB(mcp->mb[3]);
1678 *sw_cap = mcp->mb[7];
1680 if (rval != QLA_SUCCESS) {
1682 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1684 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1685 "Done %s.\n", __func__);
1687 if (IS_CNA_CAPABLE(vha->hw)) {
1688 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1689 vha->fcoe_fcf_idx = mcp->mb[10];
1690 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1691 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1692 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1693 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1694 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1695 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1697 /* If FA-WWN supported */
1698 if (IS_FAWWN_CAPABLE(vha->hw)) {
1699 if (mcp->mb[7] & BIT_14) {
1700 vha->port_name[0] = MSB(mcp->mb[16]);
1701 vha->port_name[1] = LSB(mcp->mb[16]);
1702 vha->port_name[2] = MSB(mcp->mb[17]);
1703 vha->port_name[3] = LSB(mcp->mb[17]);
1704 vha->port_name[4] = MSB(mcp->mb[18]);
1705 vha->port_name[5] = LSB(mcp->mb[18]);
1706 vha->port_name[6] = MSB(mcp->mb[19]);
1707 vha->port_name[7] = LSB(mcp->mb[19]);
1708 fc_host_port_name(vha->host) =
1709 wwn_to_u64(vha->port_name);
1710 ql_dbg(ql_dbg_mbx, vha, 0x10ca,
1711 "FA-WWN acquired %016llx\n",
1712 wwn_to_u64(vha->port_name));
1716 if (IS_QLA27XX(vha->hw) || IS_QLA28XX(vha->hw))
1717 vha->bbcr = mcp->mb[15];
1724 * qla2x00_get_retry_cnt
1725 * Get current firmware login retry count and delay.
1728 * ha = adapter block pointer.
1729 * retry_cnt = pointer to login retry count.
1730 * tov = pointer to login timeout value.
1733 * qla2x00 local function return status code.
1739 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1745 mbx_cmd_t *mcp = &mc;
1747 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1748 "Entered %s.\n", __func__);
1750 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1751 mcp->out_mb = MBX_0;
1752 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1753 mcp->tov = MBX_TOV_SECONDS;
1755 rval = qla2x00_mailbox_command(vha, mcp);
1757 if (rval != QLA_SUCCESS) {
1759 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1760 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1762 /* Convert returned data and check our values. */
1763 *r_a_tov = mcp->mb[3] / 2;
1764 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1765 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1766 /* Update to the larger values */
1767 *retry_cnt = (uint8_t)mcp->mb[1];
1771 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1772 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1779 * qla2x00_init_firmware
1780 * Initialize adapter firmware.
1783 * ha = adapter block pointer.
1784 * dptr = Initialization control block pointer.
1785 * size = size of initialization control block.
1786 * TARGET_QUEUE_LOCK must be released.
1787 * ADAPTER_STATE_LOCK must be released.
1790 * qla2x00 local function return status code.
1796 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1800 mbx_cmd_t *mcp = &mc;
1801 struct qla_hw_data *ha = vha->hw;
1803 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1804 "Entered %s.\n", __func__);
1806 if (IS_P3P_TYPE(ha) && ql2xdbwr)
1807 qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr,
1808 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1810 if (ha->flags.npiv_supported)
1811 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1813 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1816 mcp->mb[2] = MSW(ha->init_cb_dma);
1817 mcp->mb[3] = LSW(ha->init_cb_dma);
1818 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1819 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1820 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1821 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1823 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1824 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1825 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1826 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1827 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1828 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1830 /* 1 and 2 should normally be captured. */
1831 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1832 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
1833 /* mb3 is additional info about the installed SFP. */
1834 mcp->in_mb |= MBX_3;
1835 mcp->buf_size = size;
1836 mcp->flags = MBX_DMA_OUT;
1837 mcp->tov = MBX_TOV_SECONDS;
1838 rval = qla2x00_mailbox_command(vha, mcp);
1840 if (rval != QLA_SUCCESS) {
1842 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1843 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x.\n",
1844 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1846 ql_dbg(ql_dbg_mbx, vha, 0x104d, "init_cb:\n");
1847 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha,
1848 0x0104d, ha->init_cb, sizeof(*ha->init_cb));
1850 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1851 ql_dbg(ql_dbg_mbx, vha, 0x104d, "ex_init_cb:\n");
1852 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha,
1853 0x0104d, ha->ex_init_cb, sizeof(*ha->ex_init_cb));
1856 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1857 if (mcp->mb[2] == 6 || mcp->mb[3] == 2)
1858 ql_dbg(ql_dbg_mbx, vha, 0x119d,
1859 "Invalid SFP/Validation Failed\n");
1861 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1862 "Done %s.\n", __func__);
1870 * qla2x00_get_port_database
1871 * Issue normal/enhanced get port database mailbox command
1872 * and copy device name as necessary.
1875 * ha = adapter state pointer.
1876 * dev = structure pointer.
1877 * opt = enhanced cmd option byte.
1880 * qla2x00 local function return status code.
1886 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1890 mbx_cmd_t *mcp = &mc;
1891 port_database_t *pd;
1892 struct port_database_24xx *pd24;
1894 struct qla_hw_data *ha = vha->hw;
1896 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1897 "Entered %s.\n", __func__);
1900 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1902 ql_log(ql_log_warn, vha, 0x1050,
1903 "Failed to allocate port database structure.\n");
1905 return QLA_MEMORY_ALLOC_FAILED;
1908 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1909 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1910 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1911 mcp->mb[2] = MSW(pd_dma);
1912 mcp->mb[3] = LSW(pd_dma);
1913 mcp->mb[6] = MSW(MSD(pd_dma));
1914 mcp->mb[7] = LSW(MSD(pd_dma));
1915 mcp->mb[9] = vha->vp_idx;
1916 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1918 if (IS_FWI2_CAPABLE(ha)) {
1919 mcp->mb[1] = fcport->loop_id;
1921 mcp->out_mb |= MBX_10|MBX_1;
1922 mcp->in_mb |= MBX_1;
1923 } else if (HAS_EXTENDED_IDS(ha)) {
1924 mcp->mb[1] = fcport->loop_id;
1926 mcp->out_mb |= MBX_10|MBX_1;
1928 mcp->mb[1] = fcport->loop_id << 8 | opt;
1929 mcp->out_mb |= MBX_1;
1931 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1932 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1933 mcp->flags = MBX_DMA_IN;
1934 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1935 rval = qla2x00_mailbox_command(vha, mcp);
1936 if (rval != QLA_SUCCESS)
1939 if (IS_FWI2_CAPABLE(ha)) {
1941 u8 current_login_state, last_login_state;
1943 pd24 = (struct port_database_24xx *) pd;
1945 /* Check for logged in state. */
1946 if (fcport->fc4f_nvme) {
1947 current_login_state = pd24->current_login_state >> 4;
1948 last_login_state = pd24->last_login_state >> 4;
1950 current_login_state = pd24->current_login_state & 0xf;
1951 last_login_state = pd24->last_login_state & 0xf;
1953 fcport->current_login_state = pd24->current_login_state;
1954 fcport->last_login_state = pd24->last_login_state;
1956 /* Check for logged in state. */
1957 if (current_login_state != PDS_PRLI_COMPLETE &&
1958 last_login_state != PDS_PRLI_COMPLETE) {
1959 ql_dbg(ql_dbg_mbx, vha, 0x119a,
1960 "Unable to verify login-state (%x/%x) for loop_id %x.\n",
1961 current_login_state, last_login_state,
1963 rval = QLA_FUNCTION_FAILED;
1969 if (fcport->loop_id == FC_NO_LOOP_ID ||
1970 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1971 memcmp(fcport->port_name, pd24->port_name, 8))) {
1972 /* We lost the device mid way. */
1973 rval = QLA_NOT_LOGGED_IN;
1977 /* Names are little-endian. */
1978 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1979 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1981 /* Get port_id of device. */
1982 fcport->d_id.b.domain = pd24->port_id[0];
1983 fcport->d_id.b.area = pd24->port_id[1];
1984 fcport->d_id.b.al_pa = pd24->port_id[2];
1985 fcport->d_id.b.rsvd_1 = 0;
1987 /* If not target must be initiator or unknown type. */
1988 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1989 fcport->port_type = FCT_INITIATOR;
1991 fcport->port_type = FCT_TARGET;
1993 /* Passback COS information. */
1994 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1995 FC_COS_CLASS2 : FC_COS_CLASS3;
1997 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1998 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
2002 /* Check for logged in state. */
2003 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
2004 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
2005 ql_dbg(ql_dbg_mbx, vha, 0x100a,
2006 "Unable to verify login-state (%x/%x) - "
2007 "portid=%02x%02x%02x.\n", pd->master_state,
2008 pd->slave_state, fcport->d_id.b.domain,
2009 fcport->d_id.b.area, fcport->d_id.b.al_pa);
2010 rval = QLA_FUNCTION_FAILED;
2014 if (fcport->loop_id == FC_NO_LOOP_ID ||
2015 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
2016 memcmp(fcport->port_name, pd->port_name, 8))) {
2017 /* We lost the device mid way. */
2018 rval = QLA_NOT_LOGGED_IN;
2022 /* Names are little-endian. */
2023 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
2024 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
2026 /* Get port_id of device. */
2027 fcport->d_id.b.domain = pd->port_id[0];
2028 fcport->d_id.b.area = pd->port_id[3];
2029 fcport->d_id.b.al_pa = pd->port_id[2];
2030 fcport->d_id.b.rsvd_1 = 0;
2032 /* If not target must be initiator or unknown type. */
2033 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
2034 fcport->port_type = FCT_INITIATOR;
2036 fcport->port_type = FCT_TARGET;
2038 /* Passback COS information. */
2039 fcport->supported_classes = (pd->options & BIT_4) ?
2040 FC_COS_CLASS2 : FC_COS_CLASS3;
2044 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
2047 if (rval != QLA_SUCCESS) {
2048 ql_dbg(ql_dbg_mbx, vha, 0x1052,
2049 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
2050 mcp->mb[0], mcp->mb[1]);
2052 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
2053 "Done %s.\n", __func__);
2060 * qla2x00_get_firmware_state
2061 * Get adapter firmware state.
2064 * ha = adapter block pointer.
2065 * dptr = pointer for firmware state.
2066 * TARGET_QUEUE_LOCK must be released.
2067 * ADAPTER_STATE_LOCK must be released.
2070 * qla2x00 local function return status code.
2076 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
2080 mbx_cmd_t *mcp = &mc;
2081 struct qla_hw_data *ha = vha->hw;
2083 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
2084 "Entered %s.\n", __func__);
2086 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
2087 mcp->out_mb = MBX_0;
2088 if (IS_FWI2_CAPABLE(vha->hw))
2089 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2091 mcp->in_mb = MBX_1|MBX_0;
2092 mcp->tov = MBX_TOV_SECONDS;
2094 rval = qla2x00_mailbox_command(vha, mcp);
2096 /* Return firmware states. */
2097 states[0] = mcp->mb[1];
2098 if (IS_FWI2_CAPABLE(vha->hw)) {
2099 states[1] = mcp->mb[2];
2100 states[2] = mcp->mb[3]; /* SFP info */
2101 states[3] = mcp->mb[4];
2102 states[4] = mcp->mb[5];
2103 states[5] = mcp->mb[6]; /* DPORT status */
2106 if (rval != QLA_SUCCESS) {
2108 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
2110 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
2111 if (mcp->mb[2] == 6 || mcp->mb[3] == 2)
2112 ql_dbg(ql_dbg_mbx, vha, 0x119e,
2113 "Invalid SFP/Validation Failed\n");
2115 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
2116 "Done %s.\n", __func__);
2123 * qla2x00_get_port_name
2124 * Issue get port name mailbox command.
2125 * Returned name is in big endian format.
2128 * ha = adapter block pointer.
2129 * loop_id = loop ID of device.
2130 * name = pointer for name.
2131 * TARGET_QUEUE_LOCK must be released.
2132 * ADAPTER_STATE_LOCK must be released.
2135 * qla2x00 local function return status code.
2141 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
2146 mbx_cmd_t *mcp = &mc;
2148 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
2149 "Entered %s.\n", __func__);
2151 mcp->mb[0] = MBC_GET_PORT_NAME;
2152 mcp->mb[9] = vha->vp_idx;
2153 mcp->out_mb = MBX_9|MBX_1|MBX_0;
2154 if (HAS_EXTENDED_IDS(vha->hw)) {
2155 mcp->mb[1] = loop_id;
2157 mcp->out_mb |= MBX_10;
2159 mcp->mb[1] = loop_id << 8 | opt;
2162 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2163 mcp->tov = MBX_TOV_SECONDS;
2165 rval = qla2x00_mailbox_command(vha, mcp);
2167 if (rval != QLA_SUCCESS) {
2169 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
2172 /* This function returns name in big endian. */
2173 name[0] = MSB(mcp->mb[2]);
2174 name[1] = LSB(mcp->mb[2]);
2175 name[2] = MSB(mcp->mb[3]);
2176 name[3] = LSB(mcp->mb[3]);
2177 name[4] = MSB(mcp->mb[6]);
2178 name[5] = LSB(mcp->mb[6]);
2179 name[6] = MSB(mcp->mb[7]);
2180 name[7] = LSB(mcp->mb[7]);
2183 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
2184 "Done %s.\n", __func__);
2191 * qla24xx_link_initialization
2192 * Issue link initialization mailbox command.
2195 * ha = adapter block pointer.
2196 * TARGET_QUEUE_LOCK must be released.
2197 * ADAPTER_STATE_LOCK must be released.
2200 * qla2x00 local function return status code.
2206 qla24xx_link_initialize(scsi_qla_host_t *vha)
2210 mbx_cmd_t *mcp = &mc;
2212 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
2213 "Entered %s.\n", __func__);
2215 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
2216 return QLA_FUNCTION_FAILED;
2218 mcp->mb[0] = MBC_LINK_INITIALIZATION;
2220 if (vha->hw->operating_mode == LOOP)
2221 mcp->mb[1] |= BIT_6;
2223 mcp->mb[1] |= BIT_5;
2226 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2228 mcp->tov = MBX_TOV_SECONDS;
2230 rval = qla2x00_mailbox_command(vha, mcp);
2232 if (rval != QLA_SUCCESS) {
2233 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
2235 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
2236 "Done %s.\n", __func__);
2244 * Issue LIP reset mailbox command.
2247 * ha = adapter block pointer.
2248 * TARGET_QUEUE_LOCK must be released.
2249 * ADAPTER_STATE_LOCK must be released.
2252 * qla2x00 local function return status code.
2258 qla2x00_lip_reset(scsi_qla_host_t *vha)
2262 mbx_cmd_t *mcp = &mc;
2264 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
2265 "Entered %s.\n", __func__);
2267 if (IS_CNA_CAPABLE(vha->hw)) {
2268 /* Logout across all FCFs. */
2269 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2272 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2273 } else if (IS_FWI2_CAPABLE(vha->hw)) {
2274 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2277 mcp->mb[3] = vha->hw->loop_reset_delay;
2278 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2280 mcp->mb[0] = MBC_LIP_RESET;
2281 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2282 if (HAS_EXTENDED_IDS(vha->hw)) {
2283 mcp->mb[1] = 0x00ff;
2285 mcp->out_mb |= MBX_10;
2287 mcp->mb[1] = 0xff00;
2289 mcp->mb[2] = vha->hw->loop_reset_delay;
2293 mcp->tov = MBX_TOV_SECONDS;
2295 rval = qla2x00_mailbox_command(vha, mcp);
2297 if (rval != QLA_SUCCESS) {
2299 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
2302 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
2303 "Done %s.\n", __func__);
2314 * ha = adapter block pointer.
2315 * sns = pointer for command.
2316 * cmd_size = command size.
2317 * buf_size = response/command size.
2318 * TARGET_QUEUE_LOCK must be released.
2319 * ADAPTER_STATE_LOCK must be released.
2322 * qla2x00 local function return status code.
2328 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
2329 uint16_t cmd_size, size_t buf_size)
2333 mbx_cmd_t *mcp = &mc;
2335 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
2336 "Entered %s.\n", __func__);
2338 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
2339 "Retry cnt=%d ratov=%d total tov=%d.\n",
2340 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
2342 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
2343 mcp->mb[1] = cmd_size;
2344 mcp->mb[2] = MSW(sns_phys_address);
2345 mcp->mb[3] = LSW(sns_phys_address);
2346 mcp->mb[6] = MSW(MSD(sns_phys_address));
2347 mcp->mb[7] = LSW(MSD(sns_phys_address));
2348 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2349 mcp->in_mb = MBX_0|MBX_1;
2350 mcp->buf_size = buf_size;
2351 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
2352 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
2353 rval = qla2x00_mailbox_command(vha, mcp);
2355 if (rval != QLA_SUCCESS) {
2357 ql_dbg(ql_dbg_mbx, vha, 0x105f,
2358 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2359 rval, mcp->mb[0], mcp->mb[1]);
2362 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
2363 "Done %s.\n", __func__);
2370 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2371 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2375 struct logio_entry_24xx *lg;
2378 struct qla_hw_data *ha = vha->hw;
2379 struct req_que *req;
2381 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
2382 "Entered %s.\n", __func__);
2384 if (vha->vp_idx && vha->qpair)
2385 req = vha->qpair->req;
2387 req = ha->req_q_map[0];
2389 lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2391 ql_log(ql_log_warn, vha, 0x1062,
2392 "Failed to allocate login IOCB.\n");
2393 return QLA_MEMORY_ALLOC_FAILED;
2396 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2397 lg->entry_count = 1;
2398 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2399 lg->nport_handle = cpu_to_le16(loop_id);
2400 lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
2402 lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
2404 lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
2405 lg->port_id[0] = al_pa;
2406 lg->port_id[1] = area;
2407 lg->port_id[2] = domain;
2408 lg->vp_index = vha->vp_idx;
2409 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2410 (ha->r_a_tov / 10 * 2) + 2);
2411 if (rval != QLA_SUCCESS) {
2412 ql_dbg(ql_dbg_mbx, vha, 0x1063,
2413 "Failed to issue login IOCB (%x).\n", rval);
2414 } else if (lg->entry_status != 0) {
2415 ql_dbg(ql_dbg_mbx, vha, 0x1064,
2416 "Failed to complete IOCB -- error status (%x).\n",
2418 rval = QLA_FUNCTION_FAILED;
2419 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2420 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2421 iop[1] = le32_to_cpu(lg->io_parameter[1]);
2423 ql_dbg(ql_dbg_mbx, vha, 0x1065,
2424 "Failed to complete IOCB -- completion status (%x) "
2425 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2429 case LSC_SCODE_PORTID_USED:
2430 mb[0] = MBS_PORT_ID_USED;
2431 mb[1] = LSW(iop[1]);
2433 case LSC_SCODE_NPORT_USED:
2434 mb[0] = MBS_LOOP_ID_USED;
2436 case LSC_SCODE_NOLINK:
2437 case LSC_SCODE_NOIOCB:
2438 case LSC_SCODE_NOXCB:
2439 case LSC_SCODE_CMD_FAILED:
2440 case LSC_SCODE_NOFABRIC:
2441 case LSC_SCODE_FW_NOT_READY:
2442 case LSC_SCODE_NOT_LOGGED_IN:
2443 case LSC_SCODE_NOPCB:
2444 case LSC_SCODE_ELS_REJECT:
2445 case LSC_SCODE_CMD_PARAM_ERR:
2446 case LSC_SCODE_NONPORT:
2447 case LSC_SCODE_LOGGED_IN:
2448 case LSC_SCODE_NOFLOGI_ACC:
2450 mb[0] = MBS_COMMAND_ERROR;
2454 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
2455 "Done %s.\n", __func__);
2457 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2459 mb[0] = MBS_COMMAND_COMPLETE;
2461 if (iop[0] & BIT_4) {
2467 /* Passback COS information. */
2469 if (lg->io_parameter[7] || lg->io_parameter[8])
2470 mb[10] |= BIT_0; /* Class 2. */
2471 if (lg->io_parameter[9] || lg->io_parameter[10])
2472 mb[10] |= BIT_1; /* Class 3. */
2473 if (lg->io_parameter[0] & cpu_to_le32(BIT_7))
2474 mb[10] |= BIT_7; /* Confirmed Completion
2479 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2485 * qla2x00_login_fabric
2486 * Issue login fabric port mailbox command.
2489 * ha = adapter block pointer.
2490 * loop_id = device loop ID.
2491 * domain = device domain.
2492 * area = device area.
2493 * al_pa = device AL_PA.
2494 * status = pointer for return status.
2495 * opt = command options.
2496 * TARGET_QUEUE_LOCK must be released.
2497 * ADAPTER_STATE_LOCK must be released.
2500 * qla2x00 local function return status code.
2506 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2507 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2511 mbx_cmd_t *mcp = &mc;
2512 struct qla_hw_data *ha = vha->hw;
2514 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
2515 "Entered %s.\n", __func__);
2517 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
2518 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2519 if (HAS_EXTENDED_IDS(ha)) {
2520 mcp->mb[1] = loop_id;
2522 mcp->out_mb |= MBX_10;
2524 mcp->mb[1] = (loop_id << 8) | opt;
2526 mcp->mb[2] = domain;
2527 mcp->mb[3] = area << 8 | al_pa;
2529 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
2530 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2532 rval = qla2x00_mailbox_command(vha, mcp);
2534 /* Return mailbox statuses. */
2541 /* COS retrieved from Get-Port-Database mailbox command. */
2545 if (rval != QLA_SUCCESS) {
2546 /* RLU tmp code: need to change main mailbox_command function to
2547 * return ok even when the mailbox completion value is not
2548 * SUCCESS. The caller needs to be responsible to interpret
2549 * the return values of this mailbox command if we're not
2550 * to change too much of the existing code.
2552 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2553 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2554 mcp->mb[0] == 0x4006)
2558 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2559 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2560 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2563 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2564 "Done %s.\n", __func__);
2571 * qla2x00_login_local_device
2572 * Issue login loop port mailbox command.
2575 * ha = adapter block pointer.
2576 * loop_id = device loop ID.
2577 * opt = command options.
2580 * Return status code.
2587 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2588 uint16_t *mb_ret, uint8_t opt)
2592 mbx_cmd_t *mcp = &mc;
2593 struct qla_hw_data *ha = vha->hw;
2595 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2596 "Entered %s.\n", __func__);
2598 if (IS_FWI2_CAPABLE(ha))
2599 return qla24xx_login_fabric(vha, fcport->loop_id,
2600 fcport->d_id.b.domain, fcport->d_id.b.area,
2601 fcport->d_id.b.al_pa, mb_ret, opt);
2603 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2604 if (HAS_EXTENDED_IDS(ha))
2605 mcp->mb[1] = fcport->loop_id;
2607 mcp->mb[1] = fcport->loop_id << 8;
2609 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2610 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2611 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2613 rval = qla2x00_mailbox_command(vha, mcp);
2615 /* Return mailbox statuses. */
2616 if (mb_ret != NULL) {
2617 mb_ret[0] = mcp->mb[0];
2618 mb_ret[1] = mcp->mb[1];
2619 mb_ret[6] = mcp->mb[6];
2620 mb_ret[7] = mcp->mb[7];
2623 if (rval != QLA_SUCCESS) {
2624 /* AV tmp code: need to change main mailbox_command function to
2625 * return ok even when the mailbox completion value is not
2626 * SUCCESS. The caller needs to be responsible to interpret
2627 * the return values of this mailbox command if we're not
2628 * to change too much of the existing code.
2630 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2633 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2634 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2635 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2638 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2639 "Done %s.\n", __func__);
2646 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2647 uint8_t area, uint8_t al_pa)
2650 struct logio_entry_24xx *lg;
2652 struct qla_hw_data *ha = vha->hw;
2653 struct req_que *req;
2655 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2656 "Entered %s.\n", __func__);
2658 lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2660 ql_log(ql_log_warn, vha, 0x106e,
2661 "Failed to allocate logout IOCB.\n");
2662 return QLA_MEMORY_ALLOC_FAILED;
2666 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2667 lg->entry_count = 1;
2668 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2669 lg->nport_handle = cpu_to_le16(loop_id);
2671 cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2673 lg->port_id[0] = al_pa;
2674 lg->port_id[1] = area;
2675 lg->port_id[2] = domain;
2676 lg->vp_index = vha->vp_idx;
2677 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2678 (ha->r_a_tov / 10 * 2) + 2);
2679 if (rval != QLA_SUCCESS) {
2680 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2681 "Failed to issue logout IOCB (%x).\n", rval);
2682 } else if (lg->entry_status != 0) {
2683 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2684 "Failed to complete IOCB -- error status (%x).\n",
2686 rval = QLA_FUNCTION_FAILED;
2687 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2688 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2689 "Failed to complete IOCB -- completion status (%x) "
2690 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2691 le32_to_cpu(lg->io_parameter[0]),
2692 le32_to_cpu(lg->io_parameter[1]));
2695 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2696 "Done %s.\n", __func__);
2699 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2705 * qla2x00_fabric_logout
2706 * Issue logout fabric port mailbox command.
2709 * ha = adapter block pointer.
2710 * loop_id = device loop ID.
2711 * TARGET_QUEUE_LOCK must be released.
2712 * ADAPTER_STATE_LOCK must be released.
2715 * qla2x00 local function return status code.
2721 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2722 uint8_t area, uint8_t al_pa)
2726 mbx_cmd_t *mcp = &mc;
2728 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2729 "Entered %s.\n", __func__);
2731 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2732 mcp->out_mb = MBX_1|MBX_0;
2733 if (HAS_EXTENDED_IDS(vha->hw)) {
2734 mcp->mb[1] = loop_id;
2736 mcp->out_mb |= MBX_10;
2738 mcp->mb[1] = loop_id << 8;
2741 mcp->in_mb = MBX_1|MBX_0;
2742 mcp->tov = MBX_TOV_SECONDS;
2744 rval = qla2x00_mailbox_command(vha, mcp);
2746 if (rval != QLA_SUCCESS) {
2748 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2749 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2752 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2753 "Done %s.\n", __func__);
2760 * qla2x00_full_login_lip
2761 * Issue full login LIP mailbox command.
2764 * ha = adapter block pointer.
2765 * TARGET_QUEUE_LOCK must be released.
2766 * ADAPTER_STATE_LOCK must be released.
2769 * qla2x00 local function return status code.
2775 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2779 mbx_cmd_t *mcp = &mc;
2781 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2782 "Entered %s.\n", __func__);
2784 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2785 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_4 : 0;
2788 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2790 mcp->tov = MBX_TOV_SECONDS;
2792 rval = qla2x00_mailbox_command(vha, mcp);
2794 if (rval != QLA_SUCCESS) {
2796 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2799 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2800 "Done %s.\n", __func__);
2807 * qla2x00_get_id_list
2810 * ha = adapter block pointer.
2813 * qla2x00 local function return status code.
2819 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2824 mbx_cmd_t *mcp = &mc;
2826 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2827 "Entered %s.\n", __func__);
2829 if (id_list == NULL)
2830 return QLA_FUNCTION_FAILED;
2832 mcp->mb[0] = MBC_GET_ID_LIST;
2833 mcp->out_mb = MBX_0;
2834 if (IS_FWI2_CAPABLE(vha->hw)) {
2835 mcp->mb[2] = MSW(id_list_dma);
2836 mcp->mb[3] = LSW(id_list_dma);
2837 mcp->mb[6] = MSW(MSD(id_list_dma));
2838 mcp->mb[7] = LSW(MSD(id_list_dma));
2840 mcp->mb[9] = vha->vp_idx;
2841 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2843 mcp->mb[1] = MSW(id_list_dma);
2844 mcp->mb[2] = LSW(id_list_dma);
2845 mcp->mb[3] = MSW(MSD(id_list_dma));
2846 mcp->mb[6] = LSW(MSD(id_list_dma));
2847 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2849 mcp->in_mb = MBX_1|MBX_0;
2850 mcp->tov = MBX_TOV_SECONDS;
2852 rval = qla2x00_mailbox_command(vha, mcp);
2854 if (rval != QLA_SUCCESS) {
2856 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2858 *entries = mcp->mb[1];
2859 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2860 "Done %s.\n", __func__);
2867 * qla2x00_get_resource_cnts
2868 * Get current firmware resource counts.
2871 * ha = adapter block pointer.
2874 * qla2x00 local function return status code.
2880 qla2x00_get_resource_cnts(scsi_qla_host_t *vha)
2882 struct qla_hw_data *ha = vha->hw;
2885 mbx_cmd_t *mcp = &mc;
2887 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2888 "Entered %s.\n", __func__);
2890 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2891 mcp->out_mb = MBX_0;
2892 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2893 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
2894 IS_QLA27XX(ha) || IS_QLA28XX(ha))
2895 mcp->in_mb |= MBX_12;
2896 mcp->tov = MBX_TOV_SECONDS;
2898 rval = qla2x00_mailbox_command(vha, mcp);
2900 if (rval != QLA_SUCCESS) {
2902 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2903 "Failed mb[0]=%x.\n", mcp->mb[0]);
2905 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2906 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2907 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2908 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2909 mcp->mb[11], mcp->mb[12]);
2911 ha->orig_fw_tgt_xcb_count = mcp->mb[1];
2912 ha->cur_fw_tgt_xcb_count = mcp->mb[2];
2913 ha->cur_fw_xcb_count = mcp->mb[3];
2914 ha->orig_fw_xcb_count = mcp->mb[6];
2915 ha->cur_fw_iocb_count = mcp->mb[7];
2916 ha->orig_fw_iocb_count = mcp->mb[10];
2917 if (ha->flags.npiv_supported)
2918 ha->max_npiv_vports = mcp->mb[11];
2919 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
2921 ha->fw_max_fcf_count = mcp->mb[12];
2928 * qla2x00_get_fcal_position_map
2929 * Get FCAL (LILP) position map using mailbox command
2932 * ha = adapter state pointer.
2933 * pos_map = buffer pointer (can be NULL).
2936 * qla2x00 local function return status code.
2942 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2946 mbx_cmd_t *mcp = &mc;
2948 dma_addr_t pmap_dma;
2949 struct qla_hw_data *ha = vha->hw;
2951 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2952 "Entered %s.\n", __func__);
2954 pmap = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2956 ql_log(ql_log_warn, vha, 0x1080,
2957 "Memory alloc failed.\n");
2958 return QLA_MEMORY_ALLOC_FAILED;
2961 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2962 mcp->mb[2] = MSW(pmap_dma);
2963 mcp->mb[3] = LSW(pmap_dma);
2964 mcp->mb[6] = MSW(MSD(pmap_dma));
2965 mcp->mb[7] = LSW(MSD(pmap_dma));
2966 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2967 mcp->in_mb = MBX_1|MBX_0;
2968 mcp->buf_size = FCAL_MAP_SIZE;
2969 mcp->flags = MBX_DMA_IN;
2970 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2971 rval = qla2x00_mailbox_command(vha, mcp);
2973 if (rval == QLA_SUCCESS) {
2974 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2975 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2976 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2977 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2981 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2983 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2985 if (rval != QLA_SUCCESS) {
2986 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2988 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2989 "Done %s.\n", __func__);
2996 * qla2x00_get_link_status
2999 * ha = adapter block pointer.
3000 * loop_id = device loop ID.
3001 * ret_buf = pointer to link status return buffer.
3005 * BIT_0 = mem alloc error.
3006 * BIT_1 = mailbox error.
3009 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
3010 struct link_statistics *stats, dma_addr_t stats_dma)
3014 mbx_cmd_t *mcp = &mc;
3015 uint32_t *iter = (void *)stats;
3016 ushort dwords = offsetof(typeof(*stats), link_up_cnt)/sizeof(*iter);
3017 struct qla_hw_data *ha = vha->hw;
3019 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
3020 "Entered %s.\n", __func__);
3022 mcp->mb[0] = MBC_GET_LINK_STATUS;
3023 mcp->mb[2] = MSW(LSD(stats_dma));
3024 mcp->mb[3] = LSW(LSD(stats_dma));
3025 mcp->mb[6] = MSW(MSD(stats_dma));
3026 mcp->mb[7] = LSW(MSD(stats_dma));
3027 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
3029 if (IS_FWI2_CAPABLE(ha)) {
3030 mcp->mb[1] = loop_id;
3033 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
3034 mcp->in_mb |= MBX_1;
3035 } else if (HAS_EXTENDED_IDS(ha)) {
3036 mcp->mb[1] = loop_id;
3038 mcp->out_mb |= MBX_10|MBX_1;
3040 mcp->mb[1] = loop_id << 8;
3041 mcp->out_mb |= MBX_1;
3043 mcp->tov = MBX_TOV_SECONDS;
3044 mcp->flags = IOCTL_CMD;
3045 rval = qla2x00_mailbox_command(vha, mcp);
3047 if (rval == QLA_SUCCESS) {
3048 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3049 ql_dbg(ql_dbg_mbx, vha, 0x1085,
3050 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3051 rval = QLA_FUNCTION_FAILED;
3053 /* Re-endianize - firmware data is le32. */
3054 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
3055 "Done %s.\n", __func__);
3056 for ( ; dwords--; iter++)
3061 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
3068 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
3069 dma_addr_t stats_dma, uint16_t options)
3073 mbx_cmd_t *mcp = &mc;
3074 uint32_t *iter, dwords;
3076 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
3077 "Entered %s.\n", __func__);
3079 memset(&mc, 0, sizeof(mc));
3080 mc.mb[0] = MBC_GET_LINK_PRIV_STATS;
3081 mc.mb[2] = MSW(stats_dma);
3082 mc.mb[3] = LSW(stats_dma);
3083 mc.mb[6] = MSW(MSD(stats_dma));
3084 mc.mb[7] = LSW(MSD(stats_dma));
3085 mc.mb[8] = sizeof(struct link_statistics) / 4;
3086 mc.mb[9] = cpu_to_le16(vha->vp_idx);
3087 mc.mb[10] = cpu_to_le16(options);
3089 rval = qla24xx_send_mb_cmd(vha, &mc);
3091 if (rval == QLA_SUCCESS) {
3092 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3093 ql_dbg(ql_dbg_mbx, vha, 0x1089,
3094 "Failed mb[0]=%x.\n", mcp->mb[0]);
3095 rval = QLA_FUNCTION_FAILED;
3097 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
3098 "Done %s.\n", __func__);
3099 /* Re-endianize - firmware data is le32. */
3100 dwords = sizeof(struct link_statistics) / 4;
3101 iter = &stats->link_fail_cnt;
3102 for ( ; dwords--; iter++)
3107 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
3114 qla24xx_abort_command(srb_t *sp)
3117 unsigned long flags = 0;
3119 struct abort_entry_24xx *abt;
3122 fc_port_t *fcport = sp->fcport;
3123 struct scsi_qla_host *vha = fcport->vha;
3124 struct qla_hw_data *ha = vha->hw;
3125 struct req_que *req = vha->req;
3126 struct qla_qpair *qpair = sp->qpair;
3128 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
3129 "Entered %s.\n", __func__);
3131 if (vha->flags.qpairs_available && sp->qpair)
3132 req = sp->qpair->req;
3134 return QLA_FUNCTION_FAILED;
3136 if (ql2xasynctmfenable)
3137 return qla24xx_async_abort_command(sp);
3139 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
3140 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
3141 if (req->outstanding_cmds[handle] == sp)
3144 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
3145 if (handle == req->num_outstanding_cmds) {
3146 /* Command not found. */
3147 return QLA_FUNCTION_FAILED;
3150 abt = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
3152 ql_log(ql_log_warn, vha, 0x108d,
3153 "Failed to allocate abort IOCB.\n");
3154 return QLA_MEMORY_ALLOC_FAILED;
3157 abt->entry_type = ABORT_IOCB_TYPE;
3158 abt->entry_count = 1;
3159 abt->handle = MAKE_HANDLE(req->id, abt->handle);
3160 abt->nport_handle = cpu_to_le16(fcport->loop_id);
3161 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
3162 abt->port_id[0] = fcport->d_id.b.al_pa;
3163 abt->port_id[1] = fcport->d_id.b.area;
3164 abt->port_id[2] = fcport->d_id.b.domain;
3165 abt->vp_index = fcport->vha->vp_idx;
3167 abt->req_que_no = cpu_to_le16(req->id);
3169 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
3170 if (rval != QLA_SUCCESS) {
3171 ql_dbg(ql_dbg_mbx, vha, 0x108e,
3172 "Failed to issue IOCB (%x).\n", rval);
3173 } else if (abt->entry_status != 0) {
3174 ql_dbg(ql_dbg_mbx, vha, 0x108f,
3175 "Failed to complete IOCB -- error status (%x).\n",
3177 rval = QLA_FUNCTION_FAILED;
3178 } else if (abt->nport_handle != cpu_to_le16(0)) {
3179 ql_dbg(ql_dbg_mbx, vha, 0x1090,
3180 "Failed to complete IOCB -- completion status (%x).\n",
3181 le16_to_cpu(abt->nport_handle));
3182 if (abt->nport_handle == CS_IOCB_ERROR)
3183 rval = QLA_FUNCTION_PARAMETER_ERROR;
3185 rval = QLA_FUNCTION_FAILED;
3187 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
3188 "Done %s.\n", __func__);
3191 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
3196 struct tsk_mgmt_cmd {
3198 struct tsk_mgmt_entry tsk;
3199 struct sts_entry_24xx sts;
3204 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
3205 uint64_t l, int tag)
3208 struct tsk_mgmt_cmd *tsk;
3209 struct sts_entry_24xx *sts;
3211 scsi_qla_host_t *vha;
3212 struct qla_hw_data *ha;
3213 struct req_que *req;
3214 struct qla_qpair *qpair;
3220 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
3221 "Entered %s.\n", __func__);
3223 if (vha->vp_idx && vha->qpair) {
3229 tsk = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
3231 ql_log(ql_log_warn, vha, 0x1093,
3232 "Failed to allocate task management IOCB.\n");
3233 return QLA_MEMORY_ALLOC_FAILED;
3236 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
3237 tsk->p.tsk.entry_count = 1;
3238 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
3239 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
3240 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
3241 tsk->p.tsk.control_flags = cpu_to_le32(type);
3242 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
3243 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
3244 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
3245 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
3246 if (type == TCF_LUN_RESET) {
3247 int_to_scsilun(l, &tsk->p.tsk.lun);
3248 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
3249 sizeof(tsk->p.tsk.lun));
3253 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
3254 if (rval != QLA_SUCCESS) {
3255 ql_dbg(ql_dbg_mbx, vha, 0x1094,
3256 "Failed to issue %s reset IOCB (%x).\n", name, rval);
3257 } else if (sts->entry_status != 0) {
3258 ql_dbg(ql_dbg_mbx, vha, 0x1095,
3259 "Failed to complete IOCB -- error status (%x).\n",
3261 rval = QLA_FUNCTION_FAILED;
3262 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
3263 ql_dbg(ql_dbg_mbx, vha, 0x1096,
3264 "Failed to complete IOCB -- completion status (%x).\n",
3265 le16_to_cpu(sts->comp_status));
3266 rval = QLA_FUNCTION_FAILED;
3267 } else if (le16_to_cpu(sts->scsi_status) &
3268 SS_RESPONSE_INFO_LEN_VALID) {
3269 if (le32_to_cpu(sts->rsp_data_len) < 4) {
3270 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
3271 "Ignoring inconsistent data length -- not enough "
3272 "response info (%d).\n",
3273 le32_to_cpu(sts->rsp_data_len));
3274 } else if (sts->data[3]) {
3275 ql_dbg(ql_dbg_mbx, vha, 0x1098,
3276 "Failed to complete IOCB -- response (%x).\n",
3278 rval = QLA_FUNCTION_FAILED;
3282 /* Issue marker IOCB. */
3283 rval2 = qla2x00_marker(vha, ha->base_qpair, fcport->loop_id, l,
3284 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
3285 if (rval2 != QLA_SUCCESS) {
3286 ql_dbg(ql_dbg_mbx, vha, 0x1099,
3287 "Failed to issue marker IOCB (%x).\n", rval2);
3289 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
3290 "Done %s.\n", __func__);
3293 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
3299 qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
3301 struct qla_hw_data *ha = fcport->vha->hw;
3303 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3304 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
3306 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
3310 qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
3312 struct qla_hw_data *ha = fcport->vha->hw;
3314 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3315 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
3317 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
3321 qla2x00_system_error(scsi_qla_host_t *vha)
3325 mbx_cmd_t *mcp = &mc;
3326 struct qla_hw_data *ha = vha->hw;
3328 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
3329 return QLA_FUNCTION_FAILED;
3331 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
3332 "Entered %s.\n", __func__);
3334 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
3335 mcp->out_mb = MBX_0;
3339 rval = qla2x00_mailbox_command(vha, mcp);
3341 if (rval != QLA_SUCCESS) {
3342 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
3344 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
3345 "Done %s.\n", __func__);
3352 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
3356 mbx_cmd_t *mcp = &mc;
3358 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3359 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
3360 return QLA_FUNCTION_FAILED;
3362 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
3363 "Entered %s.\n", __func__);
3365 mcp->mb[0] = MBC_WRITE_SERDES;
3367 if (IS_QLA2031(vha->hw))
3368 mcp->mb[2] = data & 0xff;
3373 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
3375 mcp->tov = MBX_TOV_SECONDS;
3377 rval = qla2x00_mailbox_command(vha, mcp);
3379 if (rval != QLA_SUCCESS) {
3380 ql_dbg(ql_dbg_mbx, vha, 0x1183,
3381 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3383 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
3384 "Done %s.\n", __func__);
3391 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
3395 mbx_cmd_t *mcp = &mc;
3397 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3398 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
3399 return QLA_FUNCTION_FAILED;
3401 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
3402 "Entered %s.\n", __func__);
3404 mcp->mb[0] = MBC_READ_SERDES;
3407 mcp->out_mb = MBX_3|MBX_1|MBX_0;
3408 mcp->in_mb = MBX_1|MBX_0;
3409 mcp->tov = MBX_TOV_SECONDS;
3411 rval = qla2x00_mailbox_command(vha, mcp);
3413 if (IS_QLA2031(vha->hw))
3414 *data = mcp->mb[1] & 0xff;
3418 if (rval != QLA_SUCCESS) {
3419 ql_dbg(ql_dbg_mbx, vha, 0x1186,
3420 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3422 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
3423 "Done %s.\n", __func__);
3430 qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
3434 mbx_cmd_t *mcp = &mc;
3436 if (!IS_QLA8044(vha->hw))
3437 return QLA_FUNCTION_FAILED;
3439 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x11a0,
3440 "Entered %s.\n", __func__);
3442 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3443 mcp->mb[1] = HCS_WRITE_SERDES;
3444 mcp->mb[3] = LSW(addr);
3445 mcp->mb[4] = MSW(addr);
3446 mcp->mb[5] = LSW(data);
3447 mcp->mb[6] = MSW(data);
3448 mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
3450 mcp->tov = MBX_TOV_SECONDS;
3452 rval = qla2x00_mailbox_command(vha, mcp);
3454 if (rval != QLA_SUCCESS) {
3455 ql_dbg(ql_dbg_mbx, vha, 0x11a1,
3456 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3458 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
3459 "Done %s.\n", __func__);
3466 qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
3470 mbx_cmd_t *mcp = &mc;
3472 if (!IS_QLA8044(vha->hw))
3473 return QLA_FUNCTION_FAILED;
3475 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
3476 "Entered %s.\n", __func__);
3478 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3479 mcp->mb[1] = HCS_READ_SERDES;
3480 mcp->mb[3] = LSW(addr);
3481 mcp->mb[4] = MSW(addr);
3482 mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
3483 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3484 mcp->tov = MBX_TOV_SECONDS;
3486 rval = qla2x00_mailbox_command(vha, mcp);
3488 *data = mcp->mb[2] << 16 | mcp->mb[1];
3490 if (rval != QLA_SUCCESS) {
3491 ql_dbg(ql_dbg_mbx, vha, 0x118a,
3492 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3494 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
3495 "Done %s.\n", __func__);
3502 * qla2x00_set_serdes_params() -
3504 * @sw_em_1g: serial link options
3505 * @sw_em_2g: serial link options
3506 * @sw_em_4g: serial link options
3511 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3512 uint16_t sw_em_2g, uint16_t sw_em_4g)
3516 mbx_cmd_t *mcp = &mc;
3518 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
3519 "Entered %s.\n", __func__);
3521 mcp->mb[0] = MBC_SERDES_PARAMS;
3523 mcp->mb[2] = sw_em_1g | BIT_15;
3524 mcp->mb[3] = sw_em_2g | BIT_15;
3525 mcp->mb[4] = sw_em_4g | BIT_15;
3526 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3528 mcp->tov = MBX_TOV_SECONDS;
3530 rval = qla2x00_mailbox_command(vha, mcp);
3532 if (rval != QLA_SUCCESS) {
3534 ql_dbg(ql_dbg_mbx, vha, 0x109f,
3535 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3538 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
3539 "Done %s.\n", __func__);
3546 qla2x00_stop_firmware(scsi_qla_host_t *vha)
3550 mbx_cmd_t *mcp = &mc;
3552 if (!IS_FWI2_CAPABLE(vha->hw))
3553 return QLA_FUNCTION_FAILED;
3555 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
3556 "Entered %s.\n", __func__);
3558 mcp->mb[0] = MBC_STOP_FIRMWARE;
3560 mcp->out_mb = MBX_1|MBX_0;
3564 rval = qla2x00_mailbox_command(vha, mcp);
3566 if (rval != QLA_SUCCESS) {
3567 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3568 if (mcp->mb[0] == MBS_INVALID_COMMAND)
3569 rval = QLA_INVALID_COMMAND;
3571 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
3572 "Done %s.\n", __func__);
3579 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3584 mbx_cmd_t *mcp = &mc;
3586 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
3587 "Entered %s.\n", __func__);
3589 if (!IS_FWI2_CAPABLE(vha->hw))
3590 return QLA_FUNCTION_FAILED;
3592 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3593 return QLA_FUNCTION_FAILED;
3595 mcp->mb[0] = MBC_TRACE_CONTROL;
3596 mcp->mb[1] = TC_EFT_ENABLE;
3597 mcp->mb[2] = LSW(eft_dma);
3598 mcp->mb[3] = MSW(eft_dma);
3599 mcp->mb[4] = LSW(MSD(eft_dma));
3600 mcp->mb[5] = MSW(MSD(eft_dma));
3601 mcp->mb[6] = buffers;
3602 mcp->mb[7] = TC_AEN_DISABLE;
3603 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3604 mcp->in_mb = MBX_1|MBX_0;
3605 mcp->tov = MBX_TOV_SECONDS;
3607 rval = qla2x00_mailbox_command(vha, mcp);
3608 if (rval != QLA_SUCCESS) {
3609 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
3610 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3611 rval, mcp->mb[0], mcp->mb[1]);
3613 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
3614 "Done %s.\n", __func__);
3621 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3625 mbx_cmd_t *mcp = &mc;
3627 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
3628 "Entered %s.\n", __func__);
3630 if (!IS_FWI2_CAPABLE(vha->hw))
3631 return QLA_FUNCTION_FAILED;
3633 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3634 return QLA_FUNCTION_FAILED;
3636 mcp->mb[0] = MBC_TRACE_CONTROL;
3637 mcp->mb[1] = TC_EFT_DISABLE;
3638 mcp->out_mb = MBX_1|MBX_0;
3639 mcp->in_mb = MBX_1|MBX_0;
3640 mcp->tov = MBX_TOV_SECONDS;
3642 rval = qla2x00_mailbox_command(vha, mcp);
3643 if (rval != QLA_SUCCESS) {
3644 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3645 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3646 rval, mcp->mb[0], mcp->mb[1]);
3648 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3649 "Done %s.\n", __func__);
3656 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3657 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3661 mbx_cmd_t *mcp = &mc;
3663 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3664 "Entered %s.\n", __func__);
3666 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3667 !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw) &&
3668 !IS_QLA28XX(vha->hw))
3669 return QLA_FUNCTION_FAILED;
3671 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3672 return QLA_FUNCTION_FAILED;
3674 mcp->mb[0] = MBC_TRACE_CONTROL;
3675 mcp->mb[1] = TC_FCE_ENABLE;
3676 mcp->mb[2] = LSW(fce_dma);
3677 mcp->mb[3] = MSW(fce_dma);
3678 mcp->mb[4] = LSW(MSD(fce_dma));
3679 mcp->mb[5] = MSW(MSD(fce_dma));
3680 mcp->mb[6] = buffers;
3681 mcp->mb[7] = TC_AEN_DISABLE;
3683 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3684 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3685 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3687 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3688 mcp->tov = MBX_TOV_SECONDS;
3690 rval = qla2x00_mailbox_command(vha, mcp);
3691 if (rval != QLA_SUCCESS) {
3692 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3693 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3694 rval, mcp->mb[0], mcp->mb[1]);
3696 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3697 "Done %s.\n", __func__);
3700 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3709 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3713 mbx_cmd_t *mcp = &mc;
3715 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3716 "Entered %s.\n", __func__);
3718 if (!IS_FWI2_CAPABLE(vha->hw))
3719 return QLA_FUNCTION_FAILED;
3721 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3722 return QLA_FUNCTION_FAILED;
3724 mcp->mb[0] = MBC_TRACE_CONTROL;
3725 mcp->mb[1] = TC_FCE_DISABLE;
3726 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3727 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3728 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3730 mcp->tov = MBX_TOV_SECONDS;
3732 rval = qla2x00_mailbox_command(vha, mcp);
3733 if (rval != QLA_SUCCESS) {
3734 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3735 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3736 rval, mcp->mb[0], mcp->mb[1]);
3738 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3739 "Done %s.\n", __func__);
3742 *wr = (uint64_t) mcp->mb[5] << 48 |
3743 (uint64_t) mcp->mb[4] << 32 |
3744 (uint64_t) mcp->mb[3] << 16 |
3745 (uint64_t) mcp->mb[2];
3747 *rd = (uint64_t) mcp->mb[9] << 48 |
3748 (uint64_t) mcp->mb[8] << 32 |
3749 (uint64_t) mcp->mb[7] << 16 |
3750 (uint64_t) mcp->mb[6];
3757 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3758 uint16_t *port_speed, uint16_t *mb)
3762 mbx_cmd_t *mcp = &mc;
3764 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3765 "Entered %s.\n", __func__);
3767 if (!IS_IIDMA_CAPABLE(vha->hw))
3768 return QLA_FUNCTION_FAILED;
3770 mcp->mb[0] = MBC_PORT_PARAMS;
3771 mcp->mb[1] = loop_id;
3772 mcp->mb[2] = mcp->mb[3] = 0;
3773 mcp->mb[9] = vha->vp_idx;
3774 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3775 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3776 mcp->tov = MBX_TOV_SECONDS;
3778 rval = qla2x00_mailbox_command(vha, mcp);
3780 /* Return mailbox statuses. */
3787 if (rval != QLA_SUCCESS) {
3788 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3790 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3791 "Done %s.\n", __func__);
3793 *port_speed = mcp->mb[3];
3800 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3801 uint16_t port_speed, uint16_t *mb)
3805 mbx_cmd_t *mcp = &mc;
3807 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3808 "Entered %s.\n", __func__);
3810 if (!IS_IIDMA_CAPABLE(vha->hw))
3811 return QLA_FUNCTION_FAILED;
3813 mcp->mb[0] = MBC_PORT_PARAMS;
3814 mcp->mb[1] = loop_id;
3816 mcp->mb[3] = port_speed & 0x3F;
3817 mcp->mb[9] = vha->vp_idx;
3818 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3819 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3820 mcp->tov = MBX_TOV_SECONDS;
3822 rval = qla2x00_mailbox_command(vha, mcp);
3824 /* Return mailbox statuses. */
3831 if (rval != QLA_SUCCESS) {
3832 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3833 "Failed=%x.\n", rval);
3835 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3836 "Done %s.\n", __func__);
3843 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3844 struct vp_rpt_id_entry_24xx *rptid_entry)
3846 struct qla_hw_data *ha = vha->hw;
3847 scsi_qla_host_t *vp = NULL;
3848 unsigned long flags;
3851 struct fc_port *fcport;
3853 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3854 "Entered %s.\n", __func__);
3856 if (rptid_entry->entry_status != 0)
3859 id.b.domain = rptid_entry->port_id[2];
3860 id.b.area = rptid_entry->port_id[1];
3861 id.b.al_pa = rptid_entry->port_id[0];
3863 ha->flags.n2n_ae = 0;
3865 if (rptid_entry->format == 0) {
3867 ql_dbg(ql_dbg_async, vha, 0x10b7,
3868 "Format 0 : Number of VPs setup %d, number of "
3869 "VPs acquired %d.\n", rptid_entry->vp_setup,
3870 rptid_entry->vp_acquired);
3871 ql_dbg(ql_dbg_async, vha, 0x10b8,
3872 "Primary port id %02x%02x%02x.\n",
3873 rptid_entry->port_id[2], rptid_entry->port_id[1],
3874 rptid_entry->port_id[0]);
3875 ha->current_topology = ISP_CFG_NL;
3876 qlt_update_host_map(vha, id);
3878 } else if (rptid_entry->format == 1) {
3880 ql_dbg(ql_dbg_async, vha, 0x10b9,
3881 "Format 1: VP[%d] enabled - status %d - with "
3882 "port id %02x%02x%02x.\n", rptid_entry->vp_idx,
3883 rptid_entry->vp_status,
3884 rptid_entry->port_id[2], rptid_entry->port_id[1],
3885 rptid_entry->port_id[0]);
3886 ql_dbg(ql_dbg_async, vha, 0x5075,
3887 "Format 1: Remote WWPN %8phC.\n",
3888 rptid_entry->u.f1.port_name);
3890 ql_dbg(ql_dbg_async, vha, 0x5075,
3891 "Format 1: WWPN %8phC.\n",
3894 switch (rptid_entry->u.f1.flags & TOPO_MASK) {
3896 ha->current_topology = ISP_CFG_N;
3897 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
3898 fcport = qla2x00_find_fcport_by_wwpn(vha,
3899 rptid_entry->u.f1.port_name, 1);
3900 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
3903 fcport->plogi_nack_done_deadline = jiffies + HZ;
3904 fcport->dm_login_expire = jiffies + 3*HZ;
3905 fcport->scan_state = QLA_FCPORT_FOUND;
3906 switch (fcport->disc_state) {
3908 set_bit(RELOGIN_NEEDED,
3911 case DSC_DELETE_PEND:
3914 qlt_schedule_sess_for_deletion(fcport);
3919 if (wwn_to_u64(vha->port_name) >
3920 wwn_to_u64(rptid_entry->u.f1.port_name)) {
3922 vha->d_id.b.al_pa = 1;
3923 ha->flags.n2n_bigger = 1;
3926 ql_dbg(ql_dbg_async, vha, 0x5075,
3927 "Format 1: assign local id %x remote id %x\n",
3928 vha->d_id.b24, id.b24);
3930 ql_dbg(ql_dbg_async, vha, 0x5075,
3931 "Format 1: Remote login - Waiting for WWPN %8phC.\n",
3932 rptid_entry->u.f1.port_name);
3933 ha->flags.n2n_bigger = 0;
3935 qla24xx_post_newsess_work(vha, &id,
3936 rptid_entry->u.f1.port_name,
3937 rptid_entry->u.f1.node_name,
3942 /* if our portname is higher then initiate N2N login */
3944 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags);
3945 ha->flags.n2n_ae = 1;
3949 ha->current_topology = ISP_CFG_FL;
3952 ha->current_topology = ISP_CFG_F;
3958 ha->flags.gpsc_supported = 1;
3959 ha->current_topology = ISP_CFG_F;
3960 /* buffer to buffer credit flag */
3961 vha->flags.bbcr_enable = (rptid_entry->u.f1.bbcr & 0xf) != 0;
3963 if (rptid_entry->vp_idx == 0) {
3964 if (rptid_entry->vp_status == VP_STAT_COMPL) {
3965 /* FA-WWN is only for physical port */
3966 if (qla_ini_mode_enabled(vha) &&
3967 ha->flags.fawwpn_enabled &&
3968 (rptid_entry->u.f1.flags &
3970 memcpy(vha->port_name,
3971 rptid_entry->u.f1.port_name,
3975 qlt_update_host_map(vha, id);
3978 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
3979 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
3981 if (rptid_entry->vp_status != VP_STAT_COMPL &&
3982 rptid_entry->vp_status != VP_STAT_ID_CHG) {
3983 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3984 "Could not acquire ID for VP[%d].\n",
3985 rptid_entry->vp_idx);
3990 spin_lock_irqsave(&ha->vport_slock, flags);
3991 list_for_each_entry(vp, &ha->vp_list, list) {
3992 if (rptid_entry->vp_idx == vp->vp_idx) {
3997 spin_unlock_irqrestore(&ha->vport_slock, flags);
4002 qlt_update_host_map(vp, id);
4005 * Cannot configure here as we are still sitting on the
4006 * response queue. Handle it in dpc context.
4008 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
4009 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
4010 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
4012 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
4013 qla2xxx_wake_dpc(vha);
4014 } else if (rptid_entry->format == 2) {
4015 ql_dbg(ql_dbg_async, vha, 0x505f,
4016 "RIDA: format 2/N2N Primary port id %02x%02x%02x.\n",
4017 rptid_entry->port_id[2], rptid_entry->port_id[1],
4018 rptid_entry->port_id[0]);
4020 ql_dbg(ql_dbg_async, vha, 0x5075,
4021 "N2N: Remote WWPN %8phC.\n",
4022 rptid_entry->u.f2.port_name);
4024 /* N2N. direct connect */
4025 ha->current_topology = ISP_CFG_N;
4026 ha->flags.rida_fmt2 = 1;
4027 vha->d_id.b.domain = rptid_entry->port_id[2];
4028 vha->d_id.b.area = rptid_entry->port_id[1];
4029 vha->d_id.b.al_pa = rptid_entry->port_id[0];
4031 ha->flags.n2n_ae = 1;
4032 spin_lock_irqsave(&ha->vport_slock, flags);
4033 qlt_update_vp_map(vha, SET_AL_PA);
4034 spin_unlock_irqrestore(&ha->vport_slock, flags);
4036 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4037 fcport->scan_state = QLA_FCPORT_SCAN;
4040 fcport = qla2x00_find_fcport_by_wwpn(vha,
4041 rptid_entry->u.f2.port_name, 1);
4044 fcport->login_retry = vha->hw->login_retry_count;
4045 fcport->plogi_nack_done_deadline = jiffies + HZ;
4046 fcport->scan_state = QLA_FCPORT_FOUND;
4052 * qla24xx_modify_vp_config
4053 * Change VP configuration for vha
4056 * vha = adapter block pointer.
4059 * qla2xxx local function return status code.
4065 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
4068 struct vp_config_entry_24xx *vpmod;
4069 dma_addr_t vpmod_dma;
4070 struct qla_hw_data *ha = vha->hw;
4071 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4073 /* This can be called by the parent */
4075 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
4076 "Entered %s.\n", __func__);
4078 vpmod = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
4080 ql_log(ql_log_warn, vha, 0x10bc,
4081 "Failed to allocate modify VP IOCB.\n");
4082 return QLA_MEMORY_ALLOC_FAILED;
4085 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
4086 vpmod->entry_count = 1;
4087 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
4088 vpmod->vp_count = 1;
4089 vpmod->vp_index1 = vha->vp_idx;
4090 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
4092 qlt_modify_vp_config(vha, vpmod);
4094 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
4095 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
4096 vpmod->entry_count = 1;
4098 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
4099 if (rval != QLA_SUCCESS) {
4100 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
4101 "Failed to issue VP config IOCB (%x).\n", rval);
4102 } else if (vpmod->comp_status != 0) {
4103 ql_dbg(ql_dbg_mbx, vha, 0x10be,
4104 "Failed to complete IOCB -- error status (%x).\n",
4105 vpmod->comp_status);
4106 rval = QLA_FUNCTION_FAILED;
4107 } else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) {
4108 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
4109 "Failed to complete IOCB -- completion status (%x).\n",
4110 le16_to_cpu(vpmod->comp_status));
4111 rval = QLA_FUNCTION_FAILED;
4114 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
4115 "Done %s.\n", __func__);
4116 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
4118 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
4124 * qla2x00_send_change_request
4125 * Receive or disable RSCN request from fabric controller
4128 * ha = adapter block pointer
4129 * format = registration format:
4131 * 1 - Fabric detected registration
4132 * 2 - N_port detected registration
4133 * 3 - Full registration
4134 * FF - clear registration
4135 * vp_idx = Virtual port index
4138 * qla2x00 local function return status code.
4145 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
4150 mbx_cmd_t *mcp = &mc;
4152 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
4153 "Entered %s.\n", __func__);
4155 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
4156 mcp->mb[1] = format;
4157 mcp->mb[9] = vp_idx;
4158 mcp->out_mb = MBX_9|MBX_1|MBX_0;
4159 mcp->in_mb = MBX_0|MBX_1;
4160 mcp->tov = MBX_TOV_SECONDS;
4162 rval = qla2x00_mailbox_command(vha, mcp);
4164 if (rval == QLA_SUCCESS) {
4165 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
4175 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
4180 mbx_cmd_t *mcp = &mc;
4182 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
4183 "Entered %s.\n", __func__);
4185 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
4186 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
4187 mcp->mb[8] = MSW(addr);
4188 mcp->out_mb = MBX_8|MBX_0;
4190 mcp->mb[0] = MBC_DUMP_RISC_RAM;
4191 mcp->out_mb = MBX_0;
4193 mcp->mb[1] = LSW(addr);
4194 mcp->mb[2] = MSW(req_dma);
4195 mcp->mb[3] = LSW(req_dma);
4196 mcp->mb[6] = MSW(MSD(req_dma));
4197 mcp->mb[7] = LSW(MSD(req_dma));
4198 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
4199 if (IS_FWI2_CAPABLE(vha->hw)) {
4200 mcp->mb[4] = MSW(size);
4201 mcp->mb[5] = LSW(size);
4202 mcp->out_mb |= MBX_5|MBX_4;
4204 mcp->mb[4] = LSW(size);
4205 mcp->out_mb |= MBX_4;
4209 mcp->tov = MBX_TOV_SECONDS;
4211 rval = qla2x00_mailbox_command(vha, mcp);
4213 if (rval != QLA_SUCCESS) {
4214 ql_dbg(ql_dbg_mbx, vha, 0x1008,
4215 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4217 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
4218 "Done %s.\n", __func__);
4223 /* 84XX Support **************************************************************/
4225 struct cs84xx_mgmt_cmd {
4227 struct verify_chip_entry_84xx req;
4228 struct verify_chip_rsp_84xx rsp;
4233 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
4236 struct cs84xx_mgmt_cmd *mn;
4239 unsigned long flags;
4240 struct qla_hw_data *ha = vha->hw;
4242 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
4243 "Entered %s.\n", __func__);
4245 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
4247 return QLA_MEMORY_ALLOC_FAILED;
4251 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
4252 /* Diagnostic firmware? */
4253 /* options |= MENLO_DIAG_FW; */
4254 /* We update the firmware with only one data sequence. */
4255 options |= VCO_END_OF_DATA;
4259 memset(mn, 0, sizeof(*mn));
4260 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
4261 mn->p.req.entry_count = 1;
4262 mn->p.req.options = cpu_to_le16(options);
4264 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
4265 "Dump of Verify Request.\n");
4266 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
4269 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
4270 if (rval != QLA_SUCCESS) {
4271 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
4272 "Failed to issue verify IOCB (%x).\n", rval);
4276 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
4277 "Dump of Verify Response.\n");
4278 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
4281 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
4282 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
4283 le16_to_cpu(mn->p.rsp.failure_code) : 0;
4284 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
4285 "cs=%x fc=%x.\n", status[0], status[1]);
4287 if (status[0] != CS_COMPLETE) {
4288 rval = QLA_FUNCTION_FAILED;
4289 if (!(options & VCO_DONT_UPDATE_FW)) {
4290 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
4291 "Firmware update failed. Retrying "
4292 "without update firmware.\n");
4293 options |= VCO_DONT_UPDATE_FW;
4294 options &= ~VCO_FORCE_UPDATE;
4298 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
4299 "Firmware updated to %x.\n",
4300 le32_to_cpu(mn->p.rsp.fw_ver));
4302 /* NOTE: we only update OP firmware. */
4303 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
4304 ha->cs84xx->op_fw_version =
4305 le32_to_cpu(mn->p.rsp.fw_ver);
4306 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
4312 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
4314 if (rval != QLA_SUCCESS) {
4315 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
4316 "Failed=%x.\n", rval);
4318 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
4319 "Done %s.\n", __func__);
4326 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
4329 unsigned long flags;
4331 mbx_cmd_t *mcp = &mc;
4332 struct qla_hw_data *ha = vha->hw;
4334 if (!ha->flags.fw_started)
4337 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
4338 "Entered %s.\n", __func__);
4340 if (IS_SHADOW_REG_CAPABLE(ha))
4341 req->options |= BIT_13;
4343 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4344 mcp->mb[1] = req->options;
4345 mcp->mb[2] = MSW(LSD(req->dma));
4346 mcp->mb[3] = LSW(LSD(req->dma));
4347 mcp->mb[6] = MSW(MSD(req->dma));
4348 mcp->mb[7] = LSW(MSD(req->dma));
4349 mcp->mb[5] = req->length;
4351 mcp->mb[10] = req->rsp->id;
4352 mcp->mb[12] = req->qos;
4353 mcp->mb[11] = req->vp_idx;
4354 mcp->mb[13] = req->rid;
4355 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
4358 mcp->mb[4] = req->id;
4359 /* que in ptr index */
4361 /* que out ptr index */
4362 mcp->mb[9] = *req->out_ptr = 0;
4363 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
4364 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4366 mcp->flags = MBX_DMA_OUT;
4367 mcp->tov = MBX_TOV_SECONDS * 2;
4369 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4371 mcp->in_mb |= MBX_1;
4372 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4373 mcp->out_mb |= MBX_15;
4374 /* debug q create issue in SR-IOV */
4375 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4378 spin_lock_irqsave(&ha->hardware_lock, flags);
4379 if (!(req->options & BIT_0)) {
4380 WRT_REG_DWORD(req->req_q_in, 0);
4381 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4382 WRT_REG_DWORD(req->req_q_out, 0);
4384 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4386 rval = qla2x00_mailbox_command(vha, mcp);
4387 if (rval != QLA_SUCCESS) {
4388 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
4389 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4391 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
4392 "Done %s.\n", __func__);
4399 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
4402 unsigned long flags;
4404 mbx_cmd_t *mcp = &mc;
4405 struct qla_hw_data *ha = vha->hw;
4407 if (!ha->flags.fw_started)
4410 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
4411 "Entered %s.\n", __func__);
4413 if (IS_SHADOW_REG_CAPABLE(ha))
4414 rsp->options |= BIT_13;
4416 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4417 mcp->mb[1] = rsp->options;
4418 mcp->mb[2] = MSW(LSD(rsp->dma));
4419 mcp->mb[3] = LSW(LSD(rsp->dma));
4420 mcp->mb[6] = MSW(MSD(rsp->dma));
4421 mcp->mb[7] = LSW(MSD(rsp->dma));
4422 mcp->mb[5] = rsp->length;
4423 mcp->mb[14] = rsp->msix->entry;
4424 mcp->mb[13] = rsp->rid;
4425 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
4428 mcp->mb[4] = rsp->id;
4429 /* que in ptr index */
4430 mcp->mb[8] = *rsp->in_ptr = 0;
4431 /* que out ptr index */
4433 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
4434 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4436 mcp->flags = MBX_DMA_OUT;
4437 mcp->tov = MBX_TOV_SECONDS * 2;
4439 if (IS_QLA81XX(ha)) {
4440 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
4441 mcp->in_mb |= MBX_1;
4442 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4443 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
4444 mcp->in_mb |= MBX_1;
4445 /* debug q create issue in SR-IOV */
4446 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4449 spin_lock_irqsave(&ha->hardware_lock, flags);
4450 if (!(rsp->options & BIT_0)) {
4451 WRT_REG_DWORD(rsp->rsp_q_out, 0);
4452 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4453 WRT_REG_DWORD(rsp->rsp_q_in, 0);
4456 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4458 rval = qla2x00_mailbox_command(vha, mcp);
4459 if (rval != QLA_SUCCESS) {
4460 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
4461 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4463 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
4464 "Done %s.\n", __func__);
4471 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
4475 mbx_cmd_t *mcp = &mc;
4477 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
4478 "Entered %s.\n", __func__);
4480 mcp->mb[0] = MBC_IDC_ACK;
4481 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4482 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4484 mcp->tov = MBX_TOV_SECONDS;
4486 rval = qla2x00_mailbox_command(vha, mcp);
4488 if (rval != QLA_SUCCESS) {
4489 ql_dbg(ql_dbg_mbx, vha, 0x10da,
4490 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4492 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
4493 "Done %s.\n", __func__);
4500 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
4504 mbx_cmd_t *mcp = &mc;
4506 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
4507 "Entered %s.\n", __func__);
4509 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4510 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
4511 return QLA_FUNCTION_FAILED;
4513 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4514 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
4515 mcp->out_mb = MBX_1|MBX_0;
4516 mcp->in_mb = MBX_1|MBX_0;
4517 mcp->tov = MBX_TOV_SECONDS;
4519 rval = qla2x00_mailbox_command(vha, mcp);
4521 if (rval != QLA_SUCCESS) {
4522 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
4523 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4524 rval, mcp->mb[0], mcp->mb[1]);
4526 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
4527 "Done %s.\n", __func__);
4528 *sector_size = mcp->mb[1];
4535 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
4539 mbx_cmd_t *mcp = &mc;
4541 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4542 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
4543 return QLA_FUNCTION_FAILED;
4545 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
4546 "Entered %s.\n", __func__);
4548 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4549 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
4550 FAC_OPT_CMD_WRITE_PROTECT;
4551 mcp->out_mb = MBX_1|MBX_0;
4552 mcp->in_mb = MBX_1|MBX_0;
4553 mcp->tov = MBX_TOV_SECONDS;
4555 rval = qla2x00_mailbox_command(vha, mcp);
4557 if (rval != QLA_SUCCESS) {
4558 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
4559 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4560 rval, mcp->mb[0], mcp->mb[1]);
4562 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
4563 "Done %s.\n", __func__);
4570 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
4574 mbx_cmd_t *mcp = &mc;
4576 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4577 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
4578 return QLA_FUNCTION_FAILED;
4580 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4581 "Entered %s.\n", __func__);
4583 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4584 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
4585 mcp->mb[2] = LSW(start);
4586 mcp->mb[3] = MSW(start);
4587 mcp->mb[4] = LSW(finish);
4588 mcp->mb[5] = MSW(finish);
4589 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4590 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4591 mcp->tov = MBX_TOV_SECONDS;
4593 rval = qla2x00_mailbox_command(vha, mcp);
4595 if (rval != QLA_SUCCESS) {
4596 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4597 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4598 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4600 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4601 "Done %s.\n", __func__);
4608 qla81xx_fac_semaphore_access(scsi_qla_host_t *vha, int lock)
4610 int rval = QLA_SUCCESS;
4612 mbx_cmd_t *mcp = &mc;
4613 struct qla_hw_data *ha = vha->hw;
4615 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
4616 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4619 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4620 "Entered %s.\n", __func__);
4622 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4623 mcp->mb[1] = (lock ? FAC_OPT_CMD_LOCK_SEMAPHORE :
4624 FAC_OPT_CMD_UNLOCK_SEMAPHORE);
4625 mcp->out_mb = MBX_1|MBX_0;
4626 mcp->in_mb = MBX_1|MBX_0;
4627 mcp->tov = MBX_TOV_SECONDS;
4629 rval = qla2x00_mailbox_command(vha, mcp);
4631 if (rval != QLA_SUCCESS) {
4632 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4633 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4634 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4636 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4637 "Done %s.\n", __func__);
4644 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
4648 mbx_cmd_t *mcp = &mc;
4650 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
4651 "Entered %s.\n", __func__);
4653 mcp->mb[0] = MBC_RESTART_MPI_FW;
4654 mcp->out_mb = MBX_0;
4655 mcp->in_mb = MBX_0|MBX_1;
4656 mcp->tov = MBX_TOV_SECONDS;
4658 rval = qla2x00_mailbox_command(vha, mcp);
4660 if (rval != QLA_SUCCESS) {
4661 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
4662 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4663 rval, mcp->mb[0], mcp->mb[1]);
4665 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
4666 "Done %s.\n", __func__);
4673 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4677 mbx_cmd_t *mcp = &mc;
4681 struct qla_hw_data *ha = vha->hw;
4683 if (!IS_P3P_TYPE(ha))
4684 return QLA_FUNCTION_FAILED;
4686 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
4687 "Entered %s.\n", __func__);
4689 str = (void *)version;
4690 len = strlen(version);
4692 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4693 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
4694 mcp->out_mb = MBX_1|MBX_0;
4695 for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4696 mcp->mb[i] = cpu_to_le16p(str);
4697 mcp->out_mb |= 1<<i;
4699 for (; i < 16; i++) {
4701 mcp->out_mb |= 1<<i;
4703 mcp->in_mb = MBX_1|MBX_0;
4704 mcp->tov = MBX_TOV_SECONDS;
4706 rval = qla2x00_mailbox_command(vha, mcp);
4708 if (rval != QLA_SUCCESS) {
4709 ql_dbg(ql_dbg_mbx, vha, 0x117c,
4710 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4712 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
4713 "Done %s.\n", __func__);
4720 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4724 mbx_cmd_t *mcp = &mc;
4729 struct qla_hw_data *ha = vha->hw;
4731 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
4733 return QLA_FUNCTION_FAILED;
4735 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4736 "Entered %s.\n", __func__);
4738 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4740 ql_log(ql_log_warn, vha, 0x117f,
4741 "Failed to allocate driver version param.\n");
4742 return QLA_MEMORY_ALLOC_FAILED;
4745 memcpy(str, "\x7\x3\x11\x0", 4);
4747 len = dwlen * 4 - 4;
4748 memset(str + 4, 0, len);
4749 if (len > strlen(version))
4750 len = strlen(version);
4751 memcpy(str + 4, version, len);
4753 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4754 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4755 mcp->mb[2] = MSW(LSD(str_dma));
4756 mcp->mb[3] = LSW(LSD(str_dma));
4757 mcp->mb[6] = MSW(MSD(str_dma));
4758 mcp->mb[7] = LSW(MSD(str_dma));
4759 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4760 mcp->in_mb = MBX_1|MBX_0;
4761 mcp->tov = MBX_TOV_SECONDS;
4763 rval = qla2x00_mailbox_command(vha, mcp);
4765 if (rval != QLA_SUCCESS) {
4766 ql_dbg(ql_dbg_mbx, vha, 0x1180,
4767 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4769 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4770 "Done %s.\n", __func__);
4773 dma_pool_free(ha->s_dma_pool, str, str_dma);
4779 qla24xx_get_port_login_templ(scsi_qla_host_t *vha, dma_addr_t buf_dma,
4780 void *buf, uint16_t bufsiz)
4784 mbx_cmd_t *mcp = &mc;
4787 if (!IS_FWI2_CAPABLE(vha->hw))
4788 return QLA_FUNCTION_FAILED;
4790 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4791 "Entered %s.\n", __func__);
4793 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4794 mcp->mb[1] = RNID_TYPE_PORT_LOGIN << 8;
4795 mcp->mb[2] = MSW(buf_dma);
4796 mcp->mb[3] = LSW(buf_dma);
4797 mcp->mb[6] = MSW(MSD(buf_dma));
4798 mcp->mb[7] = LSW(MSD(buf_dma));
4799 mcp->mb[8] = bufsiz/4;
4800 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4801 mcp->in_mb = MBX_1|MBX_0;
4802 mcp->tov = MBX_TOV_SECONDS;
4804 rval = qla2x00_mailbox_command(vha, mcp);
4806 if (rval != QLA_SUCCESS) {
4807 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4808 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4810 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4811 "Done %s.\n", __func__);
4812 bp = (uint32_t *) buf;
4813 for (i = 0; i < (bufsiz-4)/4; i++, bp++)
4814 *bp = le32_to_cpu(*bp);
4821 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
4825 mbx_cmd_t *mcp = &mc;
4827 if (!IS_FWI2_CAPABLE(vha->hw))
4828 return QLA_FUNCTION_FAILED;
4830 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4831 "Entered %s.\n", __func__);
4833 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4834 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
4835 mcp->out_mb = MBX_1|MBX_0;
4836 mcp->in_mb = MBX_1|MBX_0;
4837 mcp->tov = MBX_TOV_SECONDS;
4839 rval = qla2x00_mailbox_command(vha, mcp);
4842 if (rval != QLA_SUCCESS) {
4843 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4844 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4846 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4847 "Done %s.\n", __func__);
4854 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4855 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4859 mbx_cmd_t *mcp = &mc;
4860 struct qla_hw_data *ha = vha->hw;
4862 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
4863 "Entered %s.\n", __func__);
4865 if (!IS_FWI2_CAPABLE(ha))
4866 return QLA_FUNCTION_FAILED;
4871 mcp->mb[0] = MBC_READ_SFP;
4873 mcp->mb[2] = MSW(sfp_dma);
4874 mcp->mb[3] = LSW(sfp_dma);
4875 mcp->mb[6] = MSW(MSD(sfp_dma));
4876 mcp->mb[7] = LSW(MSD(sfp_dma));
4880 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4881 mcp->in_mb = MBX_1|MBX_0;
4882 mcp->tov = MBX_TOV_SECONDS;
4884 rval = qla2x00_mailbox_command(vha, mcp);
4889 if (rval != QLA_SUCCESS) {
4890 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
4891 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4892 if (mcp->mb[0] == MBS_COMMAND_ERROR && mcp->mb[1] == 0x22) {
4893 /* sfp is not there */
4894 rval = QLA_INTERFACE_ERROR;
4897 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
4898 "Done %s.\n", __func__);
4905 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4906 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4910 mbx_cmd_t *mcp = &mc;
4911 struct qla_hw_data *ha = vha->hw;
4913 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
4914 "Entered %s.\n", __func__);
4916 if (!IS_FWI2_CAPABLE(ha))
4917 return QLA_FUNCTION_FAILED;
4925 mcp->mb[0] = MBC_WRITE_SFP;
4927 mcp->mb[2] = MSW(sfp_dma);
4928 mcp->mb[3] = LSW(sfp_dma);
4929 mcp->mb[6] = MSW(MSD(sfp_dma));
4930 mcp->mb[7] = LSW(MSD(sfp_dma));
4934 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4935 mcp->in_mb = MBX_1|MBX_0;
4936 mcp->tov = MBX_TOV_SECONDS;
4938 rval = qla2x00_mailbox_command(vha, mcp);
4940 if (rval != QLA_SUCCESS) {
4941 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
4942 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4944 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
4945 "Done %s.\n", __func__);
4952 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4953 uint16_t size_in_bytes, uint16_t *actual_size)
4957 mbx_cmd_t *mcp = &mc;
4959 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4960 "Entered %s.\n", __func__);
4962 if (!IS_CNA_CAPABLE(vha->hw))
4963 return QLA_FUNCTION_FAILED;
4965 mcp->mb[0] = MBC_GET_XGMAC_STATS;
4966 mcp->mb[2] = MSW(stats_dma);
4967 mcp->mb[3] = LSW(stats_dma);
4968 mcp->mb[6] = MSW(MSD(stats_dma));
4969 mcp->mb[7] = LSW(MSD(stats_dma));
4970 mcp->mb[8] = size_in_bytes >> 2;
4971 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4972 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4973 mcp->tov = MBX_TOV_SECONDS;
4975 rval = qla2x00_mailbox_command(vha, mcp);
4977 if (rval != QLA_SUCCESS) {
4978 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4979 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4980 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4982 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4983 "Done %s.\n", __func__);
4986 *actual_size = mcp->mb[2] << 2;
4993 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4998 mbx_cmd_t *mcp = &mc;
5000 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
5001 "Entered %s.\n", __func__);
5003 if (!IS_CNA_CAPABLE(vha->hw))
5004 return QLA_FUNCTION_FAILED;
5006 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
5008 mcp->mb[2] = MSW(tlv_dma);
5009 mcp->mb[3] = LSW(tlv_dma);
5010 mcp->mb[6] = MSW(MSD(tlv_dma));
5011 mcp->mb[7] = LSW(MSD(tlv_dma));
5013 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
5014 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5015 mcp->tov = MBX_TOV_SECONDS;
5017 rval = qla2x00_mailbox_command(vha, mcp);
5019 if (rval != QLA_SUCCESS) {
5020 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
5021 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
5022 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
5024 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
5025 "Done %s.\n", __func__);
5032 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
5036 mbx_cmd_t *mcp = &mc;
5038 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
5039 "Entered %s.\n", __func__);
5041 if (!IS_FWI2_CAPABLE(vha->hw))
5042 return QLA_FUNCTION_FAILED;
5044 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
5045 mcp->mb[1] = LSW(risc_addr);
5046 mcp->mb[8] = MSW(risc_addr);
5047 mcp->out_mb = MBX_8|MBX_1|MBX_0;
5048 mcp->in_mb = MBX_3|MBX_2|MBX_0;
5051 rval = qla2x00_mailbox_command(vha, mcp);
5052 if (rval != QLA_SUCCESS) {
5053 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
5054 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5056 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
5057 "Done %s.\n", __func__);
5058 *data = mcp->mb[3] << 16 | mcp->mb[2];
5065 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
5070 mbx_cmd_t *mcp = &mc;
5072 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
5073 "Entered %s.\n", __func__);
5075 memset(mcp->mb, 0 , sizeof(mcp->mb));
5076 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
5077 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
5079 /* transfer count */
5080 mcp->mb[10] = LSW(mreq->transfer_size);
5081 mcp->mb[11] = MSW(mreq->transfer_size);
5083 /* send data address */
5084 mcp->mb[14] = LSW(mreq->send_dma);
5085 mcp->mb[15] = MSW(mreq->send_dma);
5086 mcp->mb[20] = LSW(MSD(mreq->send_dma));
5087 mcp->mb[21] = MSW(MSD(mreq->send_dma));
5089 /* receive data address */
5090 mcp->mb[16] = LSW(mreq->rcv_dma);
5091 mcp->mb[17] = MSW(mreq->rcv_dma);
5092 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
5093 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
5095 /* Iteration count */
5096 mcp->mb[18] = LSW(mreq->iteration_count);
5097 mcp->mb[19] = MSW(mreq->iteration_count);
5099 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
5100 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
5101 if (IS_CNA_CAPABLE(vha->hw))
5102 mcp->out_mb |= MBX_2;
5103 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
5105 mcp->buf_size = mreq->transfer_size;
5106 mcp->tov = MBX_TOV_SECONDS;
5107 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5109 rval = qla2x00_mailbox_command(vha, mcp);
5111 if (rval != QLA_SUCCESS) {
5112 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
5113 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
5114 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
5115 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
5117 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
5118 "Done %s.\n", __func__);
5121 /* Copy mailbox information */
5122 memcpy( mresp, mcp->mb, 64);
5127 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
5132 mbx_cmd_t *mcp = &mc;
5133 struct qla_hw_data *ha = vha->hw;
5135 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
5136 "Entered %s.\n", __func__);
5138 memset(mcp->mb, 0 , sizeof(mcp->mb));
5139 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
5140 /* BIT_6 specifies 64bit address */
5141 mcp->mb[1] = mreq->options | BIT_15 | BIT_6;
5142 if (IS_CNA_CAPABLE(ha)) {
5143 mcp->mb[2] = vha->fcoe_fcf_idx;
5145 mcp->mb[16] = LSW(mreq->rcv_dma);
5146 mcp->mb[17] = MSW(mreq->rcv_dma);
5147 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
5148 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
5150 mcp->mb[10] = LSW(mreq->transfer_size);
5152 mcp->mb[14] = LSW(mreq->send_dma);
5153 mcp->mb[15] = MSW(mreq->send_dma);
5154 mcp->mb[20] = LSW(MSD(mreq->send_dma));
5155 mcp->mb[21] = MSW(MSD(mreq->send_dma));
5157 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
5158 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
5159 if (IS_CNA_CAPABLE(ha))
5160 mcp->out_mb |= MBX_2;
5163 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
5164 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
5165 mcp->in_mb |= MBX_1;
5166 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
5167 mcp->in_mb |= MBX_3;
5169 mcp->tov = MBX_TOV_SECONDS;
5170 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5171 mcp->buf_size = mreq->transfer_size;
5173 rval = qla2x00_mailbox_command(vha, mcp);
5175 if (rval != QLA_SUCCESS) {
5176 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
5177 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5178 rval, mcp->mb[0], mcp->mb[1]);
5180 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
5181 "Done %s.\n", __func__);
5184 /* Copy mailbox information */
5185 memcpy(mresp, mcp->mb, 64);
5190 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
5194 mbx_cmd_t *mcp = &mc;
5196 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
5197 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
5199 mcp->mb[0] = MBC_ISP84XX_RESET;
5200 mcp->mb[1] = enable_diagnostic;
5201 mcp->out_mb = MBX_1|MBX_0;
5202 mcp->in_mb = MBX_1|MBX_0;
5203 mcp->tov = MBX_TOV_SECONDS;
5204 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5205 rval = qla2x00_mailbox_command(vha, mcp);
5207 if (rval != QLA_SUCCESS)
5208 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
5210 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
5211 "Done %s.\n", __func__);
5217 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
5221 mbx_cmd_t *mcp = &mc;
5223 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
5224 "Entered %s.\n", __func__);
5226 if (!IS_FWI2_CAPABLE(vha->hw))
5227 return QLA_FUNCTION_FAILED;
5229 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
5230 mcp->mb[1] = LSW(risc_addr);
5231 mcp->mb[2] = LSW(data);
5232 mcp->mb[3] = MSW(data);
5233 mcp->mb[8] = MSW(risc_addr);
5234 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
5235 mcp->in_mb = MBX_1|MBX_0;
5238 rval = qla2x00_mailbox_command(vha, mcp);
5239 if (rval != QLA_SUCCESS) {
5240 ql_dbg(ql_dbg_mbx, vha, 0x1101,
5241 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5242 rval, mcp->mb[0], mcp->mb[1]);
5244 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
5245 "Done %s.\n", __func__);
5252 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
5255 uint32_t stat, timer;
5257 struct qla_hw_data *ha = vha->hw;
5258 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
5262 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
5263 "Entered %s.\n", __func__);
5265 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
5267 /* Write the MBC data to the registers */
5268 WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER);
5269 WRT_REG_WORD(®->mailbox1, mb[0]);
5270 WRT_REG_WORD(®->mailbox2, mb[1]);
5271 WRT_REG_WORD(®->mailbox3, mb[2]);
5272 WRT_REG_WORD(®->mailbox4, mb[3]);
5274 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT);
5276 /* Poll for MBC interrupt */
5277 for (timer = 6000000; timer; timer--) {
5278 /* Check for pending interrupts. */
5279 stat = RD_REG_DWORD(®->host_status);
5280 if (stat & HSRX_RISC_INT) {
5283 if (stat == 0x1 || stat == 0x2 ||
5284 stat == 0x10 || stat == 0x11) {
5285 set_bit(MBX_INTERRUPT,
5286 &ha->mbx_cmd_flags);
5287 mb0 = RD_REG_WORD(®->mailbox0);
5288 WRT_REG_DWORD(®->hccr,
5289 HCCRX_CLR_RISC_INT);
5290 RD_REG_DWORD(®->hccr);
5297 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
5298 rval = mb0 & MBS_MASK;
5300 rval = QLA_FUNCTION_FAILED;
5302 if (rval != QLA_SUCCESS) {
5303 ql_dbg(ql_dbg_mbx, vha, 0x1104,
5304 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
5306 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
5307 "Done %s.\n", __func__);
5313 /* Set the specified data rate */
5315 qla2x00_set_data_rate(scsi_qla_host_t *vha, uint16_t mode)
5319 mbx_cmd_t *mcp = &mc;
5320 struct qla_hw_data *ha = vha->hw;
5323 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
5324 "Entered %s speed:0x%x mode:0x%x.\n", __func__, ha->set_data_rate,
5327 if (!IS_FWI2_CAPABLE(ha))
5328 return QLA_FUNCTION_FAILED;
5330 memset(mcp, 0, sizeof(*mcp));
5331 switch (ha->set_data_rate) {
5332 case PORT_SPEED_AUTO:
5333 case PORT_SPEED_4GB:
5334 case PORT_SPEED_8GB:
5335 case PORT_SPEED_16GB:
5336 case PORT_SPEED_32GB:
5337 val = ha->set_data_rate;
5340 ql_log(ql_log_warn, vha, 0x1199,
5341 "Unrecognized speed setting:%d. Setting Autoneg\n",
5343 val = ha->set_data_rate = PORT_SPEED_AUTO;
5347 mcp->mb[0] = MBC_DATA_RATE;
5351 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5352 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5353 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
5354 mcp->in_mb |= MBX_4|MBX_3;
5355 mcp->tov = MBX_TOV_SECONDS;
5357 rval = qla2x00_mailbox_command(vha, mcp);
5358 if (rval != QLA_SUCCESS) {
5359 ql_dbg(ql_dbg_mbx, vha, 0x1107,
5360 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5362 if (mcp->mb[1] != 0x7)
5363 ql_dbg(ql_dbg_mbx, vha, 0x1179,
5364 "Speed set:0x%x\n", mcp->mb[1]);
5366 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
5367 "Done %s.\n", __func__);
5374 qla2x00_get_data_rate(scsi_qla_host_t *vha)
5378 mbx_cmd_t *mcp = &mc;
5379 struct qla_hw_data *ha = vha->hw;
5381 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
5382 "Entered %s.\n", __func__);
5384 if (!IS_FWI2_CAPABLE(ha))
5385 return QLA_FUNCTION_FAILED;
5387 mcp->mb[0] = MBC_DATA_RATE;
5388 mcp->mb[1] = QLA_GET_DATA_RATE;
5389 mcp->out_mb = MBX_1|MBX_0;
5390 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5391 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
5392 mcp->in_mb |= MBX_3;
5393 mcp->tov = MBX_TOV_SECONDS;
5395 rval = qla2x00_mailbox_command(vha, mcp);
5396 if (rval != QLA_SUCCESS) {
5397 ql_dbg(ql_dbg_mbx, vha, 0x1107,
5398 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5400 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
5401 "Done %s.\n", __func__);
5402 if (mcp->mb[1] != 0x7)
5403 ha->link_data_rate = mcp->mb[1];
5410 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5414 mbx_cmd_t *mcp = &mc;
5415 struct qla_hw_data *ha = vha->hw;
5417 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
5418 "Entered %s.\n", __func__);
5420 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
5421 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
5422 return QLA_FUNCTION_FAILED;
5423 mcp->mb[0] = MBC_GET_PORT_CONFIG;
5424 mcp->out_mb = MBX_0;
5425 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5426 mcp->tov = MBX_TOV_SECONDS;
5429 rval = qla2x00_mailbox_command(vha, mcp);
5431 if (rval != QLA_SUCCESS) {
5432 ql_dbg(ql_dbg_mbx, vha, 0x110a,
5433 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5435 /* Copy all bits to preserve original value */
5436 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
5438 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
5439 "Done %s.\n", __func__);
5445 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5449 mbx_cmd_t *mcp = &mc;
5451 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
5452 "Entered %s.\n", __func__);
5454 mcp->mb[0] = MBC_SET_PORT_CONFIG;
5455 /* Copy all bits to preserve original setting */
5456 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
5457 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5459 mcp->tov = MBX_TOV_SECONDS;
5461 rval = qla2x00_mailbox_command(vha, mcp);
5463 if (rval != QLA_SUCCESS) {
5464 ql_dbg(ql_dbg_mbx, vha, 0x110d,
5465 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5467 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
5468 "Done %s.\n", __func__);
5475 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
5480 mbx_cmd_t *mcp = &mc;
5481 struct qla_hw_data *ha = vha->hw;
5483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
5484 "Entered %s.\n", __func__);
5486 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
5487 return QLA_FUNCTION_FAILED;
5489 mcp->mb[0] = MBC_PORT_PARAMS;
5490 mcp->mb[1] = loop_id;
5491 if (ha->flags.fcp_prio_enabled)
5495 mcp->mb[4] = priority & 0xf;
5496 mcp->mb[9] = vha->vp_idx;
5497 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5498 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5501 rval = qla2x00_mailbox_command(vha, mcp);
5509 if (rval != QLA_SUCCESS) {
5510 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
5512 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
5513 "Done %s.\n", __func__);
5520 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
5522 int rval = QLA_FUNCTION_FAILED;
5523 struct qla_hw_data *ha = vha->hw;
5526 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
5527 ql_dbg(ql_dbg_mbx, vha, 0x1150,
5528 "Thermal not supported by this card.\n");
5532 if (IS_QLA25XX(ha)) {
5533 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5534 ha->pdev->subsystem_device == 0x0175) {
5535 rval = qla2x00_read_sfp(vha, 0, &byte,
5536 0x98, 0x1, 1, BIT_13|BIT_0);
5540 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
5541 ha->pdev->subsystem_device == 0x338e) {
5542 rval = qla2x00_read_sfp(vha, 0, &byte,
5543 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
5547 ql_dbg(ql_dbg_mbx, vha, 0x10c9,
5548 "Thermal not supported by this card.\n");
5552 if (IS_QLA82XX(ha)) {
5553 *temp = qla82xx_read_temperature(vha);
5556 } else if (IS_QLA8044(ha)) {
5557 *temp = qla8044_read_temperature(vha);
5562 rval = qla2x00_read_asic_temperature(vha, temp);
5567 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
5570 struct qla_hw_data *ha = vha->hw;
5572 mbx_cmd_t *mcp = &mc;
5574 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
5575 "Entered %s.\n", __func__);
5577 if (!IS_FWI2_CAPABLE(ha))
5578 return QLA_FUNCTION_FAILED;
5580 memset(mcp, 0, sizeof(mbx_cmd_t));
5581 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5584 mcp->out_mb = MBX_1|MBX_0;
5589 rval = qla2x00_mailbox_command(vha, mcp);
5590 if (rval != QLA_SUCCESS) {
5591 ql_dbg(ql_dbg_mbx, vha, 0x1016,
5592 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5594 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
5595 "Done %s.\n", __func__);
5602 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
5605 struct qla_hw_data *ha = vha->hw;
5607 mbx_cmd_t *mcp = &mc;
5609 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
5610 "Entered %s.\n", __func__);
5612 if (!IS_P3P_TYPE(ha))
5613 return QLA_FUNCTION_FAILED;
5615 memset(mcp, 0, sizeof(mbx_cmd_t));
5616 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5619 mcp->out_mb = MBX_1|MBX_0;
5624 rval = qla2x00_mailbox_command(vha, mcp);
5625 if (rval != QLA_SUCCESS) {
5626 ql_dbg(ql_dbg_mbx, vha, 0x100c,
5627 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5629 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
5630 "Done %s.\n", __func__);
5637 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
5639 struct qla_hw_data *ha = vha->hw;
5641 mbx_cmd_t *mcp = &mc;
5642 int rval = QLA_FUNCTION_FAILED;
5644 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
5645 "Entered %s.\n", __func__);
5647 memset(mcp->mb, 0 , sizeof(mcp->mb));
5648 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5649 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5650 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
5651 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
5653 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5654 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
5655 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5657 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5658 mcp->tov = MBX_TOV_SECONDS;
5659 rval = qla2x00_mailbox_command(vha, mcp);
5661 /* Always copy back return mailbox values. */
5662 if (rval != QLA_SUCCESS) {
5663 ql_dbg(ql_dbg_mbx, vha, 0x1120,
5664 "mailbox command FAILED=0x%x, subcode=%x.\n",
5665 (mcp->mb[1] << 16) | mcp->mb[0],
5666 (mcp->mb[3] << 16) | mcp->mb[2]);
5668 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
5669 "Done %s.\n", __func__);
5670 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
5671 if (!ha->md_template_size) {
5672 ql_dbg(ql_dbg_mbx, vha, 0x1122,
5673 "Null template size obtained.\n");
5674 rval = QLA_FUNCTION_FAILED;
5681 qla82xx_md_get_template(scsi_qla_host_t *vha)
5683 struct qla_hw_data *ha = vha->hw;
5685 mbx_cmd_t *mcp = &mc;
5686 int rval = QLA_FUNCTION_FAILED;
5688 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
5689 "Entered %s.\n", __func__);
5691 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5692 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5693 if (!ha->md_tmplt_hdr) {
5694 ql_log(ql_log_warn, vha, 0x1124,
5695 "Unable to allocate memory for Minidump template.\n");
5699 memset(mcp->mb, 0 , sizeof(mcp->mb));
5700 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5701 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5702 mcp->mb[2] = LSW(RQST_TMPLT);
5703 mcp->mb[3] = MSW(RQST_TMPLT);
5704 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
5705 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
5706 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
5707 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
5708 mcp->mb[8] = LSW(ha->md_template_size);
5709 mcp->mb[9] = MSW(ha->md_template_size);
5711 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5712 mcp->tov = MBX_TOV_SECONDS;
5713 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5714 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5715 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5716 rval = qla2x00_mailbox_command(vha, mcp);
5718 if (rval != QLA_SUCCESS) {
5719 ql_dbg(ql_dbg_mbx, vha, 0x1125,
5720 "mailbox command FAILED=0x%x, subcode=%x.\n",
5721 ((mcp->mb[1] << 16) | mcp->mb[0]),
5722 ((mcp->mb[3] << 16) | mcp->mb[2]));
5724 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
5725 "Done %s.\n", __func__);
5730 qla8044_md_get_template(scsi_qla_host_t *vha)
5732 struct qla_hw_data *ha = vha->hw;
5734 mbx_cmd_t *mcp = &mc;
5735 int rval = QLA_FUNCTION_FAILED;
5736 int offset = 0, size = MINIDUMP_SIZE_36K;
5738 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
5739 "Entered %s.\n", __func__);
5741 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5742 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5743 if (!ha->md_tmplt_hdr) {
5744 ql_log(ql_log_warn, vha, 0xb11b,
5745 "Unable to allocate memory for Minidump template.\n");
5749 memset(mcp->mb, 0 , sizeof(mcp->mb));
5750 while (offset < ha->md_template_size) {
5751 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5752 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5753 mcp->mb[2] = LSW(RQST_TMPLT);
5754 mcp->mb[3] = MSW(RQST_TMPLT);
5755 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
5756 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
5757 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
5758 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
5759 mcp->mb[8] = LSW(size);
5760 mcp->mb[9] = MSW(size);
5761 mcp->mb[10] = offset & 0x0000FFFF;
5762 mcp->mb[11] = offset & 0xFFFF0000;
5763 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5764 mcp->tov = MBX_TOV_SECONDS;
5765 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5766 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5767 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5768 rval = qla2x00_mailbox_command(vha, mcp);
5770 if (rval != QLA_SUCCESS) {
5771 ql_dbg(ql_dbg_mbx, vha, 0xb11c,
5772 "mailbox command FAILED=0x%x, subcode=%x.\n",
5773 ((mcp->mb[1] << 16) | mcp->mb[0]),
5774 ((mcp->mb[3] << 16) | mcp->mb[2]));
5777 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
5778 "Done %s.\n", __func__);
5779 offset = offset + size;
5785 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5788 struct qla_hw_data *ha = vha->hw;
5790 mbx_cmd_t *mcp = &mc;
5792 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5793 return QLA_FUNCTION_FAILED;
5795 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
5796 "Entered %s.\n", __func__);
5798 memset(mcp, 0, sizeof(mbx_cmd_t));
5799 mcp->mb[0] = MBC_SET_LED_CONFIG;
5800 mcp->mb[1] = led_cfg[0];
5801 mcp->mb[2] = led_cfg[1];
5802 if (IS_QLA8031(ha)) {
5803 mcp->mb[3] = led_cfg[2];
5804 mcp->mb[4] = led_cfg[3];
5805 mcp->mb[5] = led_cfg[4];
5806 mcp->mb[6] = led_cfg[5];
5809 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5811 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5816 rval = qla2x00_mailbox_command(vha, mcp);
5817 if (rval != QLA_SUCCESS) {
5818 ql_dbg(ql_dbg_mbx, vha, 0x1134,
5819 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5821 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
5822 "Done %s.\n", __func__);
5829 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5832 struct qla_hw_data *ha = vha->hw;
5834 mbx_cmd_t *mcp = &mc;
5836 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5837 return QLA_FUNCTION_FAILED;
5839 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
5840 "Entered %s.\n", __func__);
5842 memset(mcp, 0, sizeof(mbx_cmd_t));
5843 mcp->mb[0] = MBC_GET_LED_CONFIG;
5845 mcp->out_mb = MBX_0;
5846 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5848 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5852 rval = qla2x00_mailbox_command(vha, mcp);
5853 if (rval != QLA_SUCCESS) {
5854 ql_dbg(ql_dbg_mbx, vha, 0x1137,
5855 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5857 led_cfg[0] = mcp->mb[1];
5858 led_cfg[1] = mcp->mb[2];
5859 if (IS_QLA8031(ha)) {
5860 led_cfg[2] = mcp->mb[3];
5861 led_cfg[3] = mcp->mb[4];
5862 led_cfg[4] = mcp->mb[5];
5863 led_cfg[5] = mcp->mb[6];
5865 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
5866 "Done %s.\n", __func__);
5873 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
5876 struct qla_hw_data *ha = vha->hw;
5878 mbx_cmd_t *mcp = &mc;
5880 if (!IS_P3P_TYPE(ha))
5881 return QLA_FUNCTION_FAILED;
5883 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5884 "Entered %s.\n", __func__);
5886 memset(mcp, 0, sizeof(mbx_cmd_t));
5887 mcp->mb[0] = MBC_SET_LED_CONFIG;
5893 mcp->out_mb = MBX_7|MBX_0;
5895 mcp->tov = MBX_TOV_SECONDS;
5898 rval = qla2x00_mailbox_command(vha, mcp);
5899 if (rval != QLA_SUCCESS) {
5900 ql_dbg(ql_dbg_mbx, vha, 0x1128,
5901 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5903 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5904 "Done %s.\n", __func__);
5911 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5914 struct qla_hw_data *ha = vha->hw;
5916 mbx_cmd_t *mcp = &mc;
5918 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
5919 return QLA_FUNCTION_FAILED;
5921 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
5922 "Entered %s.\n", __func__);
5924 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
5925 mcp->mb[1] = LSW(reg);
5926 mcp->mb[2] = MSW(reg);
5927 mcp->mb[3] = LSW(data);
5928 mcp->mb[4] = MSW(data);
5929 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5931 mcp->in_mb = MBX_1|MBX_0;
5932 mcp->tov = MBX_TOV_SECONDS;
5934 rval = qla2x00_mailbox_command(vha, mcp);
5936 if (rval != QLA_SUCCESS) {
5937 ql_dbg(ql_dbg_mbx, vha, 0x1131,
5938 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5940 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5941 "Done %s.\n", __func__);
5948 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
5951 struct qla_hw_data *ha = vha->hw;
5953 mbx_cmd_t *mcp = &mc;
5955 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5956 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5957 "Implicit LOGO Unsupported.\n");
5958 return QLA_FUNCTION_FAILED;
5962 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
5963 "Entering %s.\n", __func__);
5965 /* Perform Implicit LOGO. */
5966 mcp->mb[0] = MBC_PORT_LOGOUT;
5967 mcp->mb[1] = fcport->loop_id;
5968 mcp->mb[10] = BIT_15;
5969 mcp->out_mb = MBX_10|MBX_1|MBX_0;
5971 mcp->tov = MBX_TOV_SECONDS;
5973 rval = qla2x00_mailbox_command(vha, mcp);
5974 if (rval != QLA_SUCCESS)
5975 ql_dbg(ql_dbg_mbx, vha, 0x113d,
5976 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5978 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
5979 "Done %s.\n", __func__);
5985 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
5989 mbx_cmd_t *mcp = &mc;
5990 struct qla_hw_data *ha = vha->hw;
5991 unsigned long retry_max_time = jiffies + (2 * HZ);
5993 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
5994 return QLA_FUNCTION_FAILED;
5996 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
5999 mcp->mb[0] = MBC_READ_REMOTE_REG;
6000 mcp->mb[1] = LSW(reg);
6001 mcp->mb[2] = MSW(reg);
6002 mcp->out_mb = MBX_2|MBX_1|MBX_0;
6003 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
6004 mcp->tov = MBX_TOV_SECONDS;
6006 rval = qla2x00_mailbox_command(vha, mcp);
6008 if (rval != QLA_SUCCESS) {
6009 ql_dbg(ql_dbg_mbx, vha, 0x114c,
6010 "Failed=%x mb[0]=%x mb[1]=%x.\n",
6011 rval, mcp->mb[0], mcp->mb[1]);
6013 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
6014 if (*data == QLA8XXX_BAD_VALUE) {
6016 * During soft-reset CAMRAM register reads might
6017 * return 0xbad0bad0. So retry for MAX of 2 sec
6018 * while reading camram registers.
6020 if (time_after(jiffies, retry_max_time)) {
6021 ql_dbg(ql_dbg_mbx, vha, 0x1141,
6022 "Failure to read CAMRAM register. "
6023 "data=0x%x.\n", *data);
6024 return QLA_FUNCTION_FAILED;
6029 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
6036 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
6040 mbx_cmd_t *mcp = &mc;
6041 struct qla_hw_data *ha = vha->hw;
6043 if (!IS_QLA83XX(ha))
6044 return QLA_FUNCTION_FAILED;
6046 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
6048 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
6049 mcp->out_mb = MBX_0;
6050 mcp->in_mb = MBX_1|MBX_0;
6051 mcp->tov = MBX_TOV_SECONDS;
6053 rval = qla2x00_mailbox_command(vha, mcp);
6055 if (rval != QLA_SUCCESS) {
6056 ql_dbg(ql_dbg_mbx, vha, 0x1144,
6057 "Failed=%x mb[0]=%x mb[1]=%x.\n",
6058 rval, mcp->mb[0], mcp->mb[1]);
6059 ha->isp_ops->fw_dump(vha, 0);
6061 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
6068 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
6069 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
6073 mbx_cmd_t *mcp = &mc;
6074 uint8_t subcode = (uint8_t)options;
6075 struct qla_hw_data *ha = vha->hw;
6077 if (!IS_QLA8031(ha))
6078 return QLA_FUNCTION_FAILED;
6080 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
6082 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
6083 mcp->mb[1] = options;
6084 mcp->out_mb = MBX_1|MBX_0;
6085 if (subcode & BIT_2) {
6086 mcp->mb[2] = LSW(start_addr);
6087 mcp->mb[3] = MSW(start_addr);
6088 mcp->mb[4] = LSW(end_addr);
6089 mcp->mb[5] = MSW(end_addr);
6090 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
6092 mcp->in_mb = MBX_2|MBX_1|MBX_0;
6093 if (!(subcode & (BIT_2 | BIT_5)))
6094 mcp->in_mb |= MBX_4|MBX_3;
6095 mcp->tov = MBX_TOV_SECONDS;
6097 rval = qla2x00_mailbox_command(vha, mcp);
6099 if (rval != QLA_SUCCESS) {
6100 ql_dbg(ql_dbg_mbx, vha, 0x1147,
6101 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
6102 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
6104 ha->isp_ops->fw_dump(vha, 0);
6106 if (subcode & BIT_5)
6107 *sector_size = mcp->mb[1];
6108 else if (subcode & (BIT_6 | BIT_7)) {
6109 ql_dbg(ql_dbg_mbx, vha, 0x1148,
6110 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
6111 } else if (subcode & (BIT_3 | BIT_4)) {
6112 ql_dbg(ql_dbg_mbx, vha, 0x1149,
6113 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
6115 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
6122 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
6127 mbx_cmd_t *mcp = &mc;
6129 if (!IS_MCTP_CAPABLE(vha->hw))
6130 return QLA_FUNCTION_FAILED;
6132 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
6133 "Entered %s.\n", __func__);
6135 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
6136 mcp->mb[1] = LSW(addr);
6137 mcp->mb[2] = MSW(req_dma);
6138 mcp->mb[3] = LSW(req_dma);
6139 mcp->mb[4] = MSW(size);
6140 mcp->mb[5] = LSW(size);
6141 mcp->mb[6] = MSW(MSD(req_dma));
6142 mcp->mb[7] = LSW(MSD(req_dma));
6143 mcp->mb[8] = MSW(addr);
6144 /* Setting RAM ID to valid */
6145 mcp->mb[10] |= BIT_7;
6146 /* For MCTP RAM ID is 0x40 */
6147 mcp->mb[10] |= 0x40;
6149 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
6153 mcp->tov = MBX_TOV_SECONDS;
6155 rval = qla2x00_mailbox_command(vha, mcp);
6157 if (rval != QLA_SUCCESS) {
6158 ql_dbg(ql_dbg_mbx, vha, 0x114e,
6159 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6161 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
6162 "Done %s.\n", __func__);
6169 qla26xx_dport_diagnostics(scsi_qla_host_t *vha,
6170 void *dd_buf, uint size, uint options)
6174 mbx_cmd_t *mcp = &mc;
6177 if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw) &&
6178 !IS_QLA28XX(vha->hw))
6179 return QLA_FUNCTION_FAILED;
6181 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x119f,
6182 "Entered %s.\n", __func__);
6184 dd_dma = dma_map_single(&vha->hw->pdev->dev,
6185 dd_buf, size, DMA_FROM_DEVICE);
6186 if (dma_mapping_error(&vha->hw->pdev->dev, dd_dma)) {
6187 ql_log(ql_log_warn, vha, 0x1194, "Failed to map dma buffer.\n");
6188 return QLA_MEMORY_ALLOC_FAILED;
6191 memset(dd_buf, 0, size);
6193 mcp->mb[0] = MBC_DPORT_DIAGNOSTICS;
6194 mcp->mb[1] = options;
6195 mcp->mb[2] = MSW(LSD(dd_dma));
6196 mcp->mb[3] = LSW(LSD(dd_dma));
6197 mcp->mb[6] = MSW(MSD(dd_dma));
6198 mcp->mb[7] = LSW(MSD(dd_dma));
6200 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
6201 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
6202 mcp->buf_size = size;
6203 mcp->flags = MBX_DMA_IN;
6204 mcp->tov = MBX_TOV_SECONDS * 4;
6205 rval = qla2x00_mailbox_command(vha, mcp);
6207 if (rval != QLA_SUCCESS) {
6208 ql_dbg(ql_dbg_mbx, vha, 0x1195, "Failed=%x.\n", rval);
6210 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1196,
6211 "Done %s.\n", __func__);
6214 dma_unmap_single(&vha->hw->pdev->dev, dd_dma,
6215 size, DMA_FROM_DEVICE);
6220 static void qla2x00_async_mb_sp_done(srb_t *sp, int res)
6222 sp->u.iocb_cmd.u.mbx.rc = res;
6224 complete(&sp->u.iocb_cmd.u.mbx.comp);
6225 /* don't free sp here. Let the caller do the free */
6229 * This mailbox uses the iocb interface to send MB command.
6230 * This allows non-critial (non chip setup) command to go
6233 int qla24xx_send_mb_cmd(struct scsi_qla_host *vha, mbx_cmd_t *mcp)
6235 int rval = QLA_FUNCTION_FAILED;
6239 if (!vha->hw->flags.fw_started)
6242 sp = qla2x00_get_sp(vha, NULL, GFP_KERNEL);
6246 sp->type = SRB_MB_IOCB;
6247 sp->name = mb_to_str(mcp->mb[0]);
6249 c = &sp->u.iocb_cmd;
6250 c->timeout = qla2x00_async_iocb_timeout;
6251 init_completion(&c->u.mbx.comp);
6253 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
6255 memcpy(sp->u.iocb_cmd.u.mbx.out_mb, mcp->mb, SIZEOF_IOCB_MB_REG);
6257 sp->done = qla2x00_async_mb_sp_done;
6259 rval = qla2x00_start_sp(sp);
6260 if (rval != QLA_SUCCESS) {
6261 ql_dbg(ql_dbg_mbx, vha, 0x1018,
6262 "%s: %s Failed submission. %x.\n",
6263 __func__, sp->name, rval);
6267 ql_dbg(ql_dbg_mbx, vha, 0x113f, "MB:%s hndl %x submitted\n",
6268 sp->name, sp->handle);
6270 wait_for_completion(&c->u.mbx.comp);
6271 memcpy(mcp->mb, sp->u.iocb_cmd.u.mbx.in_mb, SIZEOF_IOCB_MB_REG);
6275 case QLA_FUNCTION_TIMEOUT:
6276 ql_dbg(ql_dbg_mbx, vha, 0x1140, "%s: %s Timeout. %x.\n",
6277 __func__, sp->name, rval);
6280 ql_dbg(ql_dbg_mbx, vha, 0x119d, "%s: %s done.\n",
6281 __func__, sp->name);
6285 ql_dbg(ql_dbg_mbx, vha, 0x119e, "%s: %s Failed. %x.\n",
6286 __func__, sp->name, rval);
6301 * NOTE: Do not call this routine from DPC thread
6303 int qla24xx_gpdb_wait(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
6305 int rval = QLA_FUNCTION_FAILED;
6307 struct port_database_24xx *pd;
6308 struct qla_hw_data *ha = vha->hw;
6311 if (!vha->hw->flags.fw_started)
6314 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
6316 ql_log(ql_log_warn, vha, 0xd047,
6317 "Failed to allocate port database structure.\n");
6321 memset(&mc, 0, sizeof(mc));
6322 mc.mb[0] = MBC_GET_PORT_DATABASE;
6323 mc.mb[1] = cpu_to_le16(fcport->loop_id);
6324 mc.mb[2] = MSW(pd_dma);
6325 mc.mb[3] = LSW(pd_dma);
6326 mc.mb[6] = MSW(MSD(pd_dma));
6327 mc.mb[7] = LSW(MSD(pd_dma));
6328 mc.mb[9] = cpu_to_le16(vha->vp_idx);
6329 mc.mb[10] = cpu_to_le16((uint16_t)opt);
6331 rval = qla24xx_send_mb_cmd(vha, &mc);
6332 if (rval != QLA_SUCCESS) {
6333 ql_dbg(ql_dbg_mbx, vha, 0x1193,
6334 "%s: %8phC fail\n", __func__, fcport->port_name);
6338 rval = __qla24xx_parse_gpdb(vha, fcport, pd);
6340 ql_dbg(ql_dbg_mbx, vha, 0x1197, "%s: %8phC done\n",
6341 __func__, fcport->port_name);
6345 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
6350 int __qla24xx_parse_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport,
6351 struct port_database_24xx *pd)
6353 int rval = QLA_SUCCESS;
6355 u8 current_login_state, last_login_state;
6357 if (fcport->fc4f_nvme) {
6358 current_login_state = pd->current_login_state >> 4;
6359 last_login_state = pd->last_login_state >> 4;
6361 current_login_state = pd->current_login_state & 0xf;
6362 last_login_state = pd->last_login_state & 0xf;
6365 /* Check for logged in state. */
6366 if (current_login_state != PDS_PRLI_COMPLETE) {
6367 ql_dbg(ql_dbg_mbx, vha, 0x119a,
6368 "Unable to verify login-state (%x/%x) for loop_id %x.\n",
6369 current_login_state, last_login_state, fcport->loop_id);
6370 rval = QLA_FUNCTION_FAILED;
6374 if (fcport->loop_id == FC_NO_LOOP_ID ||
6375 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
6376 memcmp(fcport->port_name, pd->port_name, 8))) {
6377 /* We lost the device mid way. */
6378 rval = QLA_NOT_LOGGED_IN;
6382 /* Names are little-endian. */
6383 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
6384 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
6386 /* Get port_id of device. */
6387 fcport->d_id.b.domain = pd->port_id[0];
6388 fcport->d_id.b.area = pd->port_id[1];
6389 fcport->d_id.b.al_pa = pd->port_id[2];
6390 fcport->d_id.b.rsvd_1 = 0;
6392 if (fcport->fc4f_nvme) {
6393 fcport->port_type = 0;
6394 if ((pd->prli_svc_param_word_3[0] & BIT_5) == 0)
6395 fcport->port_type |= FCT_NVME_INITIATOR;
6396 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
6397 fcport->port_type |= FCT_NVME_TARGET;
6398 if ((pd->prli_svc_param_word_3[0] & BIT_3) == 0)
6399 fcport->port_type |= FCT_NVME_DISCOVERY;
6401 /* If not target must be initiator or unknown type. */
6402 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
6403 fcport->port_type = FCT_INITIATOR;
6405 fcport->port_type = FCT_TARGET;
6407 /* Passback COS information. */
6408 fcport->supported_classes = (pd->flags & PDF_CLASS_2) ?
6409 FC_COS_CLASS2 : FC_COS_CLASS3;
6411 if (pd->prli_svc_param_word_3[0] & BIT_7) {
6412 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
6413 fcport->conf_compl_supported = 1;
6421 * qla24xx_gidlist__wait
6422 * NOTE: don't call this routine from DPC thread.
6424 int qla24xx_gidlist_wait(struct scsi_qla_host *vha,
6425 void *id_list, dma_addr_t id_list_dma, uint16_t *entries)
6427 int rval = QLA_FUNCTION_FAILED;
6430 if (!vha->hw->flags.fw_started)
6433 memset(&mc, 0, sizeof(mc));
6434 mc.mb[0] = MBC_GET_ID_LIST;
6435 mc.mb[2] = MSW(id_list_dma);
6436 mc.mb[3] = LSW(id_list_dma);
6437 mc.mb[6] = MSW(MSD(id_list_dma));
6438 mc.mb[7] = LSW(MSD(id_list_dma));
6440 mc.mb[9] = cpu_to_le16(vha->vp_idx);
6442 rval = qla24xx_send_mb_cmd(vha, &mc);
6443 if (rval != QLA_SUCCESS) {
6444 ql_dbg(ql_dbg_mbx, vha, 0x119b,
6445 "%s: fail\n", __func__);
6447 *entries = mc.mb[1];
6448 ql_dbg(ql_dbg_mbx, vha, 0x119c,
6449 "%s: done\n", __func__);
6455 int qla27xx_set_zio_threshold(scsi_qla_host_t *vha, uint16_t value)
6459 mbx_cmd_t *mcp = &mc;
6461 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1200,
6462 "Entered %s\n", __func__);
6464 memset(mcp->mb, 0 , sizeof(mcp->mb));
6465 mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD;
6466 mcp->mb[1] = cpu_to_le16(1);
6467 mcp->mb[2] = cpu_to_le16(value);
6468 mcp->out_mb = MBX_2 | MBX_1 | MBX_0;
6469 mcp->in_mb = MBX_2 | MBX_0;
6470 mcp->tov = MBX_TOV_SECONDS;
6473 rval = qla2x00_mailbox_command(vha, mcp);
6475 ql_dbg(ql_dbg_mbx, vha, 0x1201, "%s %x\n",
6476 (rval != QLA_SUCCESS) ? "Failed" : "Done", rval);
6481 int qla27xx_get_zio_threshold(scsi_qla_host_t *vha, uint16_t *value)
6485 mbx_cmd_t *mcp = &mc;
6487 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1203,
6488 "Entered %s\n", __func__);
6490 memset(mcp->mb, 0, sizeof(mcp->mb));
6491 mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD;
6492 mcp->mb[1] = cpu_to_le16(0);
6493 mcp->out_mb = MBX_1 | MBX_0;
6494 mcp->in_mb = MBX_2 | MBX_0;
6495 mcp->tov = MBX_TOV_SECONDS;
6498 rval = qla2x00_mailbox_command(vha, mcp);
6499 if (rval == QLA_SUCCESS)
6502 ql_dbg(ql_dbg_mbx, vha, 0x1205, "%s %x\n",
6503 (rval != QLA_SUCCESS) ? "Failed" : "Done", rval);
6509 qla2x00_read_sfp_dev(struct scsi_qla_host *vha, char *buf, int count)
6511 struct qla_hw_data *ha = vha->hw;
6512 uint16_t iter, addr, offset;
6513 dma_addr_t phys_addr;
6517 memset(ha->sfp_data, 0, SFP_DEV_SIZE);
6519 phys_addr = ha->sfp_data_dma;
6520 sfp_data = ha->sfp_data;
6523 for (iter = 0; iter < SFP_DEV_SIZE / SFP_BLOCK_SIZE; iter++) {
6525 /* Skip to next device address. */
6530 rval = qla2x00_read_sfp(vha, phys_addr, sfp_data,
6531 addr, offset, SFP_BLOCK_SIZE, BIT_1);
6532 if (rval != QLA_SUCCESS) {
6533 ql_log(ql_log_warn, vha, 0x706d,
6534 "Unable to read SFP data (%x/%x/%x).\n", rval,
6540 if (buf && (c < count)) {
6543 if ((count - c) >= SFP_BLOCK_SIZE)
6544 sz = SFP_BLOCK_SIZE;
6548 memcpy(buf, sfp_data, sz);
6549 buf += SFP_BLOCK_SIZE;
6552 phys_addr += SFP_BLOCK_SIZE;
6553 sfp_data += SFP_BLOCK_SIZE;
6554 offset += SFP_BLOCK_SIZE;
6560 int qla24xx_res_count_wait(struct scsi_qla_host *vha,
6561 uint16_t *out_mb, int out_mb_sz)
6563 int rval = QLA_FUNCTION_FAILED;
6566 if (!vha->hw->flags.fw_started)
6569 memset(&mc, 0, sizeof(mc));
6570 mc.mb[0] = MBC_GET_RESOURCE_COUNTS;
6572 rval = qla24xx_send_mb_cmd(vha, &mc);
6573 if (rval != QLA_SUCCESS) {
6574 ql_dbg(ql_dbg_mbx, vha, 0xffff,
6575 "%s: fail\n", __func__);
6577 if (out_mb_sz <= SIZEOF_IOCB_MB_REG)
6578 memcpy(out_mb, mc.mb, out_mb_sz);
6580 memcpy(out_mb, mc.mb, SIZEOF_IOCB_MB_REG);
6582 ql_dbg(ql_dbg_mbx, vha, 0xffff,
6583 "%s: done\n", __func__);
6589 int qla28xx_secure_flash_update(scsi_qla_host_t *vha, uint16_t opts,
6590 uint16_t region, uint32_t len, dma_addr_t sfub_dma_addr,
6595 mbx_cmd_t *mcp = &mc;
6597 mcp->mb[0] = MBC_SECURE_FLASH_UPDATE;
6599 mcp->mb[2] = region;
6600 mcp->mb[3] = MSW(len);
6601 mcp->mb[4] = LSW(len);
6602 mcp->mb[5] = MSW(sfub_dma_addr);
6603 mcp->mb[6] = LSW(sfub_dma_addr);
6604 mcp->mb[7] = MSW(MSD(sfub_dma_addr));
6605 mcp->mb[8] = LSW(MSD(sfub_dma_addr));
6606 mcp->mb[9] = sfub_len;
6608 MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
6609 mcp->in_mb = MBX_2|MBX_1|MBX_0;
6610 mcp->tov = MBX_TOV_SECONDS;
6612 rval = qla2x00_mailbox_command(vha, mcp);
6614 if (rval != QLA_SUCCESS) {
6615 ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s(%ld): failed rval 0x%x, %x %x %x",
6616 __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1],
6623 int qla2xxx_write_remote_register(scsi_qla_host_t *vha, uint32_t addr,
6628 mbx_cmd_t *mcp = &mc;
6630 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
6631 "Entered %s.\n", __func__);
6633 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
6634 mcp->mb[1] = LSW(addr);
6635 mcp->mb[2] = MSW(addr);
6636 mcp->mb[3] = LSW(data);
6637 mcp->mb[4] = MSW(data);
6638 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
6639 mcp->in_mb = MBX_1|MBX_0;
6640 mcp->tov = MBX_TOV_SECONDS;
6642 rval = qla2x00_mailbox_command(vha, mcp);
6644 if (rval != QLA_SUCCESS) {
6645 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
6646 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6648 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
6649 "Done %s.\n", __func__);
6655 int qla2xxx_read_remote_register(scsi_qla_host_t *vha, uint32_t addr,
6660 mbx_cmd_t *mcp = &mc;
6662 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
6663 "Entered %s.\n", __func__);
6665 mcp->mb[0] = MBC_READ_REMOTE_REG;
6666 mcp->mb[1] = LSW(addr);
6667 mcp->mb[2] = MSW(addr);
6668 mcp->out_mb = MBX_2|MBX_1|MBX_0;
6669 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
6670 mcp->tov = MBX_TOV_SECONDS;
6672 rval = qla2x00_mailbox_command(vha, mcp);
6674 *data = (uint32_t)((((uint32_t)mcp->mb[4]) << 16) | mcp->mb[3]);
6676 if (rval != QLA_SUCCESS) {
6677 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
6678 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6680 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
6681 "Done %s.\n", __func__);