1 /* Applied Micro X-Gene SoC Ethernet Driver
3 * Copyright (c) 2014, Applied Micro Circuits Corporation
4 * Authors: Iyappan Subramanian <isubramanian@apm.com>
5 * Ravi Patel <rapatel@apm.com>
6 * Keyur Chudgar <kchudgar@apm.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #ifndef __XGENE_ENET_MAIN_H__
23 #define __XGENE_ENET_MAIN_H__
25 #include <linux/acpi.h>
26 #include <linux/clk.h>
27 #include <linux/efi.h>
28 #include <linux/irq.h>
30 #include <linux/of_platform.h>
31 #include <linux/of_net.h>
32 #include <linux/of_mdio.h>
33 #include <linux/module.h>
35 #include <linux/prefetch.h>
36 #include <linux/if_vlan.h>
37 #include <linux/phy.h>
38 #include "xgene_enet_hw.h"
39 #include "xgene_enet_cle.h"
40 #include "xgene_enet_ring2.h"
42 #define XGENE_DRV_VERSION "v1.0"
43 #define XGENE_ENET_MAX_MTU 1536
44 #define SKB_BUFFER_SIZE (XGENE_ENET_MAX_MTU - NET_IP_ALIGN)
45 #define BUFLEN_16K (16 * 1024)
46 #define NUM_PKT_BUF 64
47 #define NUM_BUFPOOL 32
48 #define MAX_EXP_BUFFS 256
49 #define XGENE_ENET_MSS 1448
50 #define XGENE_MIN_ENET_FRAME_SIZE 60
52 #define XGENE_MAX_ENET_IRQ 16
53 #define XGENE_NUM_RX_RING 8
54 #define XGENE_NUM_TX_RING 8
55 #define XGENE_NUM_TXC_RING 8
57 #define START_CPU_BUFNUM_0 0
58 #define START_ETH_BUFNUM_0 2
59 #define START_BP_BUFNUM_0 0x22
60 #define START_RING_NUM_0 8
61 #define START_CPU_BUFNUM_1 12
62 #define START_ETH_BUFNUM_1 10
63 #define START_BP_BUFNUM_1 0x2A
64 #define START_RING_NUM_1 264
66 #define XG_START_CPU_BUFNUM_1 12
67 #define XG_START_ETH_BUFNUM_1 2
68 #define XG_START_BP_BUFNUM_1 0x22
69 #define XG_START_RING_NUM_1 264
71 #define X2_START_CPU_BUFNUM_0 0
72 #define X2_START_ETH_BUFNUM_0 0
73 #define X2_START_BP_BUFNUM_0 0x20
74 #define X2_START_RING_NUM_0 0
75 #define X2_START_CPU_BUFNUM_1 0xc
76 #define X2_START_ETH_BUFNUM_1 0
77 #define X2_START_BP_BUFNUM_1 0x20
78 #define X2_START_RING_NUM_1 256
80 #define IRQ_ID_SIZE 16
82 #define PHY_POLL_LINK_ON (10 * HZ)
83 #define PHY_POLL_LINK_OFF (PHY_POLL_LINK_ON / 5)
90 /* software context of a descriptor ring */
91 struct xgene_enet_desc_ring {
92 struct net_device *ndev;
100 char irq_name[IRQ_ID_SIZE];
102 u32 state[X2_NUM_RING_CONFIG];
103 void __iomem *cmd_base;
106 dma_addr_t irq_mbox_dma;
111 struct sk_buff *(*rx_skb);
112 struct sk_buff *(*cp_skb);
113 dma_addr_t *frag_dma_addr;
114 enum xgene_enet_ring_cfgsize cfgsize;
115 struct xgene_enet_desc_ring *cp_ring;
116 struct xgene_enet_desc_ring *buf_pool;
117 struct napi_struct napi;
120 struct xgene_enet_raw_desc *raw_desc;
121 struct xgene_enet_raw_desc16 *raw_desc16;
130 u64 rx_length_errors;
136 struct xgene_mac_ops {
137 void (*init)(struct xgene_enet_pdata *pdata);
138 void (*reset)(struct xgene_enet_pdata *pdata);
139 void (*tx_enable)(struct xgene_enet_pdata *pdata);
140 void (*rx_enable)(struct xgene_enet_pdata *pdata);
141 void (*tx_disable)(struct xgene_enet_pdata *pdata);
142 void (*rx_disable)(struct xgene_enet_pdata *pdata);
143 void (*set_mac_addr)(struct xgene_enet_pdata *pdata);
144 void (*set_mss)(struct xgene_enet_pdata *pdata);
145 void (*link_state)(struct work_struct *work);
148 struct xgene_port_ops {
149 int (*reset)(struct xgene_enet_pdata *pdata);
150 void (*cle_bypass)(struct xgene_enet_pdata *pdata,
151 u32 dst_ring_num, u16 bufpool_id);
152 void (*shutdown)(struct xgene_enet_pdata *pdata);
155 struct xgene_ring_ops {
157 u8 num_ring_id_shift;
158 struct xgene_enet_desc_ring * (*setup)(struct xgene_enet_desc_ring *);
159 void (*clear)(struct xgene_enet_desc_ring *);
160 void (*wr_cmd)(struct xgene_enet_desc_ring *, int);
161 u32 (*len)(struct xgene_enet_desc_ring *);
162 void (*coalesce)(struct xgene_enet_desc_ring *);
165 struct xgene_cle_ops {
166 int (*cle_init)(struct xgene_enet_pdata *pdata);
169 /* ethernet private data */
170 struct xgene_enet_pdata {
171 struct net_device *ndev;
172 struct mii_bus *mdio_bus;
173 struct phy_device *phy_dev;
176 struct platform_device *pdev;
177 enum xgene_enet_id enet_id;
178 struct xgene_enet_desc_ring *tx_ring[XGENE_NUM_TX_RING];
179 struct xgene_enet_desc_ring *rx_ring[XGENE_NUM_RX_RING];
180 u16 tx_level[XGENE_NUM_TX_RING];
181 u16 txc_level[XGENE_NUM_TX_RING];
185 u32 irqs[XGENE_MAX_ENET_IRQ];
189 void __iomem *eth_csr_addr;
190 void __iomem *eth_ring_if_addr;
191 void __iomem *eth_diag_csr_addr;
192 void __iomem *mcx_mac_addr;
193 void __iomem *mcx_mac_csr_addr;
194 void __iomem *base_addr;
195 void __iomem *ring_csr_addr;
196 void __iomem *ring_cmd_addr;
198 enum xgene_enet_rm rm;
199 struct xgene_enet_cle cle;
200 struct rtnl_link_stats64 stats;
201 const struct xgene_mac_ops *mac_ops;
202 const struct xgene_port_ops *port_ops;
203 struct xgene_ring_ops *ring_ops;
204 struct xgene_cle_ops *cle_ops;
205 struct delayed_work link_work;
216 struct xgene_indirect_ctl {
220 void __iomem *cmd_done;
223 /* Set the specified value into a bit-field defined by its starting position
224 * and length within a single u64.
226 static inline u64 xgene_enet_set_field_value(int pos, int len, u64 val)
228 return (val & ((1ULL << len) - 1)) << pos;
231 #define SET_VAL(field, val) \
232 xgene_enet_set_field_value(field ## _POS, field ## _LEN, val)
234 #define SET_BIT(field) \
235 xgene_enet_set_field_value(field ## _POS, 1, 1)
237 /* Get the value from a bit-field defined by its starting position
238 * and length within the specified u64.
240 static inline u64 xgene_enet_get_field_value(int pos, int len, u64 src)
242 return (src >> pos) & ((1ULL << len) - 1);
245 #define GET_VAL(field, src) \
246 xgene_enet_get_field_value(field ## _POS, field ## _LEN, src)
248 #define GET_BIT(field, src) \
249 xgene_enet_get_field_value(field ## _POS, 1, src)
251 static inline struct device *ndev_to_dev(struct net_device *ndev)
253 return ndev->dev.parent;
256 static inline u16 xgene_enet_dst_ring_num(struct xgene_enet_desc_ring *ring)
258 struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
260 return ((u16)pdata->rm << 10) | ring->num;
263 void xgene_enet_set_ethtool_ops(struct net_device *netdev);
265 #endif /* __XGENE_ENET_MAIN_H__ */