arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <clocksource/hyperv_timer.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__
  96 #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /*
 139  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 140  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 141  * advancement entirely.  Any other value is used as-is and disables adaptive
 142  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 143  */
 144 static int __read_mostly lapic_timer_advance_ns = -1;
 145 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly vector_hashing = true;
 148 module_param(vector_hashing, bool, S_IRUGO);
 149
 150 bool __read_mostly enable_vmware_backdoor = false;
 151 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 152 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 153
 154 static bool __read_mostly force_emulation_prefix = false;
 155 module_param(force_emulation_prefix, bool, S_IRUGO);
 156
 157 int __read_mostly pi_inject_timer = -1;
 158 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 159
 160 #define KVM_NR_SHARED_MSRS 16
 161
 162 struct kvm_shared_msrs_global {
 163         int nr;
 164         u32 msrs[KVM_NR_SHARED_MSRS];
 165 };
 166
 167 struct kvm_shared_msrs {
 168         struct user_return_notifier urn;
 169         bool registered;
 170         struct kvm_shared_msr_values {
 171                 u64 host;
 172                 u64 curr;
 173         } values[KVM_NR_SHARED_MSRS];
 174 };
 175
 176 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 177 static struct kvm_shared_msrs __percpu *shared_msrs;
 178
 179 struct kvm_stats_debugfs_item debugfs_entries[] = {
 180         { "pf_fixed", VCPU_STAT(pf_fixed) },
 181         { "pf_guest", VCPU_STAT(pf_guest) },
 182         { "tlb_flush", VCPU_STAT(tlb_flush) },
 183         { "invlpg", VCPU_STAT(invlpg) },
 184         { "exits", VCPU_STAT(exits) },
 185         { "io_exits", VCPU_STAT(io_exits) },
 186         { "mmio_exits", VCPU_STAT(mmio_exits) },
 187         { "signal_exits", VCPU_STAT(signal_exits) },
 188         { "irq_window", VCPU_STAT(irq_window_exits) },
 189         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 190         { "halt_exits", VCPU_STAT(halt_exits) },
 191         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 192         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 193         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 194         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 195         { "hypercalls", VCPU_STAT(hypercalls) },
 196         { "request_irq", VCPU_STAT(request_irq_exits) },
 197         { "irq_exits", VCPU_STAT(irq_exits) },
 198         { "host_state_reload", VCPU_STAT(host_state_reload) },
 199         { "fpu_reload", VCPU_STAT(fpu_reload) },
 200         { "insn_emulation", VCPU_STAT(insn_emulation) },
 201         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 202         { "irq_injections", VCPU_STAT(irq_injections) },
 203         { "nmi_injections", VCPU_STAT(nmi_injections) },
 204         { "req_event", VCPU_STAT(req_event) },
 205         { "l1d_flush", VCPU_STAT(l1d_flush) },
 206         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 207         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 208         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 209         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 210         { "mmu_flooded", VM_STAT(mmu_flooded) },
 211         { "mmu_recycled", VM_STAT(mmu_recycled) },
 212         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 213         { "mmu_unsync", VM_STAT(mmu_unsync) },
 214         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 215         { "largepages", VM_STAT(lpages, .mode = 0444) },
 216         { "max_mmu_page_hash_collisions",
 217                 VM_STAT(max_mmu_page_hash_collisions) },
 218         { NULL }
 219 };
 220
 221 u64 __read_mostly host_xcr0;
 222
 223 struct kmem_cache *x86_fpu_cache;
 224 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 225
 226 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 227
 228 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 229 {
 230         int i;
 231         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 232                 vcpu->arch.apf.gfns[i] = ~0;
 233 }
 234
 235 static void kvm_on_user_return(struct user_return_notifier *urn)
 236 {
 237         unsigned slot;
 238         struct kvm_shared_msrs *locals
 239                 = container_of(urn, struct kvm_shared_msrs, urn);
 240         struct kvm_shared_msr_values *values;
 241         unsigned long flags;
 242
 243         /*
 244          * Disabling irqs at this point since the following code could be
 245          * interrupted and executed through kvm_arch_hardware_disable()
 246          */
 247         local_irq_save(flags);
 248         if (locals->registered) {
 249                 locals->registered = false;
 250                 user_return_notifier_unregister(urn);
 251         }
 252         local_irq_restore(flags);
 253         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 254                 values = &locals->values[slot];
 255                 if (values->host != values->curr) {
 256                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 257                         values->curr = values->host;
 258                 }
 259         }
 260 }
 261
 262 static void shared_msr_update(unsigned slot, u32 msr)
 263 {
 264         u64 value;
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         /* only read, and nobody should modify it at this time,
 269          * so don't need lock */
 270         if (slot >= shared_msrs_global.nr) {
 271                 printk(KERN_ERR "kvm: invalid MSR slot!");
 272                 return;
 273         }
 274         rdmsrl_safe(msr, &value);
 275         smsr->values[slot].host = value;
 276         smsr->values[slot].curr = value;
 277 }
 278
 279 void kvm_define_shared_msr(unsigned slot, u32 msr)
 280 {
 281         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 282         shared_msrs_global.msrs[slot] = msr;
 283         if (slot >= shared_msrs_global.nr)
 284                 shared_msrs_global.nr = slot + 1;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 287
 288 static void kvm_shared_msr_cpu_online(void)
 289 {
 290         unsigned i;
 291
 292         for (i = 0; i < shared_msrs_global.nr; ++i)
 293                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 294 }
 295
 296 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300         int err;
 301
 302         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 303                 return 0;
 304         smsr->values[slot].curr = value;
 305         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 306         if (err)
 307                 return 1;
 308
 309         if (!smsr->registered) {
 310                 smsr->urn.on_user_return = kvm_on_user_return;
 311                 user_return_notifier_register(&smsr->urn);
 312                 smsr->registered = true;
 313         }
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 317
 318 static void drop_user_return_notifiers(void)
 319 {
 320         unsigned int cpu = smp_processor_id();
 321         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 322
 323         if (smsr->registered)
 324                 kvm_on_user_return(&smsr->urn);
 325 }
 326
 327 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 328 {
 329         return vcpu->arch.apic_base;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 332
 333 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 334 {
 335         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 338
 339 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 340 {
 341         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 342         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 343         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 344                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 345
 346         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 347                 return 1;
 348         if (!msr_info->host_initiated) {
 349                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 350                         return 1;
 351                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 352                         return 1;
 353         }
 354
 355         kvm_lapic_set_base(vcpu, msr_info->data);
 356         return 0;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 359
 360 asmlinkage __visible void kvm_spurious_fault(void)
 361 {
 362         /* Fault while not rebooting.  We want the trace. */
 363         if (!kvm_rebooting)
 364                 BUG();
 365 }
 366 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 367
 368 #define EXCPT_BENIGN            0
 369 #define EXCPT_CONTRIBUTORY      1
 370 #define EXCPT_PF                2
 371
 372 static int exception_class(int vector)
 373 {
 374         switch (vector) {
 375         case PF_VECTOR:
 376                 return EXCPT_PF;
 377         case DE_VECTOR:
 378         case TS_VECTOR:
 379         case NP_VECTOR:
 380         case SS_VECTOR:
 381         case GP_VECTOR:
 382                 return EXCPT_CONTRIBUTORY;
 383         default:
 384                 break;
 385         }
 386         return EXCPT_BENIGN;
 387 }
 388
 389 #define EXCPT_FAULT             0
 390 #define EXCPT_TRAP              1
 391 #define EXCPT_ABORT             2
 392 #define EXCPT_INTERRUPT         3
 393
 394 static int exception_type(int vector)
 395 {
 396         unsigned int mask;
 397
 398         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 399                 return EXCPT_INTERRUPT;
 400
 401         mask = 1 << vector;
 402
 403         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 404         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 405                 return EXCPT_TRAP;
 406
 407         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 408                 return EXCPT_ABORT;
 409
 410         /* Reserved exceptions will result in fault */
 411         return EXCPT_FAULT;
 412 }
 413
 414 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 415 {
 416         unsigned nr = vcpu->arch.exception.nr;
 417         bool has_payload = vcpu->arch.exception.has_payload;
 418         unsigned long payload = vcpu->arch.exception.payload;
 419
 420         if (!has_payload)
 421                 return;
 422
 423         switch (nr) {
 424         case DB_VECTOR:
 425                 /*
 426                  * "Certain debug exceptions may clear bit 0-3.  The
 427                  * remaining contents of the DR6 register are never
 428                  * cleared by the processor".
 429                  */
 430                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 431                 /*
 432                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 433                  */
 434                 vcpu->arch.dr6 |= DR6_RTM;
 435                 vcpu->arch.dr6 |= payload;
 436                 /*
 437                  * Bit 16 should be set in the payload whenever the #DB
 438                  * exception should clear DR6.RTM. This makes the payload
 439                  * compatible with the pending debug exceptions under VMX.
 440                  * Though not currently documented in the SDM, this also
 441                  * makes the payload compatible with the exit qualification
 442                  * for #DB exceptions under VMX.
 443                  */
 444                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 445                 break;
 446         case PF_VECTOR:
 447                 vcpu->arch.cr2 = payload;
 448                 break;
 449         }
 450
 451         vcpu->arch.exception.has_payload = false;
 452         vcpu->arch.exception.payload = 0;
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 455
 456 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 457                 unsigned nr, bool has_error, u32 error_code,
 458                 bool has_payload, unsigned long payload, bool reinject)
 459 {
 460         u32 prev_nr;
 461         int class1, class2;
 462
 463         kvm_make_request(KVM_REQ_EVENT, vcpu);
 464
 465         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 466         queue:
 467                 if (has_error && !is_protmode(vcpu))
 468                         has_error = false;
 469                 if (reinject) {
 470                         /*
 471                          * On vmentry, vcpu->arch.exception.pending is only
 472                          * true if an event injection was blocked by
 473                          * nested_run_pending.  In that case, however,
 474                          * vcpu_enter_guest requests an immediate exit,
 475                          * and the guest shouldn't proceed far enough to
 476                          * need reinjection.
 477                          */
 478                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 479                         vcpu->arch.exception.injected = true;
 480                         if (WARN_ON_ONCE(has_payload)) {
 481                                 /*
 482                                  * A reinjected event has already
 483                                  * delivered its payload.
 484                                  */
 485                                 has_payload = false;
 486                                 payload = 0;
 487                         }
 488                 } else {
 489                         vcpu->arch.exception.pending = true;
 490                         vcpu->arch.exception.injected = false;
 491                 }
 492                 vcpu->arch.exception.has_error_code = has_error;
 493                 vcpu->arch.exception.nr = nr;
 494                 vcpu->arch.exception.error_code = error_code;
 495                 vcpu->arch.exception.has_payload = has_payload;
 496                 vcpu->arch.exception.payload = payload;
 497                 /*
 498                  * In guest mode, payload delivery should be deferred,
 499                  * so that the L1 hypervisor can intercept #PF before
 500                  * CR2 is modified (or intercept #DB before DR6 is
 501                  * modified under nVMX).  However, for ABI
 502                  * compatibility with KVM_GET_VCPU_EVENTS and
 503                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 504                  * delivery unless userspace has enabled this
 505                  * functionality via the per-VM capability,
 506                  * KVM_CAP_EXCEPTION_PAYLOAD.
 507                  */
 508                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 509                     !is_guest_mode(vcpu))
 510                         kvm_deliver_exception_payload(vcpu);
 511                 return;
 512         }
 513
 514         /* to check exception */
 515         prev_nr = vcpu->arch.exception.nr;
 516         if (prev_nr == DF_VECTOR) {
 517                 /* triple fault -> shutdown */
 518                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 519                 return;
 520         }
 521         class1 = exception_class(prev_nr);
 522         class2 = exception_class(nr);
 523         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 524                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 525                 /*
 526                  * Generate double fault per SDM Table 5-5.  Set
 527                  * exception.pending = true so that the double fault
 528                  * can trigger a nested vmexit.
 529                  */
 530                 vcpu->arch.exception.pending = true;
 531                 vcpu->arch.exception.injected = false;
 532                 vcpu->arch.exception.has_error_code = true;
 533                 vcpu->arch.exception.nr = DF_VECTOR;
 534                 vcpu->arch.exception.error_code = 0;
 535                 vcpu->arch.exception.has_payload = false;
 536                 vcpu->arch.exception.payload = 0;
 537         } else
 538                 /* replace previous exception with a new one in a hope
 539                    that instruction re-execution will regenerate lost
 540                    exception */
 541                 goto queue;
 542 }
 543
 544 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 545 {
 546         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 547 }
 548 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 549
 550 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 551 {
 552         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 553 }
 554 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 555
 556 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 557                                   unsigned long payload)
 558 {
 559         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 560 }
 561
 562 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 563                                     u32 error_code, unsigned long payload)
 564 {
 565         kvm_multiple_exception(vcpu, nr, true, error_code,
 566                                true, payload, false);
 567 }
 568
 569 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 570 {
 571         if (err)
 572                 kvm_inject_gp(vcpu, 0);
 573         else
 574                 return kvm_skip_emulated_instruction(vcpu);
 575
 576         return 1;
 577 }
 578 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 579
 580 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 581 {
 582         ++vcpu->stat.pf_guest;
 583         vcpu->arch.exception.nested_apf =
 584                 is_guest_mode(vcpu) && fault->async_page_fault;
 585         if (vcpu->arch.exception.nested_apf) {
 586                 vcpu->arch.apf.nested_apf_token = fault->address;
 587                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 588         } else {
 589                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 590                                         fault->address);
 591         }
 592 }
 593 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 594
 595 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 596 {
 597         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 598                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 599         else
 600                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 601
 602         return fault->nested_page_fault;
 603 }
 604
 605 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 606 {
 607         atomic_inc(&vcpu->arch.nmi_queued);
 608         kvm_make_request(KVM_REQ_NMI, vcpu);
 609 }
 610 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 611
 612 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 613 {
 614         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 615 }
 616 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 617
 618 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 619 {
 620         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 621 }
 622 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 623
 624 /*
 625  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 626  * a #GP and return false.
 627  */
 628 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 629 {
 630         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 631                 return true;
 632         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 633         return false;
 634 }
 635 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 636
 637 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 638 {
 639         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 640                 return true;
 641
 642         kvm_queue_exception(vcpu, UD_VECTOR);
 643         return false;
 644 }
 645 EXPORT_SYMBOL_GPL(kvm_require_dr);
 646
 647 /*
 648  * This function will be used to read from the physical memory of the currently
 649  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 650  * can read from guest physical or from the guest's guest physical memory.
 651  */
 652 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 653                             gfn_t ngfn, void *data, int offset, int len,
 654                             u32 access)
 655 {
 656         struct x86_exception exception;
 657         gfn_t real_gfn;
 658         gpa_t ngpa;
 659
 660         ngpa     = gfn_to_gpa(ngfn);
 661         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 662         if (real_gfn == UNMAPPED_GVA)
 663                 return -EFAULT;
 664
 665         real_gfn = gpa_to_gfn(real_gfn);
 666
 667         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 668 }
 669 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 670
 671 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 672                                void *data, int offset, int len, u32 access)
 673 {
 674         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 675                                        data, offset, len, access);
 676 }
 677
 678 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 679 {
 680         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 681                rsvd_bits(1, 2);
 682 }
 683
 684 /*
 685  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 686  */
 687 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 688 {
 689         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 690         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 691         int i;
 692         int ret;
 693         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 694
 695         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 696                                       offset * sizeof(u64), sizeof(pdpte),
 697                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 698         if (ret < 0) {
 699                 ret = 0;
 700                 goto out;
 701         }
 702         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 703                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 704                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 705                         ret = 0;
 706                         goto out;
 707                 }
 708         }
 709         ret = 1;
 710
 711         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 712         __set_bit(VCPU_EXREG_PDPTR,
 713                   (unsigned long *)&vcpu->arch.regs_avail);
 714         __set_bit(VCPU_EXREG_PDPTR,
 715                   (unsigned long *)&vcpu->arch.regs_dirty);
 716 out:
 717
 718         return ret;
 719 }
 720 EXPORT_SYMBOL_GPL(load_pdptrs);
 721
 722 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 723 {
 724         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 725         bool changed = true;
 726         int offset;
 727         gfn_t gfn;
 728         int r;
 729
 730         if (!is_pae_paging(vcpu))
 731                 return false;
 732
 733         if (!test_bit(VCPU_EXREG_PDPTR,
 734                       (unsigned long *)&vcpu->arch.regs_avail))
 735                 return true;
 736
 737         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 738         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 739         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 740                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 741         if (r < 0)
 742                 goto out;
 743         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 744 out:
 745
 746         return changed;
 747 }
 748 EXPORT_SYMBOL_GPL(pdptrs_changed);
 749
 750 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 751 {
 752         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 753         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 754
 755         cr0 |= X86_CR0_ET;
 756
 757 #ifdef CONFIG_X86_64
 758         if (cr0 & 0xffffffff00000000UL)
 759                 return 1;
 760 #endif
 761
 762         cr0 &= ~CR0_RESERVED_BITS;
 763
 764         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 765                 return 1;
 766
 767         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 768                 return 1;
 769
 770         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 771 #ifdef CONFIG_X86_64
 772                 if ((vcpu->arch.efer & EFER_LME)) {
 773                         int cs_db, cs_l;
 774
 775                         if (!is_pae(vcpu))
 776                                 return 1;
 777                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 778                         if (cs_l)
 779                                 return 1;
 780                 } else
 781 #endif
 782                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 783                                                  kvm_read_cr3(vcpu)))
 784                         return 1;
 785         }
 786
 787         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 788                 return 1;
 789
 790         kvm_x86_ops->set_cr0(vcpu, cr0);
 791
 792         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 793                 kvm_clear_async_pf_completion_queue(vcpu);
 794                 kvm_async_pf_hash_reset(vcpu);
 795         }
 796
 797         if ((cr0 ^ old_cr0) & update_bits)
 798                 kvm_mmu_reset_context(vcpu);
 799
 800         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 801             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 802             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 803                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 804
 805         return 0;
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 808
 809 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 810 {
 811         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 812 }
 813 EXPORT_SYMBOL_GPL(kvm_lmsw);
 814
 815 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 816 {
 817         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 818                         !vcpu->guest_xcr0_loaded) {
 819                 /* kvm_set_xcr() also depends on this */
 820                 if (vcpu->arch.xcr0 != host_xcr0)
 821                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 822                 vcpu->guest_xcr0_loaded = 1;
 823         }
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 826
 827 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 828 {
 829         if (vcpu->guest_xcr0_loaded) {
 830                 if (vcpu->arch.xcr0 != host_xcr0)
 831                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 832                 vcpu->guest_xcr0_loaded = 0;
 833         }
 834 }
 835 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 836
 837 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 838 {
 839         u64 xcr0 = xcr;
 840         u64 old_xcr0 = vcpu->arch.xcr0;
 841         u64 valid_bits;
 842
 843         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 844         if (index != XCR_XFEATURE_ENABLED_MASK)
 845                 return 1;
 846         if (!(xcr0 & XFEATURE_MASK_FP))
 847                 return 1;
 848         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 849                 return 1;
 850
 851         /*
 852          * Do not allow the guest to set bits that we do not support
 853          * saving.  However, xcr0 bit 0 is always set, even if the
 854          * emulated CPU does not support XSAVE (see fx_init).
 855          */
 856         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 857         if (xcr0 & ~valid_bits)
 858                 return 1;
 859
 860         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 861             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 862                 return 1;
 863
 864         if (xcr0 & XFEATURE_MASK_AVX512) {
 865                 if (!(xcr0 & XFEATURE_MASK_YMM))
 866                         return 1;
 867                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 868                         return 1;
 869         }
 870         vcpu->arch.xcr0 = xcr0;
 871
 872         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 873                 kvm_update_cpuid(vcpu);
 874         return 0;
 875 }
 876
 877 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 878 {
 879         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 880             __kvm_set_xcr(vcpu, index, xcr)) {
 881                 kvm_inject_gp(vcpu, 0);
 882                 return 1;
 883         }
 884         return 0;
 885 }
 886 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 887
 888 static int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 889 {
 890         if (cr4 & CR4_RESERVED_BITS)
 891                 return -EINVAL;
 892
 893         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 894                 return -EINVAL;
 895
 896         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 897                 return -EINVAL;
 898
 899         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 900                 return -EINVAL;
 901
 902         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 903                 return -EINVAL;
 904
 905         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 906                 return -EINVAL;
 907
 908         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 909                 return -EINVAL;
 910
 911         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 912                 return -EINVAL;
 913
 914         return 0;
 915 }
 916
 917 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 918 {
 919         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 920         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 921                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 922
 923         if (kvm_valid_cr4(vcpu, cr4))
 924                 return 1;
 925
 926         if (is_long_mode(vcpu)) {
 927                 if (!(cr4 & X86_CR4_PAE))
 928                         return 1;
 929         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 930                    && ((cr4 ^ old_cr4) & pdptr_bits)
 931                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 932                                    kvm_read_cr3(vcpu)))
 933                 return 1;
 934
 935         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 936                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 937                         return 1;
 938
 939                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 940                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 941                         return 1;
 942         }
 943
 944         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 945                 return 1;
 946
 947         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 948             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 949                 kvm_mmu_reset_context(vcpu);
 950
 951         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 952                 kvm_update_cpuid(vcpu);
 953
 954         return 0;
 955 }
 956 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 957
 958 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 959 {
 960         bool skip_tlb_flush = false;
 961 #ifdef CONFIG_X86_64
 962         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 963
 964         if (pcid_enabled) {
 965                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 966                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 967         }
 968 #endif
 969
 970         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 971                 if (!skip_tlb_flush) {
 972                         kvm_mmu_sync_roots(vcpu);
 973                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 974                 }
 975                 return 0;
 976         }
 977
 978         if (is_long_mode(vcpu) &&
 979             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 980                 return 1;
 981         else if (is_pae_paging(vcpu) &&
 982                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 983                 return 1;
 984
 985         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 986         vcpu->arch.cr3 = cr3;
 987         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 988
 989         return 0;
 990 }
 991 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 992
 993 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 994 {
 995         if (cr8 & CR8_RESERVED_BITS)
 996                 return 1;
 997         if (lapic_in_kernel(vcpu))
 998                 kvm_lapic_set_tpr(vcpu, cr8);
 999         else
1000                 vcpu->arch.cr8 = cr8;
1001         return 0;
1002 }
1003 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1004
1005 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1006 {
1007         if (lapic_in_kernel(vcpu))
1008                 return kvm_lapic_get_cr8(vcpu);
1009         else
1010                 return vcpu->arch.cr8;
1011 }
1012 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1013
1014 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1015 {
1016         int i;
1017
1018         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1019                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1020                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1021                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1022         }
1023 }
1024
1025 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1026 {
1027         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1028                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1029 }
1030
1031 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1032 {
1033         unsigned long dr7;
1034
1035         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1036                 dr7 = vcpu->arch.guest_debug_dr7;
1037         else
1038                 dr7 = vcpu->arch.dr7;
1039         kvm_x86_ops->set_dr7(vcpu, dr7);
1040         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1041         if (dr7 & DR7_BP_EN_MASK)
1042                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1043 }
1044
1045 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1046 {
1047         u64 fixed = DR6_FIXED_1;
1048
1049         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1050                 fixed |= DR6_RTM;
1051         return fixed;
1052 }
1053
1054 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1055 {
1056         switch (dr) {
1057         case 0 ... 3:
1058                 vcpu->arch.db[dr] = val;
1059                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1060                         vcpu->arch.eff_db[dr] = val;
1061                 break;
1062         case 4:
1063                 /* fall through */
1064         case 6:
1065                 if (val & 0xffffffff00000000ULL)
1066                         return -1; /* #GP */
1067                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1068                 kvm_update_dr6(vcpu);
1069                 break;
1070         case 5:
1071                 /* fall through */
1072         default: /* 7 */
1073                 if (val & 0xffffffff00000000ULL)
1074                         return -1; /* #GP */
1075                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1076                 kvm_update_dr7(vcpu);
1077                 break;
1078         }
1079
1080         return 0;
1081 }
1082
1083 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1084 {
1085         if (__kvm_set_dr(vcpu, dr, val)) {
1086                 kvm_inject_gp(vcpu, 0);
1087                 return 1;
1088         }
1089         return 0;
1090 }
1091 EXPORT_SYMBOL_GPL(kvm_set_dr);
1092
1093 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1094 {
1095         switch (dr) {
1096         case 0 ... 3:
1097                 *val = vcpu->arch.db[dr];
1098                 break;
1099         case 4:
1100                 /* fall through */
1101         case 6:
1102                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1103                         *val = vcpu->arch.dr6;
1104                 else
1105                         *val = kvm_x86_ops->get_dr6(vcpu);
1106                 break;
1107         case 5:
1108                 /* fall through */
1109         default: /* 7 */
1110                 *val = vcpu->arch.dr7;
1111                 break;
1112         }
1113         return 0;
1114 }
1115 EXPORT_SYMBOL_GPL(kvm_get_dr);
1116
1117 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1118 {
1119         u32 ecx = kvm_rcx_read(vcpu);
1120         u64 data;
1121         int err;
1122
1123         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1124         if (err)
1125                 return err;
1126         kvm_rax_write(vcpu, (u32)data);
1127         kvm_rdx_write(vcpu, data >> 32);
1128         return err;
1129 }
1130 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1131
1132 /*
1133  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1134  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1135  *
1136  * This list is modified at module load time to reflect the
1137  * capabilities of the host cpu. This capabilities test skips MSRs that are
1138  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1139  * may depend on host virtualization features rather than host cpu features.
1140  */
1141
1142 static u32 msrs_to_save[] = {
1143         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1144         MSR_STAR,
1145 #ifdef CONFIG_X86_64
1146         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1147 #endif
1148         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1149         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1150         MSR_IA32_SPEC_CTRL,
1151         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1152         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1153         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1154         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1155         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1156         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1157         MSR_IA32_UMWAIT_CONTROL,
1158
1159         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1160         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1161         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1162         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1163         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1164         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1165         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1166         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1167         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1168         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1169         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1170         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1171         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1172         MSR_ARCH_PERFMON_PERFCTR0 + 18, MSR_ARCH_PERFMON_PERFCTR0 + 19,
1173         MSR_ARCH_PERFMON_PERFCTR0 + 20, MSR_ARCH_PERFMON_PERFCTR0 + 21,
1174         MSR_ARCH_PERFMON_PERFCTR0 + 22, MSR_ARCH_PERFMON_PERFCTR0 + 23,
1175         MSR_ARCH_PERFMON_PERFCTR0 + 24, MSR_ARCH_PERFMON_PERFCTR0 + 25,
1176         MSR_ARCH_PERFMON_PERFCTR0 + 26, MSR_ARCH_PERFMON_PERFCTR0 + 27,
1177         MSR_ARCH_PERFMON_PERFCTR0 + 28, MSR_ARCH_PERFMON_PERFCTR0 + 29,
1178         MSR_ARCH_PERFMON_PERFCTR0 + 30, MSR_ARCH_PERFMON_PERFCTR0 + 31,
1179         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1180         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1181         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1182         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1183         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1184         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1185         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1186         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1187         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1188         MSR_ARCH_PERFMON_EVENTSEL0 + 18, MSR_ARCH_PERFMON_EVENTSEL0 + 19,
1189         MSR_ARCH_PERFMON_EVENTSEL0 + 20, MSR_ARCH_PERFMON_EVENTSEL0 + 21,
1190         MSR_ARCH_PERFMON_EVENTSEL0 + 22, MSR_ARCH_PERFMON_EVENTSEL0 + 23,
1191         MSR_ARCH_PERFMON_EVENTSEL0 + 24, MSR_ARCH_PERFMON_EVENTSEL0 + 25,
1192         MSR_ARCH_PERFMON_EVENTSEL0 + 26, MSR_ARCH_PERFMON_EVENTSEL0 + 27,
1193         MSR_ARCH_PERFMON_EVENTSEL0 + 28, MSR_ARCH_PERFMON_EVENTSEL0 + 29,
1194         MSR_ARCH_PERFMON_EVENTSEL0 + 30, MSR_ARCH_PERFMON_EVENTSEL0 + 31,
1195 };
1196
1197 static unsigned num_msrs_to_save;
1198
1199 static u32 emulated_msrs[] = {
1200         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1201         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1202         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1203         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1204         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1205         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1206         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1207         HV_X64_MSR_RESET,
1208         HV_X64_MSR_VP_INDEX,
1209         HV_X64_MSR_VP_RUNTIME,
1210         HV_X64_MSR_SCONTROL,
1211         HV_X64_MSR_STIMER0_CONFIG,
1212         HV_X64_MSR_VP_ASSIST_PAGE,
1213         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1214         HV_X64_MSR_TSC_EMULATION_STATUS,
1215
1216         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1217         MSR_KVM_PV_EOI_EN,
1218
1219         MSR_IA32_TSC_ADJUST,
1220         MSR_IA32_TSCDEADLINE,
1221         MSR_IA32_ARCH_CAPABILITIES,
1222         MSR_IA32_MISC_ENABLE,
1223         MSR_IA32_MCG_STATUS,
1224         MSR_IA32_MCG_CTL,
1225         MSR_IA32_MCG_EXT_CTL,
1226         MSR_IA32_SMBASE,
1227         MSR_SMI_COUNT,
1228         MSR_PLATFORM_INFO,
1229         MSR_MISC_FEATURES_ENABLES,
1230         MSR_AMD64_VIRT_SPEC_CTRL,
1231         MSR_IA32_POWER_CTL,
1232
1233         /*
1234          * The following list leaves out MSRs whose values are determined
1235          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1236          * We always support the "true" VMX control MSRs, even if the host
1237          * processor does not, so I am putting these registers here rather
1238          * than in msrs_to_save.
1239          */
1240         MSR_IA32_VMX_BASIC,
1241         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1242         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1243         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1244         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1245         MSR_IA32_VMX_MISC,
1246         MSR_IA32_VMX_CR0_FIXED0,
1247         MSR_IA32_VMX_CR4_FIXED0,
1248         MSR_IA32_VMX_VMCS_ENUM,
1249         MSR_IA32_VMX_PROCBASED_CTLS2,
1250         MSR_IA32_VMX_EPT_VPID_CAP,
1251         MSR_IA32_VMX_VMFUNC,
1252
1253         MSR_K7_HWCR,
1254         MSR_KVM_POLL_CONTROL,
1255 };
1256
1257 static unsigned num_emulated_msrs;
1258
1259 /*
1260  * List of msr numbers which are used to expose MSR-based features that
1261  * can be used by a hypervisor to validate requested CPU features.
1262  */
1263 static u32 msr_based_features[] = {
1264         MSR_IA32_VMX_BASIC,
1265         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1266         MSR_IA32_VMX_PINBASED_CTLS,
1267         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1268         MSR_IA32_VMX_PROCBASED_CTLS,
1269         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1270         MSR_IA32_VMX_EXIT_CTLS,
1271         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1272         MSR_IA32_VMX_ENTRY_CTLS,
1273         MSR_IA32_VMX_MISC,
1274         MSR_IA32_VMX_CR0_FIXED0,
1275         MSR_IA32_VMX_CR0_FIXED1,
1276         MSR_IA32_VMX_CR4_FIXED0,
1277         MSR_IA32_VMX_CR4_FIXED1,
1278         MSR_IA32_VMX_VMCS_ENUM,
1279         MSR_IA32_VMX_PROCBASED_CTLS2,
1280         MSR_IA32_VMX_EPT_VPID_CAP,
1281         MSR_IA32_VMX_VMFUNC,
1282
1283         MSR_F10H_DECFG,
1284         MSR_IA32_UCODE_REV,
1285         MSR_IA32_ARCH_CAPABILITIES,
1286 };
1287
1288 static unsigned int num_msr_based_features;
1289
1290 static u64 kvm_get_arch_capabilities(void)
1291 {
1292         u64 data = 0;
1293
1294         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1295                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1296
1297         /*
1298          * If we're doing cache flushes (either "always" or "cond")
1299          * we will do one whenever the guest does a vmlaunch/vmresume.
1300          * If an outer hypervisor is doing the cache flush for us
1301          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1302          * capability to the guest too, and if EPT is disabled we're not
1303          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1304          * require a nested hypervisor to do a flush of its own.
1305          */
1306         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1307                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1308
1309         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1310                 data |= ARCH_CAP_RDCL_NO;
1311         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1312                 data |= ARCH_CAP_SSB_NO;
1313         if (!boot_cpu_has_bug(X86_BUG_MDS))
1314                 data |= ARCH_CAP_MDS_NO;
1315
1316         return data;
1317 }
1318
1319 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1320 {
1321         switch (msr->index) {
1322         case MSR_IA32_ARCH_CAPABILITIES:
1323                 msr->data = kvm_get_arch_capabilities();
1324                 break;
1325         case MSR_IA32_UCODE_REV:
1326                 rdmsrl_safe(msr->index, &msr->data);
1327                 break;
1328         default:
1329                 if (kvm_x86_ops->get_msr_feature(msr))
1330                         return 1;
1331         }
1332         return 0;
1333 }
1334
1335 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1336 {
1337         struct kvm_msr_entry msr;
1338         int r;
1339
1340         msr.index = index;
1341         r = kvm_get_msr_feature(&msr);
1342         if (r)
1343                 return r;
1344
1345         *data = msr.data;
1346
1347         return 0;
1348 }
1349
1350 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1351 {
1352         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1353                 return false;
1354
1355         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1356                 return false;
1357
1358         if (efer & (EFER_LME | EFER_LMA) &&
1359             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1360                 return false;
1361
1362         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1363                 return false;
1364
1365         return true;
1366
1367 }
1368 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1369 {
1370         if (efer & efer_reserved_bits)
1371                 return false;
1372
1373         return __kvm_valid_efer(vcpu, efer);
1374 }
1375 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1376
1377 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1378 {
1379         u64 old_efer = vcpu->arch.efer;
1380         u64 efer = msr_info->data;
1381
1382         if (efer & efer_reserved_bits)
1383                 return 1;
1384
1385         if (!msr_info->host_initiated) {
1386                 if (!__kvm_valid_efer(vcpu, efer))
1387                         return 1;
1388
1389                 if (is_paging(vcpu) &&
1390                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1391                         return 1;
1392         }
1393
1394         efer &= ~EFER_LMA;
1395         efer |= vcpu->arch.efer & EFER_LMA;
1396
1397         kvm_x86_ops->set_efer(vcpu, efer);
1398
1399         /* Update reserved bits */
1400         if ((efer ^ old_efer) & EFER_NX)
1401                 kvm_mmu_reset_context(vcpu);
1402
1403         return 0;
1404 }
1405
1406 void kvm_enable_efer_bits(u64 mask)
1407 {
1408        efer_reserved_bits &= ~mask;
1409 }
1410 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1411
1412 /*
1413  * Write @data into the MSR specified by @index.  Select MSR specific fault
1414  * checks are bypassed if @host_initiated is %true.
1415  * Returns 0 on success, non-0 otherwise.
1416  * Assumes vcpu_load() was already called.
1417  */
1418 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1419                          bool host_initiated)
1420 {
1421         struct msr_data msr;
1422
1423         switch (index) {
1424         case MSR_FS_BASE:
1425         case MSR_GS_BASE:
1426         case MSR_KERNEL_GS_BASE:
1427         case MSR_CSTAR:
1428         case MSR_LSTAR:
1429                 if (is_noncanonical_address(data, vcpu))
1430                         return 1;
1431                 break;
1432         case MSR_IA32_SYSENTER_EIP:
1433         case MSR_IA32_SYSENTER_ESP:
1434                 /*
1435                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1436                  * non-canonical address is written on Intel but not on
1437                  * AMD (which ignores the top 32-bits, because it does
1438                  * not implement 64-bit SYSENTER).
1439                  *
1440                  * 64-bit code should hence be able to write a non-canonical
1441                  * value on AMD.  Making the address canonical ensures that
1442                  * vmentry does not fail on Intel after writing a non-canonical
1443                  * value, and that something deterministic happens if the guest
1444                  * invokes 64-bit SYSENTER.
1445                  */
1446                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1447         }
1448
1449         msr.data = data;
1450         msr.index = index;
1451         msr.host_initiated = host_initiated;
1452
1453         return kvm_x86_ops->set_msr(vcpu, &msr);
1454 }
1455
1456 /*
1457  * Read the MSR specified by @index into @data.  Select MSR specific fault
1458  * checks are bypassed if @host_initiated is %true.
1459  * Returns 0 on success, non-0 otherwise.
1460  * Assumes vcpu_load() was already called.
1461  */
1462 static int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1463                          bool host_initiated)
1464 {
1465         struct msr_data msr;
1466         int ret;
1467
1468         msr.index = index;
1469         msr.host_initiated = host_initiated;
1470
1471         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1472         if (!ret)
1473                 *data = msr.data;
1474         return ret;
1475 }
1476
1477 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1478 {
1479         return __kvm_get_msr(vcpu, index, data, false);
1480 }
1481 EXPORT_SYMBOL_GPL(kvm_get_msr);
1482
1483 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1484 {
1485         return __kvm_set_msr(vcpu, index, data, false);
1486 }
1487 EXPORT_SYMBOL_GPL(kvm_set_msr);
1488
1489 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1490 {
1491         u32 ecx = kvm_rcx_read(vcpu);
1492         u64 data;
1493
1494         if (kvm_get_msr(vcpu, ecx, &data)) {
1495                 trace_kvm_msr_read_ex(ecx);
1496                 kvm_inject_gp(vcpu, 0);
1497                 return 1;
1498         }
1499
1500         trace_kvm_msr_read(ecx, data);
1501
1502         kvm_rax_write(vcpu, data & -1u);
1503         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1504         return kvm_skip_emulated_instruction(vcpu);
1505 }
1506 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1507
1508 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1509 {
1510         u32 ecx = kvm_rcx_read(vcpu);
1511         u64 data = kvm_read_edx_eax(vcpu);
1512
1513         if (kvm_set_msr(vcpu, ecx, data)) {
1514                 trace_kvm_msr_write_ex(ecx, data);
1515                 kvm_inject_gp(vcpu, 0);
1516                 return 1;
1517         }
1518
1519         trace_kvm_msr_write(ecx, data);
1520         return kvm_skip_emulated_instruction(vcpu);
1521 }
1522 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1523
1524 /*
1525  * Adapt set_msr() to msr_io()'s calling convention
1526  */
1527 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1528 {
1529         return __kvm_get_msr(vcpu, index, data, true);
1530 }
1531
1532 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1533 {
1534         return __kvm_set_msr(vcpu, index, *data, true);
1535 }
1536
1537 #ifdef CONFIG_X86_64
1538 struct pvclock_gtod_data {
1539         seqcount_t      seq;
1540
1541         struct { /* extract of a clocksource struct */
1542                 int vclock_mode;
1543                 u64     cycle_last;
1544                 u64     mask;
1545                 u32     mult;
1546                 u32     shift;
1547         } clock;
1548
1549         u64             boot_ns;
1550         u64             nsec_base;
1551         u64             wall_time_sec;
1552 };
1553
1554 static struct pvclock_gtod_data pvclock_gtod_data;
1555
1556 static void update_pvclock_gtod(struct timekeeper *tk)
1557 {
1558         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1559         u64 boot_ns;
1560
1561         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1562
1563         write_seqcount_begin(&vdata->seq);
1564
1565         /* copy pvclock gtod data */
1566         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1567         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1568         vdata->clock.mask               = tk->tkr_mono.mask;
1569         vdata->clock.mult               = tk->tkr_mono.mult;
1570         vdata->clock.shift              = tk->tkr_mono.shift;
1571
1572         vdata->boot_ns                  = boot_ns;
1573         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1574
1575         vdata->wall_time_sec            = tk->xtime_sec;
1576
1577         write_seqcount_end(&vdata->seq);
1578 }
1579 #endif
1580
1581 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1582 {
1583         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1584         kvm_vcpu_kick(vcpu);
1585 }
1586
1587 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1588 {
1589         int version;
1590         int r;
1591         struct pvclock_wall_clock wc;
1592         struct timespec64 boot;
1593
1594         if (!wall_clock)
1595                 return;
1596
1597         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1598         if (r)
1599                 return;
1600
1601         if (version & 1)
1602                 ++version;  /* first time write, random junk */
1603
1604         ++version;
1605
1606         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1607                 return;
1608
1609         /*
1610          * The guest calculates current wall clock time by adding
1611          * system time (updated by kvm_guest_time_update below) to the
1612          * wall clock specified here.  guest system time equals host
1613          * system time for us, thus we must fill in host boot time here.
1614          */
1615         getboottime64(&boot);
1616
1617         if (kvm->arch.kvmclock_offset) {
1618                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1619                 boot = timespec64_sub(boot, ts);
1620         }
1621         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1622         wc.nsec = boot.tv_nsec;
1623         wc.version = version;
1624
1625         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1626
1627         version++;
1628         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1629 }
1630
1631 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1632 {
1633         do_shl32_div32(dividend, divisor);
1634         return dividend;
1635 }
1636
1637 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1638                                s8 *pshift, u32 *pmultiplier)
1639 {
1640         uint64_t scaled64;
1641         int32_t  shift = 0;
1642         uint64_t tps64;
1643         uint32_t tps32;
1644
1645         tps64 = base_hz;
1646         scaled64 = scaled_hz;
1647         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1648                 tps64 >>= 1;
1649                 shift--;
1650         }
1651
1652         tps32 = (uint32_t)tps64;
1653         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1654                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1655                         scaled64 >>= 1;
1656                 else
1657                         tps32 <<= 1;
1658                 shift++;
1659         }
1660
1661         *pshift = shift;
1662         *pmultiplier = div_frac(scaled64, tps32);
1663 }
1664
1665 #ifdef CONFIG_X86_64
1666 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1667 #endif
1668
1669 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1670 static unsigned long max_tsc_khz;
1671
1672 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1673 {
1674         u64 v = (u64)khz * (1000000 + ppm);
1675         do_div(v, 1000000);
1676         return v;
1677 }
1678
1679 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1680 {
1681         u64 ratio;
1682
1683         /* Guest TSC same frequency as host TSC? */
1684         if (!scale) {
1685                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1686                 return 0;
1687         }
1688
1689         /* TSC scaling supported? */
1690         if (!kvm_has_tsc_control) {
1691                 if (user_tsc_khz > tsc_khz) {
1692                         vcpu->arch.tsc_catchup = 1;
1693                         vcpu->arch.tsc_always_catchup = 1;
1694                         return 0;
1695                 } else {
1696                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1697                         return -1;
1698                 }
1699         }
1700
1701         /* TSC scaling required  - calculate ratio */
1702         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1703                                 user_tsc_khz, tsc_khz);
1704
1705         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1706                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1707                                     user_tsc_khz);
1708                 return -1;
1709         }
1710
1711         vcpu->arch.tsc_scaling_ratio = ratio;
1712         return 0;
1713 }
1714
1715 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1716 {
1717         u32 thresh_lo, thresh_hi;
1718         int use_scaling = 0;
1719
1720         /* tsc_khz can be zero if TSC calibration fails */
1721         if (user_tsc_khz == 0) {
1722                 /* set tsc_scaling_ratio to a safe value */
1723                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1724                 return -1;
1725         }
1726
1727         /* Compute a scale to convert nanoseconds in TSC cycles */
1728         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1729                            &vcpu->arch.virtual_tsc_shift,
1730                            &vcpu->arch.virtual_tsc_mult);
1731         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1732
1733         /*
1734          * Compute the variation in TSC rate which is acceptable
1735          * within the range of tolerance and decide if the
1736          * rate being applied is within that bounds of the hardware
1737          * rate.  If so, no scaling or compensation need be done.
1738          */
1739         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1740         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1741         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1742                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1743                 use_scaling = 1;
1744         }
1745         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1746 }
1747
1748 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1749 {
1750         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1751                                       vcpu->arch.virtual_tsc_mult,
1752                                       vcpu->arch.virtual_tsc_shift);
1753         tsc += vcpu->arch.this_tsc_write;
1754         return tsc;
1755 }
1756
1757 static inline int gtod_is_based_on_tsc(int mode)
1758 {
1759         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1760 }
1761
1762 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1763 {
1764 #ifdef CONFIG_X86_64
1765         bool vcpus_matched;
1766         struct kvm_arch *ka = &vcpu->kvm->arch;
1767         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1768
1769         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1770                          atomic_read(&vcpu->kvm->online_vcpus));
1771
1772         /*
1773          * Once the masterclock is enabled, always perform request in
1774          * order to update it.
1775          *
1776          * In order to enable masterclock, the host clocksource must be TSC
1777          * and the vcpus need to have matched TSCs.  When that happens,
1778          * perform request to enable masterclock.
1779          */
1780         if (ka->use_master_clock ||
1781             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1782                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1783
1784         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1785                             atomic_read(&vcpu->kvm->online_vcpus),
1786                             ka->use_master_clock, gtod->clock.vclock_mode);
1787 #endif
1788 }
1789
1790 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1791 {
1792         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1793         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1794 }
1795
1796 /*
1797  * Multiply tsc by a fixed point number represented by ratio.
1798  *
1799  * The most significant 64-N bits (mult) of ratio represent the
1800  * integral part of the fixed point number; the remaining N bits
1801  * (frac) represent the fractional part, ie. ratio represents a fixed
1802  * point number (mult + frac * 2^(-N)).
1803  *
1804  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1805  */
1806 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1807 {
1808         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1809 }
1810
1811 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1812 {
1813         u64 _tsc = tsc;
1814         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1815
1816         if (ratio != kvm_default_tsc_scaling_ratio)
1817                 _tsc = __scale_tsc(ratio, tsc);
1818
1819         return _tsc;
1820 }
1821 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1822
1823 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1824 {
1825         u64 tsc;
1826
1827         tsc = kvm_scale_tsc(vcpu, rdtsc());
1828
1829         return target_tsc - tsc;
1830 }
1831
1832 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1833 {
1834         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1835
1836         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1837 }
1838 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1839
1840 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1841 {
1842         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1843 }
1844
1845 static inline bool kvm_check_tsc_unstable(void)
1846 {
1847 #ifdef CONFIG_X86_64
1848         /*
1849          * TSC is marked unstable when we're running on Hyper-V,
1850          * 'TSC page' clocksource is good.
1851          */
1852         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1853                 return false;
1854 #endif
1855         return check_tsc_unstable();
1856 }
1857
1858 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1859 {
1860         struct kvm *kvm = vcpu->kvm;
1861         u64 offset, ns, elapsed;
1862         unsigned long flags;
1863         bool matched;
1864         bool already_matched;
1865         u64 data = msr->data;
1866         bool synchronizing = false;
1867
1868         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1869         offset = kvm_compute_tsc_offset(vcpu, data);
1870         ns = ktime_get_boottime_ns();
1871         elapsed = ns - kvm->arch.last_tsc_nsec;
1872
1873         if (vcpu->arch.virtual_tsc_khz) {
1874                 if (data == 0 && msr->host_initiated) {
1875                         /*
1876                          * detection of vcpu initialization -- need to sync
1877                          * with other vCPUs. This particularly helps to keep
1878                          * kvm_clock stable after CPU hotplug
1879                          */
1880                         synchronizing = true;
1881                 } else {
1882                         u64 tsc_exp = kvm->arch.last_tsc_write +
1883                                                 nsec_to_cycles(vcpu, elapsed);
1884                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1885                         /*
1886                          * Special case: TSC write with a small delta (1 second)
1887                          * of virtual cycle time against real time is
1888                          * interpreted as an attempt to synchronize the CPU.
1889                          */
1890                         synchronizing = data < tsc_exp + tsc_hz &&
1891                                         data + tsc_hz > tsc_exp;
1892                 }
1893         }
1894
1895         /*
1896          * For a reliable TSC, we can match TSC offsets, and for an unstable
1897          * TSC, we add elapsed time in this computation.  We could let the
1898          * compensation code attempt to catch up if we fall behind, but
1899          * it's better to try to match offsets from the beginning.
1900          */
1901         if (synchronizing &&
1902             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1903                 if (!kvm_check_tsc_unstable()) {
1904                         offset = kvm->arch.cur_tsc_offset;
1905                 } else {
1906                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1907                         data += delta;
1908                         offset = kvm_compute_tsc_offset(vcpu, data);
1909                 }
1910                 matched = true;
1911                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1912         } else {
1913                 /*
1914                  * We split periods of matched TSC writes into generations.
1915                  * For each generation, we track the original measured
1916                  * nanosecond time, offset, and write, so if TSCs are in
1917                  * sync, we can match exact offset, and if not, we can match
1918                  * exact software computation in compute_guest_tsc()
1919                  *
1920                  * These values are tracked in kvm->arch.cur_xxx variables.
1921                  */
1922                 kvm->arch.cur_tsc_generation++;
1923                 kvm->arch.cur_tsc_nsec = ns;
1924                 kvm->arch.cur_tsc_write = data;
1925                 kvm->arch.cur_tsc_offset = offset;
1926                 matched = false;
1927         }
1928
1929         /*
1930          * We also track th most recent recorded KHZ, write and time to
1931          * allow the matching interval to be extended at each write.
1932          */
1933         kvm->arch.last_tsc_nsec = ns;
1934         kvm->arch.last_tsc_write = data;
1935         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1936
1937         vcpu->arch.last_guest_tsc = data;
1938
1939         /* Keep track of which generation this VCPU has synchronized to */
1940         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1941         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1942         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1943
1944         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1945                 update_ia32_tsc_adjust_msr(vcpu, offset);
1946
1947         kvm_vcpu_write_tsc_offset(vcpu, offset);
1948         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1949
1950         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1951         if (!matched) {
1952                 kvm->arch.nr_vcpus_matched_tsc = 0;
1953         } else if (!already_matched) {
1954                 kvm->arch.nr_vcpus_matched_tsc++;
1955         }
1956
1957         kvm_track_tsc_matching(vcpu);
1958         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1959 }
1960
1961 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1962
1963 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1964                                            s64 adjustment)
1965 {
1966         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1967         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1968 }
1969
1970 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1971 {
1972         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1973                 WARN_ON(adjustment < 0);
1974         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1975         adjust_tsc_offset_guest(vcpu, adjustment);
1976 }
1977
1978 #ifdef CONFIG_X86_64
1979
1980 static u64 read_tsc(void)
1981 {
1982         u64 ret = (u64)rdtsc_ordered();
1983         u64 last = pvclock_gtod_data.clock.cycle_last;
1984
1985         if (likely(ret >= last))
1986                 return ret;
1987
1988         /*
1989          * GCC likes to generate cmov here, but this branch is extremely
1990          * predictable (it's just a function of time and the likely is
1991          * very likely) and there's a data dependence, so force GCC
1992          * to generate a branch instead.  I don't barrier() because
1993          * we don't actually need a barrier, and if this function
1994          * ever gets inlined it will generate worse code.
1995          */
1996         asm volatile ("");
1997         return last;
1998 }
1999
2000 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
2001 {
2002         long v;
2003         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2004         u64 tsc_pg_val;
2005
2006         switch (gtod->clock.vclock_mode) {
2007         case VCLOCK_HVCLOCK:
2008                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2009                                                   tsc_timestamp);
2010                 if (tsc_pg_val != U64_MAX) {
2011                         /* TSC page valid */
2012                         *mode = VCLOCK_HVCLOCK;
2013                         v = (tsc_pg_val - gtod->clock.cycle_last) &
2014                                 gtod->clock.mask;
2015                 } else {
2016                         /* TSC page invalid */
2017                         *mode = VCLOCK_NONE;
2018                 }
2019                 break;
2020         case VCLOCK_TSC:
2021                 *mode = VCLOCK_TSC;
2022                 *tsc_timestamp = read_tsc();
2023                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
2024                         gtod->clock.mask;
2025                 break;
2026         default:
2027                 *mode = VCLOCK_NONE;
2028         }
2029
2030         if (*mode == VCLOCK_NONE)
2031                 *tsc_timestamp = v = 0;
2032
2033         return v * gtod->clock.mult;
2034 }
2035
2036 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
2037 {
2038         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2039         unsigned long seq;
2040         int mode;
2041         u64 ns;
2042
2043         do {
2044                 seq = read_seqcount_begin(&gtod->seq);
2045                 ns = gtod->nsec_base;
2046                 ns += vgettsc(tsc_timestamp, &mode);
2047                 ns >>= gtod->clock.shift;
2048                 ns += gtod->boot_ns;
2049         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2050         *t = ns;
2051
2052         return mode;
2053 }
2054
2055 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2056 {
2057         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2058         unsigned long seq;
2059         int mode;
2060         u64 ns;
2061
2062         do {
2063                 seq = read_seqcount_begin(&gtod->seq);
2064                 ts->tv_sec = gtod->wall_time_sec;
2065                 ns = gtod->nsec_base;
2066                 ns += vgettsc(tsc_timestamp, &mode);
2067                 ns >>= gtod->clock.shift;
2068         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2069
2070         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2071         ts->tv_nsec = ns;
2072
2073         return mode;
2074 }
2075
2076 /* returns true if host is using TSC based clocksource */
2077 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2078 {
2079         /* checked again under seqlock below */
2080         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2081                 return false;
2082
2083         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
2084                                                       tsc_timestamp));
2085 }
2086
2087 /* returns true if host is using TSC based clocksource */
2088 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2089                                            u64 *tsc_timestamp)
2090 {
2091         /* checked again under seqlock below */
2092         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2093                 return false;
2094
2095         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2096 }
2097 #endif
2098
2099 /*
2100  *
2101  * Assuming a stable TSC across physical CPUS, and a stable TSC
2102  * across virtual CPUs, the following condition is possible.
2103  * Each numbered line represents an event visible to both
2104  * CPUs at the next numbered event.
2105  *
2106  * "timespecX" represents host monotonic time. "tscX" represents
2107  * RDTSC value.
2108  *
2109  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2110  *
2111  * 1.  read timespec0,tsc0
2112  * 2.                                   | timespec1 = timespec0 + N
2113  *                                      | tsc1 = tsc0 + M
2114  * 3. transition to guest               | transition to guest
2115  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2116  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2117  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2118  *
2119  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2120  *
2121  *      - ret0 < ret1
2122  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2123  *              ...
2124  *      - 0 < N - M => M < N
2125  *
2126  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2127  * always the case (the difference between two distinct xtime instances
2128  * might be smaller then the difference between corresponding TSC reads,
2129  * when updating guest vcpus pvclock areas).
2130  *
2131  * To avoid that problem, do not allow visibility of distinct
2132  * system_timestamp/tsc_timestamp values simultaneously: use a master
2133  * copy of host monotonic time values. Update that master copy
2134  * in lockstep.
2135  *
2136  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2137  *
2138  */
2139
2140 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2141 {
2142 #ifdef CONFIG_X86_64
2143         struct kvm_arch *ka = &kvm->arch;
2144         int vclock_mode;
2145         bool host_tsc_clocksource, vcpus_matched;
2146
2147         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2148                         atomic_read(&kvm->online_vcpus));
2149
2150         /*
2151          * If the host uses TSC clock, then passthrough TSC as stable
2152          * to the guest.
2153          */
2154         host_tsc_clocksource = kvm_get_time_and_clockread(
2155                                         &ka->master_kernel_ns,
2156                                         &ka->master_cycle_now);
2157
2158         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2159                                 && !ka->backwards_tsc_observed
2160                                 && !ka->boot_vcpu_runs_old_kvmclock;
2161
2162         if (ka->use_master_clock)
2163                 atomic_set(&kvm_guest_has_master_clock, 1);
2164
2165         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2166         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2167                                         vcpus_matched);
2168 #endif
2169 }
2170
2171 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2172 {
2173         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2174 }
2175
2176 static void kvm_gen_update_masterclock(struct kvm *kvm)
2177 {
2178 #ifdef CONFIG_X86_64
2179         int i;
2180         struct kvm_vcpu *vcpu;
2181         struct kvm_arch *ka = &kvm->arch;
2182
2183         spin_lock(&ka->pvclock_gtod_sync_lock);
2184         kvm_make_mclock_inprogress_request(kvm);
2185         /* no guest entries from this point */
2186         pvclock_update_vm_gtod_copy(kvm);
2187
2188         kvm_for_each_vcpu(i, vcpu, kvm)
2189                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2190
2191         /* guest entries allowed */
2192         kvm_for_each_vcpu(i, vcpu, kvm)
2193                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2194
2195         spin_unlock(&ka->pvclock_gtod_sync_lock);
2196 #endif
2197 }
2198
2199 u64 get_kvmclock_ns(struct kvm *kvm)
2200 {
2201         struct kvm_arch *ka = &kvm->arch;
2202         struct pvclock_vcpu_time_info hv_clock;
2203         u64 ret;
2204
2205         spin_lock(&ka->pvclock_gtod_sync_lock);
2206         if (!ka->use_master_clock) {
2207                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2208                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2209         }
2210
2211         hv_clock.tsc_timestamp = ka->master_cycle_now;
2212         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2213         spin_unlock(&ka->pvclock_gtod_sync_lock);
2214
2215         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2216         get_cpu();
2217
2218         if (__this_cpu_read(cpu_tsc_khz)) {
2219                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2220                                    &hv_clock.tsc_shift,
2221                                    &hv_clock.tsc_to_system_mul);
2222                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2223         } else
2224                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2225
2226         put_cpu();
2227
2228         return ret;
2229 }
2230
2231 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2232 {
2233         struct kvm_vcpu_arch *vcpu = &v->arch;
2234         struct pvclock_vcpu_time_info guest_hv_clock;
2235
2236         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2237                 &guest_hv_clock, sizeof(guest_hv_clock))))
2238                 return;
2239
2240         /* This VCPU is paused, but it's legal for a guest to read another
2241          * VCPU's kvmclock, so we really have to follow the specification where
2242          * it says that version is odd if data is being modified, and even after
2243          * it is consistent.
2244          *
2245          * Version field updates must be kept separate.  This is because
2246          * kvm_write_guest_cached might use a "rep movs" instruction, and
2247          * writes within a string instruction are weakly ordered.  So there
2248          * are three writes overall.
2249          *
2250          * As a small optimization, only write the version field in the first
2251          * and third write.  The vcpu->pv_time cache is still valid, because the
2252          * version field is the first in the struct.
2253          */
2254         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2255
2256         if (guest_hv_clock.version & 1)
2257                 ++guest_hv_clock.version;  /* first time write, random junk */
2258
2259         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2260         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2261                                 &vcpu->hv_clock,
2262                                 sizeof(vcpu->hv_clock.version));
2263
2264         smp_wmb();
2265
2266         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2267         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2268
2269         if (vcpu->pvclock_set_guest_stopped_request) {
2270                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2271                 vcpu->pvclock_set_guest_stopped_request = false;
2272         }
2273
2274         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2275
2276         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2277                                 &vcpu->hv_clock,
2278                                 sizeof(vcpu->hv_clock));
2279
2280         smp_wmb();
2281
2282         vcpu->hv_clock.version++;
2283         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2284                                 &vcpu->hv_clock,
2285                                 sizeof(vcpu->hv_clock.version));
2286 }
2287
2288 static int kvm_guest_time_update(struct kvm_vcpu *v)
2289 {
2290         unsigned long flags, tgt_tsc_khz;
2291         struct kvm_vcpu_arch *vcpu = &v->arch;
2292         struct kvm_arch *ka = &v->kvm->arch;
2293         s64 kernel_ns;
2294         u64 tsc_timestamp, host_tsc;
2295         u8 pvclock_flags;
2296         bool use_master_clock;
2297
2298         kernel_ns = 0;
2299         host_tsc = 0;
2300
2301         /*
2302          * If the host uses TSC clock, then passthrough TSC as stable
2303          * to the guest.
2304          */
2305         spin_lock(&ka->pvclock_gtod_sync_lock);
2306         use_master_clock = ka->use_master_clock;
2307         if (use_master_clock) {
2308                 host_tsc = ka->master_cycle_now;
2309                 kernel_ns = ka->master_kernel_ns;
2310         }
2311         spin_unlock(&ka->pvclock_gtod_sync_lock);
2312
2313         /* Keep irq disabled to prevent changes to the clock */
2314         local_irq_save(flags);
2315         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2316         if (unlikely(tgt_tsc_khz == 0)) {
2317                 local_irq_restore(flags);
2318                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2319                 return 1;
2320         }
2321         if (!use_master_clock) {
2322                 host_tsc = rdtsc();
2323                 kernel_ns = ktime_get_boottime_ns();
2324         }
2325
2326         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2327
2328         /*
2329          * We may have to catch up the TSC to match elapsed wall clock
2330          * time for two reasons, even if kvmclock is used.
2331          *   1) CPU could have been running below the maximum TSC rate
2332          *   2) Broken TSC compensation resets the base at each VCPU
2333          *      entry to avoid unknown leaps of TSC even when running
2334          *      again on the same CPU.  This may cause apparent elapsed
2335          *      time to disappear, and the guest to stand still or run
2336          *      very slowly.
2337          */
2338         if (vcpu->tsc_catchup) {
2339                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2340                 if (tsc > tsc_timestamp) {
2341                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2342                         tsc_timestamp = tsc;
2343                 }
2344         }
2345
2346         local_irq_restore(flags);
2347
2348         /* With all the info we got, fill in the values */
2349
2350         if (kvm_has_tsc_control)
2351                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2352
2353         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2354                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2355                                    &vcpu->hv_clock.tsc_shift,
2356                                    &vcpu->hv_clock.tsc_to_system_mul);
2357                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2358         }
2359
2360         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2361         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2362         vcpu->last_guest_tsc = tsc_timestamp;
2363
2364         /* If the host uses TSC clocksource, then it is stable */
2365         pvclock_flags = 0;
2366         if (use_master_clock)
2367                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2368
2369         vcpu->hv_clock.flags = pvclock_flags;
2370
2371         if (vcpu->pv_time_enabled)
2372                 kvm_setup_pvclock_page(v);
2373         if (v == kvm_get_vcpu(v->kvm, 0))
2374                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2375         return 0;
2376 }
2377
2378 /*
2379  * kvmclock updates which are isolated to a given vcpu, such as
2380  * vcpu->cpu migration, should not allow system_timestamp from
2381  * the rest of the vcpus to remain static. Otherwise ntp frequency
2382  * correction applies to one vcpu's system_timestamp but not
2383  * the others.
2384  *
2385  * So in those cases, request a kvmclock update for all vcpus.
2386  * We need to rate-limit these requests though, as they can
2387  * considerably slow guests that have a large number of vcpus.
2388  * The time for a remote vcpu to update its kvmclock is bound
2389  * by the delay we use to rate-limit the updates.
2390  */
2391
2392 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2393
2394 static void kvmclock_update_fn(struct work_struct *work)
2395 {
2396         int i;
2397         struct delayed_work *dwork = to_delayed_work(work);
2398         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2399                                            kvmclock_update_work);
2400         struct kvm *kvm = container_of(ka, struct kvm, arch);
2401         struct kvm_vcpu *vcpu;
2402
2403         kvm_for_each_vcpu(i, vcpu, kvm) {
2404                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2405                 kvm_vcpu_kick(vcpu);
2406         }
2407 }
2408
2409 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2410 {
2411         struct kvm *kvm = v->kvm;
2412
2413         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2414         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2415                                         KVMCLOCK_UPDATE_DELAY);
2416 }
2417
2418 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2419
2420 static void kvmclock_sync_fn(struct work_struct *work)
2421 {
2422         struct delayed_work *dwork = to_delayed_work(work);
2423         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2424                                            kvmclock_sync_work);
2425         struct kvm *kvm = container_of(ka, struct kvm, arch);
2426
2427         if (!kvmclock_periodic_sync)
2428                 return;
2429
2430         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2431         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2432                                         KVMCLOCK_SYNC_PERIOD);
2433 }
2434
2435 /*
2436  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2437  */
2438 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2439 {
2440         /* McStatusWrEn enabled? */
2441         if (guest_cpuid_is_amd(vcpu))
2442                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2443
2444         return false;
2445 }
2446
2447 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2448 {
2449         u64 mcg_cap = vcpu->arch.mcg_cap;
2450         unsigned bank_num = mcg_cap & 0xff;
2451         u32 msr = msr_info->index;
2452         u64 data = msr_info->data;
2453
2454         switch (msr) {
2455         case MSR_IA32_MCG_STATUS:
2456                 vcpu->arch.mcg_status = data;
2457                 break;
2458         case MSR_IA32_MCG_CTL:
2459                 if (!(mcg_cap & MCG_CTL_P) &&
2460                     (data || !msr_info->host_initiated))
2461                         return 1;
2462                 if (data != 0 && data != ~(u64)0)
2463                         return 1;
2464                 vcpu->arch.mcg_ctl = data;
2465                 break;
2466         default:
2467                 if (msr >= MSR_IA32_MC0_CTL &&
2468                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2469                         u32 offset = msr - MSR_IA32_MC0_CTL;
2470                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2471                          * some Linux kernels though clear bit 10 in bank 4 to
2472                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2473                          * this to avoid an uncatched #GP in the guest
2474                          */
2475                         if ((offset & 0x3) == 0 &&
2476                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2477                                 return -1;
2478
2479                         /* MCi_STATUS */
2480                         if (!msr_info->host_initiated &&
2481                             (offset & 0x3) == 1 && data != 0) {
2482                                 if (!can_set_mci_status(vcpu))
2483                                         return -1;
2484                         }
2485
2486                         vcpu->arch.mce_banks[offset] = data;
2487                         break;
2488                 }
2489                 return 1;
2490         }
2491         return 0;
2492 }
2493
2494 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2495 {
2496         struct kvm *kvm = vcpu->kvm;
2497         int lm = is_long_mode(vcpu);
2498         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2499                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2500         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2501                 : kvm->arch.xen_hvm_config.blob_size_32;
2502         u32 page_num = data & ~PAGE_MASK;
2503         u64 page_addr = data & PAGE_MASK;
2504         u8 *page;
2505         int r;
2506
2507         r = -E2BIG;
2508         if (page_num >= blob_size)
2509                 goto out;
2510         r = -ENOMEM;
2511         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2512         if (IS_ERR(page)) {
2513                 r = PTR_ERR(page);
2514                 goto out;
2515         }
2516         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2517                 goto out_free;
2518         r = 0;
2519 out_free:
2520         kfree(page);
2521 out:
2522         return r;
2523 }
2524
2525 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2526 {
2527         gpa_t gpa = data & ~0x3f;
2528
2529         /* Bits 3:5 are reserved, Should be zero */
2530         if (data & 0x38)
2531                 return 1;
2532
2533         vcpu->arch.apf.msr_val = data;
2534
2535         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2536                 kvm_clear_async_pf_completion_queue(vcpu);
2537                 kvm_async_pf_hash_reset(vcpu);
2538                 return 0;
2539         }
2540
2541         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2542                                         sizeof(u32)))
2543                 return 1;
2544
2545         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2546         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2547         kvm_async_pf_wakeup_all(vcpu);
2548         return 0;
2549 }
2550
2551 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2552 {
2553         vcpu->arch.pv_time_enabled = false;
2554 }
2555
2556 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2557 {
2558         ++vcpu->stat.tlb_flush;
2559         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2560 }
2561
2562 static void record_steal_time(struct kvm_vcpu *vcpu)
2563 {
2564         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2565                 return;
2566
2567         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2568                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2569                 return;
2570
2571         /*
2572          * Doing a TLB flush here, on the guest's behalf, can avoid
2573          * expensive IPIs.
2574          */
2575         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2576                 vcpu->arch.st.steal.preempted & KVM_VCPU_FLUSH_TLB);
2577         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2578                 kvm_vcpu_flush_tlb(vcpu, false);
2579
2580         if (vcpu->arch.st.steal.version & 1)
2581                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2582
2583         vcpu->arch.st.steal.version += 1;
2584
2585         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2586                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2587
2588         smp_wmb();
2589
2590         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2591                 vcpu->arch.st.last_steal;
2592         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2593
2594         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2595                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2596
2597         smp_wmb();
2598
2599         vcpu->arch.st.steal.version += 1;
2600
2601         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2602                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2603 }
2604
2605 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2606 {
2607         bool pr = false;
2608         u32 msr = msr_info->index;
2609         u64 data = msr_info->data;
2610
2611         switch (msr) {
2612         case MSR_AMD64_NB_CFG:
2613         case MSR_IA32_UCODE_WRITE:
2614         case MSR_VM_HSAVE_PA:
2615         case MSR_AMD64_PATCH_LOADER:
2616         case MSR_AMD64_BU_CFG2:
2617         case MSR_AMD64_DC_CFG:
2618         case MSR_F15H_EX_CFG:
2619                 break;
2620
2621         case MSR_IA32_UCODE_REV:
2622                 if (msr_info->host_initiated)
2623                         vcpu->arch.microcode_version = data;
2624                 break;
2625         case MSR_IA32_ARCH_CAPABILITIES:
2626                 if (!msr_info->host_initiated)
2627                         return 1;
2628                 vcpu->arch.arch_capabilities = data;
2629                 break;
2630         case MSR_EFER:
2631                 return set_efer(vcpu, msr_info);
2632         case MSR_K7_HWCR:
2633                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2634                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2635                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2636
2637                 /* Handle McStatusWrEn */
2638                 if (data == BIT_ULL(18)) {
2639                         vcpu->arch.msr_hwcr = data;
2640                 } else if (data != 0) {
2641                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2642                                     data);
2643                         return 1;
2644                 }
2645                 break;
2646         case MSR_FAM10H_MMIO_CONF_BASE:
2647                 if (data != 0) {
2648                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2649                                     "0x%llx\n", data);
2650                         return 1;
2651                 }
2652                 break;
2653         case MSR_IA32_DEBUGCTLMSR:
2654                 if (!data) {
2655                         /* We support the non-activated case already */
2656                         break;
2657                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2658                         /* Values other than LBR and BTF are vendor-specific,
2659                            thus reserved and should throw a #GP */
2660                         return 1;
2661                 }
2662                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2663                             __func__, data);
2664                 break;
2665         case 0x200 ... 0x2ff:
2666                 return kvm_mtrr_set_msr(vcpu, msr, data);
2667         case MSR_IA32_APICBASE:
2668                 return kvm_set_apic_base(vcpu, msr_info);
2669         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2670                 return kvm_x2apic_msr_write(vcpu, msr, data);
2671         case MSR_IA32_TSCDEADLINE:
2672                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2673                 break;
2674         case MSR_IA32_TSC_ADJUST:
2675                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2676                         if (!msr_info->host_initiated) {
2677                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2678                                 adjust_tsc_offset_guest(vcpu, adj);
2679                         }
2680                         vcpu->arch.ia32_tsc_adjust_msr = data;
2681                 }
2682                 break;
2683         case MSR_IA32_MISC_ENABLE:
2684                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2685                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2686                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2687                                 return 1;
2688                         vcpu->arch.ia32_misc_enable_msr = data;
2689                         kvm_update_cpuid(vcpu);
2690                 } else {
2691                         vcpu->arch.ia32_misc_enable_msr = data;
2692                 }
2693                 break;
2694         case MSR_IA32_SMBASE:
2695                 if (!msr_info->host_initiated)
2696                         return 1;
2697                 vcpu->arch.smbase = data;
2698                 break;
2699         case MSR_IA32_POWER_CTL:
2700                 vcpu->arch.msr_ia32_power_ctl = data;
2701                 break;
2702         case MSR_IA32_TSC:
2703                 kvm_write_tsc(vcpu, msr_info);
2704                 break;
2705         case MSR_SMI_COUNT:
2706                 if (!msr_info->host_initiated)
2707                         return 1;
2708                 vcpu->arch.smi_count = data;
2709                 break;
2710         case MSR_KVM_WALL_CLOCK_NEW:
2711         case MSR_KVM_WALL_CLOCK:
2712                 vcpu->kvm->arch.wall_clock = data;
2713                 kvm_write_wall_clock(vcpu->kvm, data);
2714                 break;
2715         case MSR_KVM_SYSTEM_TIME_NEW:
2716         case MSR_KVM_SYSTEM_TIME: {
2717                 struct kvm_arch *ka = &vcpu->kvm->arch;
2718
2719                 kvmclock_reset(vcpu);
2720
2721                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2722                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2723
2724                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2725                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2726
2727                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2728                 }
2729
2730                 vcpu->arch.time = data;
2731                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2732
2733                 /* we verify if the enable bit is set... */
2734                 if (!(data & 1))
2735                         break;
2736
2737                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2738                      &vcpu->arch.pv_time, data & ~1ULL,
2739                      sizeof(struct pvclock_vcpu_time_info)))
2740                         vcpu->arch.pv_time_enabled = false;
2741                 else
2742                         vcpu->arch.pv_time_enabled = true;
2743
2744                 break;
2745         }
2746         case MSR_KVM_ASYNC_PF_EN:
2747                 if (kvm_pv_enable_async_pf(vcpu, data))
2748                         return 1;
2749                 break;
2750         case MSR_KVM_STEAL_TIME:
2751
2752                 if (unlikely(!sched_info_on()))
2753                         return 1;
2754
2755                 if (data & KVM_STEAL_RESERVED_MASK)
2756                         return 1;
2757
2758                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2759                                                 data & KVM_STEAL_VALID_BITS,
2760                                                 sizeof(struct kvm_steal_time)))
2761                         return 1;
2762
2763                 vcpu->arch.st.msr_val = data;
2764
2765                 if (!(data & KVM_MSR_ENABLED))
2766                         break;
2767
2768                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2769
2770                 break;
2771         case MSR_KVM_PV_EOI_EN:
2772                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2773                         return 1;
2774                 break;
2775
2776         case MSR_KVM_POLL_CONTROL:
2777                 /* only enable bit supported */
2778                 if (data & (-1ULL << 1))
2779                         return 1;
2780
2781                 vcpu->arch.msr_kvm_poll_control = data;
2782                 break;
2783
2784         case MSR_IA32_MCG_CTL:
2785         case MSR_IA32_MCG_STATUS:
2786         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2787                 return set_msr_mce(vcpu, msr_info);
2788
2789         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2790         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2791                 pr = true; /* fall through */
2792         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2793         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2794                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2795                         return kvm_pmu_set_msr(vcpu, msr_info);
2796
2797                 if (pr || data != 0)
2798                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2799                                     "0x%x data 0x%llx\n", msr, data);
2800                 break;
2801         case MSR_K7_CLK_CTL:
2802                 /*
2803                  * Ignore all writes to this no longer documented MSR.
2804                  * Writes are only relevant for old K7 processors,
2805                  * all pre-dating SVM, but a recommended workaround from
2806                  * AMD for these chips. It is possible to specify the
2807                  * affected processor models on the command line, hence
2808                  * the need to ignore the workaround.
2809                  */
2810                 break;
2811         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2812         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2813         case HV_X64_MSR_CRASH_CTL:
2814         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2815         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2816         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2817         case HV_X64_MSR_TSC_EMULATION_STATUS:
2818                 return kvm_hv_set_msr_common(vcpu, msr, data,
2819                                              msr_info->host_initiated);
2820         case MSR_IA32_BBL_CR_CTL3:
2821                 /* Drop writes to this legacy MSR -- see rdmsr
2822                  * counterpart for further detail.
2823                  */
2824                 if (report_ignored_msrs)
2825                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2826                                 msr, data);
2827                 break;
2828         case MSR_AMD64_OSVW_ID_LENGTH:
2829                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2830                         return 1;
2831                 vcpu->arch.osvw.length = data;
2832                 break;
2833         case MSR_AMD64_OSVW_STATUS:
2834                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2835                         return 1;
2836                 vcpu->arch.osvw.status = data;
2837                 break;
2838         case MSR_PLATFORM_INFO:
2839                 if (!msr_info->host_initiated ||
2840                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2841                      cpuid_fault_enabled(vcpu)))
2842                         return 1;
2843                 vcpu->arch.msr_platform_info = data;
2844                 break;
2845         case MSR_MISC_FEATURES_ENABLES:
2846                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2847                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2848                      !supports_cpuid_fault(vcpu)))
2849                         return 1;
2850                 vcpu->arch.msr_misc_features_enables = data;
2851                 break;
2852         default:
2853                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2854                         return xen_hvm_config(vcpu, data);
2855                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2856                         return kvm_pmu_set_msr(vcpu, msr_info);
2857                 if (!ignore_msrs) {
2858                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2859                                     msr, data);
2860                         return 1;
2861                 } else {
2862                         if (report_ignored_msrs)
2863                                 vcpu_unimpl(vcpu,
2864                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2865                                         msr, data);
2866                         break;
2867                 }
2868         }
2869         return 0;
2870 }
2871 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2872
2873 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2874 {
2875         u64 data;
2876         u64 mcg_cap = vcpu->arch.mcg_cap;
2877         unsigned bank_num = mcg_cap & 0xff;
2878
2879         switch (msr) {
2880         case MSR_IA32_P5_MC_ADDR:
2881         case MSR_IA32_P5_MC_TYPE:
2882                 data = 0;
2883                 break;
2884         case MSR_IA32_MCG_CAP:
2885                 data = vcpu->arch.mcg_cap;
2886                 break;
2887         case MSR_IA32_MCG_CTL:
2888                 if (!(mcg_cap & MCG_CTL_P) && !host)
2889                         return 1;
2890                 data = vcpu->arch.mcg_ctl;
2891                 break;
2892         case MSR_IA32_MCG_STATUS:
2893                 data = vcpu->arch.mcg_status;
2894                 break;
2895         default:
2896                 if (msr >= MSR_IA32_MC0_CTL &&
2897                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2898                         u32 offset = msr - MSR_IA32_MC0_CTL;
2899                         data = vcpu->arch.mce_banks[offset];
2900                         break;
2901                 }
2902                 return 1;
2903         }
2904         *pdata = data;
2905         return 0;
2906 }
2907
2908 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2909 {
2910         switch (msr_info->index) {
2911         case MSR_IA32_PLATFORM_ID:
2912         case MSR_IA32_EBL_CR_POWERON:
2913         case MSR_IA32_DEBUGCTLMSR:
2914         case MSR_IA32_LASTBRANCHFROMIP:
2915         case MSR_IA32_LASTBRANCHTOIP:
2916         case MSR_IA32_LASTINTFROMIP:
2917         case MSR_IA32_LASTINTTOIP:
2918         case MSR_K8_SYSCFG:
2919         case MSR_K8_TSEG_ADDR:
2920         case MSR_K8_TSEG_MASK:
2921         case MSR_VM_HSAVE_PA:
2922         case MSR_K8_INT_PENDING_MSG:
2923         case MSR_AMD64_NB_CFG:
2924         case MSR_FAM10H_MMIO_CONF_BASE:
2925         case MSR_AMD64_BU_CFG2:
2926         case MSR_IA32_PERF_CTL:
2927         case MSR_AMD64_DC_CFG:
2928         case MSR_F15H_EX_CFG:
2929                 msr_info->data = 0;
2930                 break;
2931         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2932         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2933         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2934         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2935         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2936                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2937                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2938                 msr_info->data = 0;
2939                 break;
2940         case MSR_IA32_UCODE_REV:
2941                 msr_info->data = vcpu->arch.microcode_version;
2942                 break;
2943         case MSR_IA32_ARCH_CAPABILITIES:
2944                 if (!msr_info->host_initiated &&
2945                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2946                         return 1;
2947                 msr_info->data = vcpu->arch.arch_capabilities;
2948                 break;
2949         case MSR_IA32_POWER_CTL:
2950                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2951                 break;
2952         case MSR_IA32_TSC:
2953                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2954                 break;
2955         case MSR_MTRRcap:
2956         case 0x200 ... 0x2ff:
2957                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2958         case 0xcd: /* fsb frequency */
2959                 msr_info->data = 3;
2960                 break;
2961                 /*
2962                  * MSR_EBC_FREQUENCY_ID
2963                  * Conservative value valid for even the basic CPU models.
2964                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2965                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2966                  * and 266MHz for model 3, or 4. Set Core Clock
2967                  * Frequency to System Bus Frequency Ratio to 1 (bits
2968                  * 31:24) even though these are only valid for CPU
2969                  * models > 2, however guests may end up dividing or
2970                  * multiplying by zero otherwise.
2971                  */
2972         case MSR_EBC_FREQUENCY_ID:
2973                 msr_info->data = 1 << 24;
2974                 break;
2975         case MSR_IA32_APICBASE:
2976                 msr_info->data = kvm_get_apic_base(vcpu);
2977                 break;
2978         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2979                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2980                 break;
2981         case MSR_IA32_TSCDEADLINE:
2982                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2983                 break;
2984         case MSR_IA32_TSC_ADJUST:
2985                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2986                 break;
2987         case MSR_IA32_MISC_ENABLE:
2988                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2989                 break;
2990         case MSR_IA32_SMBASE:
2991                 if (!msr_info->host_initiated)
2992                         return 1;
2993                 msr_info->data = vcpu->arch.smbase;
2994                 break;
2995         case MSR_SMI_COUNT:
2996                 msr_info->data = vcpu->arch.smi_count;
2997                 break;
2998         case MSR_IA32_PERF_STATUS:
2999                 /* TSC increment by tick */
3000                 msr_info->data = 1000ULL;
3001                 /* CPU multiplier */
3002                 msr_info->data |= (((uint64_t)4ULL) << 40);
3003                 break;
3004         case MSR_EFER:
3005                 msr_info->data = vcpu->arch.efer;
3006                 break;
3007         case MSR_KVM_WALL_CLOCK:
3008         case MSR_KVM_WALL_CLOCK_NEW:
3009                 msr_info->data = vcpu->kvm->arch.wall_clock;
3010                 break;
3011         case MSR_KVM_SYSTEM_TIME:
3012         case MSR_KVM_SYSTEM_TIME_NEW:
3013                 msr_info->data = vcpu->arch.time;
3014                 break;
3015         case MSR_KVM_ASYNC_PF_EN:
3016                 msr_info->data = vcpu->arch.apf.msr_val;
3017                 break;
3018         case MSR_KVM_STEAL_TIME:
3019                 msr_info->data = vcpu->arch.st.msr_val;
3020                 break;
3021         case MSR_KVM_PV_EOI_EN:
3022                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3023                 break;
3024         case MSR_KVM_POLL_CONTROL:
3025                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3026                 break;
3027         case MSR_IA32_P5_MC_ADDR:
3028         case MSR_IA32_P5_MC_TYPE:
3029         case MSR_IA32_MCG_CAP:
3030         case MSR_IA32_MCG_CTL:
3031         case MSR_IA32_MCG_STATUS:
3032         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3033                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3034                                    msr_info->host_initiated);
3035         case MSR_K7_CLK_CTL:
3036                 /*
3037                  * Provide expected ramp-up count for K7. All other
3038                  * are set to zero, indicating minimum divisors for
3039                  * every field.
3040                  *
3041                  * This prevents guest kernels on AMD host with CPU
3042                  * type 6, model 8 and higher from exploding due to
3043                  * the rdmsr failing.
3044                  */
3045                 msr_info->data = 0x20000000;
3046                 break;
3047         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3048         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3049         case HV_X64_MSR_CRASH_CTL:
3050         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3051         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3052         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3053         case HV_X64_MSR_TSC_EMULATION_STATUS:
3054                 return kvm_hv_get_msr_common(vcpu,
3055                                              msr_info->index, &msr_info->data,
3056                                              msr_info->host_initiated);
3057                 break;
3058         case MSR_IA32_BBL_CR_CTL3:
3059                 /* This legacy MSR exists but isn't fully documented in current
3060                  * silicon.  It is however accessed by winxp in very narrow
3061                  * scenarios where it sets bit #19, itself documented as
3062                  * a "reserved" bit.  Best effort attempt to source coherent
3063                  * read data here should the balance of the register be
3064                  * interpreted by the guest:
3065                  *
3066                  * L2 cache control register 3: 64GB range, 256KB size,
3067                  * enabled, latency 0x1, configured
3068                  */
3069                 msr_info->data = 0xbe702111;
3070                 break;
3071         case MSR_AMD64_OSVW_ID_LENGTH:
3072                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3073                         return 1;
3074                 msr_info->data = vcpu->arch.osvw.length;
3075                 break;
3076         case MSR_AMD64_OSVW_STATUS:
3077                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3078                         return 1;
3079                 msr_info->data = vcpu->arch.osvw.status;
3080                 break;
3081         case MSR_PLATFORM_INFO:
3082                 if (!msr_info->host_initiated &&
3083                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3084                         return 1;
3085                 msr_info->data = vcpu->arch.msr_platform_info;
3086                 break;
3087         case MSR_MISC_FEATURES_ENABLES:
3088                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3089                 break;
3090         case MSR_K7_HWCR:
3091                 msr_info->data = vcpu->arch.msr_hwcr;
3092                 break;
3093         default:
3094                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3095                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3096                 if (!ignore_msrs) {
3097                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3098                                                msr_info->index);
3099                         return 1;
3100                 } else {
3101                         if (report_ignored_msrs)
3102                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3103                                         msr_info->index);
3104                         msr_info->data = 0;
3105                 }
3106                 break;
3107         }
3108         return 0;
3109 }
3110 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3111
3112 /*
3113  * Read or write a bunch of msrs. All parameters are kernel addresses.
3114  *
3115  * @return number of msrs set successfully.
3116  */
3117 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3118                     struct kvm_msr_entry *entries,
3119                     int (*do_msr)(struct kvm_vcpu *vcpu,
3120                                   unsigned index, u64 *data))
3121 {
3122         int i;
3123
3124         for (i = 0; i < msrs->nmsrs; ++i)
3125                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3126                         break;
3127
3128         return i;
3129 }
3130
3131 /*
3132  * Read or write a bunch of msrs. Parameters are user addresses.
3133  *
3134  * @return number of msrs set successfully.
3135  */
3136 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3137                   int (*do_msr)(struct kvm_vcpu *vcpu,
3138                                 unsigned index, u64 *data),
3139                   int writeback)
3140 {
3141         struct kvm_msrs msrs;
3142         struct kvm_msr_entry *entries;
3143         int r, n;
3144         unsigned size;
3145
3146         r = -EFAULT;
3147         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3148                 goto out;
3149
3150         r = -E2BIG;
3151         if (msrs.nmsrs >= MAX_IO_MSRS)
3152                 goto out;
3153
3154         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3155         entries = memdup_user(user_msrs->entries, size);
3156         if (IS_ERR(entries)) {
3157                 r = PTR_ERR(entries);
3158                 goto out;
3159         }
3160
3161         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3162         if (r < 0)
3163                 goto out_free;
3164
3165         r = -EFAULT;
3166         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3167                 goto out_free;
3168
3169         r = n;
3170
3171 out_free:
3172         kfree(entries);
3173 out:
3174         return r;
3175 }
3176
3177 static inline bool kvm_can_mwait_in_guest(void)
3178 {
3179         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3180                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3181                 boot_cpu_has(X86_FEATURE_ARAT);
3182 }
3183
3184 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3185 {
3186         int r = 0;
3187
3188         switch (ext) {
3189         case KVM_CAP_IRQCHIP:
3190         case KVM_CAP_HLT:
3191         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3192         case KVM_CAP_SET_TSS_ADDR:
3193         case KVM_CAP_EXT_CPUID:
3194         case KVM_CAP_EXT_EMUL_CPUID:
3195         case KVM_CAP_CLOCKSOURCE:
3196         case KVM_CAP_PIT:
3197         case KVM_CAP_NOP_IO_DELAY:
3198         case KVM_CAP_MP_STATE:
3199         case KVM_CAP_SYNC_MMU:
3200         case KVM_CAP_USER_NMI:
3201         case KVM_CAP_REINJECT_CONTROL:
3202         case KVM_CAP_IRQ_INJECT_STATUS:
3203         case KVM_CAP_IOEVENTFD:
3204         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3205         case KVM_CAP_PIT2:
3206         case KVM_CAP_PIT_STATE2:
3207         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3208         case KVM_CAP_XEN_HVM:
3209         case KVM_CAP_VCPU_EVENTS:
3210         case KVM_CAP_HYPERV:
3211         case KVM_CAP_HYPERV_VAPIC:
3212         case KVM_CAP_HYPERV_SPIN:
3213         case KVM_CAP_HYPERV_SYNIC:
3214         case KVM_CAP_HYPERV_SYNIC2:
3215         case KVM_CAP_HYPERV_VP_INDEX:
3216         case KVM_CAP_HYPERV_EVENTFD:
3217         case KVM_CAP_HYPERV_TLBFLUSH:
3218         case KVM_CAP_HYPERV_SEND_IPI:
3219         case KVM_CAP_HYPERV_CPUID:
3220         case KVM_CAP_PCI_SEGMENT:
3221         case KVM_CAP_DEBUGREGS:
3222         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3223         case KVM_CAP_XSAVE:
3224         case KVM_CAP_ASYNC_PF:
3225         case KVM_CAP_GET_TSC_KHZ:
3226         case KVM_CAP_KVMCLOCK_CTRL:
3227         case KVM_CAP_READONLY_MEM:
3228         case KVM_CAP_HYPERV_TIME:
3229         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3230         case KVM_CAP_TSC_DEADLINE_TIMER:
3231         case KVM_CAP_DISABLE_QUIRKS:
3232         case KVM_CAP_SET_BOOT_CPU_ID:
3233         case KVM_CAP_SPLIT_IRQCHIP:
3234         case KVM_CAP_IMMEDIATE_EXIT:
3235         case KVM_CAP_PMU_EVENT_FILTER:
3236         case KVM_CAP_GET_MSR_FEATURES:
3237         case KVM_CAP_MSR_PLATFORM_INFO:
3238         case KVM_CAP_EXCEPTION_PAYLOAD:
3239                 r = 1;
3240                 break;
3241         case KVM_CAP_SYNC_REGS:
3242                 r = KVM_SYNC_X86_VALID_FIELDS;
3243                 break;
3244         case KVM_CAP_ADJUST_CLOCK:
3245                 r = KVM_CLOCK_TSC_STABLE;
3246                 break;
3247         case KVM_CAP_X86_DISABLE_EXITS:
3248                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3249                       KVM_X86_DISABLE_EXITS_CSTATE;
3250                 if(kvm_can_mwait_in_guest())
3251                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3252                 break;
3253         case KVM_CAP_X86_SMM:
3254                 /* SMBASE is usually relocated above 1M on modern chipsets,
3255                  * and SMM handlers might indeed rely on 4G segment limits,
3256                  * so do not report SMM to be available if real mode is
3257                  * emulated via vm86 mode.  Still, do not go to great lengths
3258                  * to avoid userspace's usage of the feature, because it is a
3259                  * fringe case that is not enabled except via specific settings
3260                  * of the module parameters.
3261                  */
3262                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3263                 break;
3264         case KVM_CAP_VAPIC:
3265                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3266                 break;
3267         case KVM_CAP_NR_VCPUS:
3268                 r = KVM_SOFT_MAX_VCPUS;
3269                 break;
3270         case KVM_CAP_MAX_VCPUS:
3271                 r = KVM_MAX_VCPUS;
3272                 break;
3273         case KVM_CAP_MAX_VCPU_ID:
3274                 r = KVM_MAX_VCPU_ID;
3275                 break;
3276         case KVM_CAP_PV_MMU:    /* obsolete */
3277                 r = 0;
3278                 break;
3279         case KVM_CAP_MCE:
3280                 r = KVM_MAX_MCE_BANKS;
3281                 break;
3282         case KVM_CAP_XCRS:
3283                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3284                 break;
3285         case KVM_CAP_TSC_CONTROL:
3286                 r = kvm_has_tsc_control;
3287                 break;
3288         case KVM_CAP_X2APIC_API:
3289                 r = KVM_X2APIC_API_VALID_FLAGS;
3290                 break;
3291         case KVM_CAP_NESTED_STATE:
3292                 r = kvm_x86_ops->get_nested_state ?
3293                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3294                 break;
3295         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3296                 r = kvm_x86_ops->enable_direct_tlbflush != NULL;
3297                 break;
3298         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3299                 r = kvm_x86_ops->nested_enable_evmcs != NULL;
3300                 break;
3301         default:
3302                 break;
3303         }
3304         return r;
3305
3306 }
3307
3308 long kvm_arch_dev_ioctl(struct file *filp,
3309                         unsigned int ioctl, unsigned long arg)
3310 {
3311         void __user *argp = (void __user *)arg;
3312         long r;
3313
3314         switch (ioctl) {
3315         case KVM_GET_MSR_INDEX_LIST: {
3316                 struct kvm_msr_list __user *user_msr_list = argp;
3317                 struct kvm_msr_list msr_list;
3318                 unsigned n;
3319
3320                 r = -EFAULT;
3321                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3322                         goto out;
3323                 n = msr_list.nmsrs;
3324                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3325                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3326                         goto out;
3327                 r = -E2BIG;
3328                 if (n < msr_list.nmsrs)
3329                         goto out;
3330                 r = -EFAULT;
3331                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3332                                  num_msrs_to_save * sizeof(u32)))
3333                         goto out;
3334                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3335                                  &emulated_msrs,
3336                                  num_emulated_msrs * sizeof(u32)))
3337                         goto out;
3338                 r = 0;
3339                 break;
3340         }
3341         case KVM_GET_SUPPORTED_CPUID:
3342         case KVM_GET_EMULATED_CPUID: {
3343                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3344                 struct kvm_cpuid2 cpuid;
3345
3346                 r = -EFAULT;
3347                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3348                         goto out;
3349
3350                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3351                                             ioctl);
3352                 if (r)
3353                         goto out;
3354
3355                 r = -EFAULT;
3356                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3357                         goto out;
3358                 r = 0;
3359                 break;
3360         }
3361         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3362                 r = -EFAULT;
3363                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3364                                  sizeof(kvm_mce_cap_supported)))
3365                         goto out;
3366                 r = 0;
3367                 break;
3368         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3369                 struct kvm_msr_list __user *user_msr_list = argp;
3370                 struct kvm_msr_list msr_list;
3371                 unsigned int n;
3372
3373                 r = -EFAULT;
3374                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3375                         goto out;
3376                 n = msr_list.nmsrs;
3377                 msr_list.nmsrs = num_msr_based_features;
3378                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3379                         goto out;
3380                 r = -E2BIG;
3381                 if (n < msr_list.nmsrs)
3382                         goto out;
3383                 r = -EFAULT;
3384                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3385                                  num_msr_based_features * sizeof(u32)))
3386                         goto out;
3387                 r = 0;
3388                 break;
3389         }
3390         case KVM_GET_MSRS:
3391                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3392                 break;
3393         }
3394         default:
3395                 r = -EINVAL;
3396         }
3397 out:
3398         return r;
3399 }
3400
3401 static void wbinvd_ipi(void *garbage)
3402 {
3403         wbinvd();
3404 }
3405
3406 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3407 {
3408         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3409 }
3410
3411 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3412 {
3413         /* Address WBINVD may be executed by guest */
3414         if (need_emulate_wbinvd(vcpu)) {
3415                 if (kvm_x86_ops->has_wbinvd_exit())
3416                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3417                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3418                         smp_call_function_single(vcpu->cpu,
3419                                         wbinvd_ipi, NULL, 1);
3420         }
3421
3422         kvm_x86_ops->vcpu_load(vcpu, cpu);
3423
3424         fpregs_assert_state_consistent();
3425         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3426                 switch_fpu_return();
3427
3428         /* Apply any externally detected TSC adjustments (due to suspend) */
3429         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3430                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3431                 vcpu->arch.tsc_offset_adjustment = 0;
3432                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3433         }
3434
3435         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3436                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3437                                 rdtsc() - vcpu->arch.last_host_tsc;
3438                 if (tsc_delta < 0)
3439                         mark_tsc_unstable("KVM discovered backwards TSC");
3440
3441                 if (kvm_check_tsc_unstable()) {
3442                         u64 offset = kvm_compute_tsc_offset(vcpu,
3443                                                 vcpu->arch.last_guest_tsc);
3444                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3445                         vcpu->arch.tsc_catchup = 1;
3446                 }
3447
3448                 if (kvm_lapic_hv_timer_in_use(vcpu))
3449                         kvm_lapic_restart_hv_timer(vcpu);
3450
3451                 /*
3452                  * On a host with synchronized TSC, there is no need to update
3453                  * kvmclock on vcpu->cpu migration
3454                  */
3455                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3456                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3457                 if (vcpu->cpu != cpu)
3458                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3459                 vcpu->cpu = cpu;
3460         }
3461
3462         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3463 }
3464
3465 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3466 {
3467         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3468                 return;
3469
3470         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3471
3472         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3473                         &vcpu->arch.st.steal.preempted,
3474                         offsetof(struct kvm_steal_time, preempted),
3475                         sizeof(vcpu->arch.st.steal.preempted));
3476 }
3477
3478 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3479 {
3480         int idx;
3481
3482         if (vcpu->preempted)
3483                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3484
3485         /*
3486          * Disable page faults because we're in atomic context here.
3487          * kvm_write_guest_offset_cached() would call might_fault()
3488          * that relies on pagefault_disable() to tell if there's a
3489          * bug. NOTE: the write to guest memory may not go through if
3490          * during postcopy live migration or if there's heavy guest
3491          * paging.
3492          */
3493         pagefault_disable();
3494         /*
3495          * kvm_memslots() will be called by
3496          * kvm_write_guest_offset_cached() so take the srcu lock.
3497          */
3498         idx = srcu_read_lock(&vcpu->kvm->srcu);
3499         kvm_steal_time_set_preempted(vcpu);
3500         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3501         pagefault_enable();
3502         kvm_x86_ops->vcpu_put(vcpu);
3503         vcpu->arch.last_host_tsc = rdtsc();
3504         /*
3505          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3506          * on every vmexit, but if not, we might have a stale dr6 from the
3507          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3508          */
3509         set_debugreg(0, 6);
3510 }
3511
3512 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3513                                     struct kvm_lapic_state *s)
3514 {
3515         if (vcpu->arch.apicv_active)
3516                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3517
3518         return kvm_apic_get_state(vcpu, s);
3519 }
3520
3521 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3522                                     struct kvm_lapic_state *s)
3523 {
3524         int r;
3525
3526         r = kvm_apic_set_state(vcpu, s);
3527         if (r)
3528                 return r;
3529         update_cr8_intercept(vcpu);
3530
3531         return 0;
3532 }
3533
3534 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3535 {
3536         return (!lapic_in_kernel(vcpu) ||
3537                 kvm_apic_accept_pic_intr(vcpu));
3538 }
3539
3540 /*
3541  * if userspace requested an interrupt window, check that the
3542  * interrupt window is open.
3543  *
3544  * No need to exit to userspace if we already have an interrupt queued.
3545  */
3546 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3547 {
3548         return kvm_arch_interrupt_allowed(vcpu) &&
3549                 !kvm_cpu_has_interrupt(vcpu) &&
3550                 !kvm_event_needs_reinjection(vcpu) &&
3551                 kvm_cpu_accept_dm_intr(vcpu);
3552 }
3553
3554 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3555                                     struct kvm_interrupt *irq)
3556 {
3557         if (irq->irq >= KVM_NR_INTERRUPTS)
3558                 return -EINVAL;
3559
3560         if (!irqchip_in_kernel(vcpu->kvm)) {
3561                 kvm_queue_interrupt(vcpu, irq->irq, false);
3562                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3563                 return 0;
3564         }
3565
3566         /*
3567          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3568          * fail for in-kernel 8259.
3569          */
3570         if (pic_in_kernel(vcpu->kvm))
3571                 return -ENXIO;
3572
3573         if (vcpu->arch.pending_external_vector != -1)
3574                 return -EEXIST;
3575
3576         vcpu->arch.pending_external_vector = irq->irq;
3577         kvm_make_request(KVM_REQ_EVENT, vcpu);
3578         return 0;
3579 }
3580
3581 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3582 {
3583         kvm_inject_nmi(vcpu);
3584
3585         return 0;
3586 }
3587
3588 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3589 {
3590         kvm_make_request(KVM_REQ_SMI, vcpu);
3591
3592         return 0;
3593 }
3594
3595 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3596                                            struct kvm_tpr_access_ctl *tac)
3597 {
3598         if (tac->flags)
3599                 return -EINVAL;
3600         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3601         return 0;
3602 }
3603
3604 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3605                                         u64 mcg_cap)
3606 {
3607         int r;
3608         unsigned bank_num = mcg_cap & 0xff, bank;
3609
3610         r = -EINVAL;
3611         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3612                 goto out;
3613         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3614                 goto out;
3615         r = 0;
3616         vcpu->arch.mcg_cap = mcg_cap;
3617         /* Init IA32_MCG_CTL to all 1s */
3618         if (mcg_cap & MCG_CTL_P)
3619                 vcpu->arch.mcg_ctl = ~(u64)0;
3620         /* Init IA32_MCi_CTL to all 1s */
3621         for (bank = 0; bank < bank_num; bank++)
3622                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3623
3624         kvm_x86_ops->setup_mce(vcpu);
3625 out:
3626         return r;
3627 }
3628
3629 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3630                                       struct kvm_x86_mce *mce)
3631 {
3632         u64 mcg_cap = vcpu->arch.mcg_cap;
3633         unsigned bank_num = mcg_cap & 0xff;
3634         u64 *banks = vcpu->arch.mce_banks;
3635
3636         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3637                 return -EINVAL;
3638         /*
3639          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3640          * reporting is disabled
3641          */
3642         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3643             vcpu->arch.mcg_ctl != ~(u64)0)
3644                 return 0;
3645         banks += 4 * mce->bank;
3646         /*
3647          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3648          * reporting is disabled for the bank
3649          */
3650         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3651                 return 0;
3652         if (mce->status & MCI_STATUS_UC) {
3653                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3654                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3655                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3656                         return 0;
3657                 }
3658                 if (banks[1] & MCI_STATUS_VAL)
3659                         mce->status |= MCI_STATUS_OVER;
3660                 banks[2] = mce->addr;
3661                 banks[3] = mce->misc;
3662                 vcpu->arch.mcg_status = mce->mcg_status;
3663                 banks[1] = mce->status;
3664                 kvm_queue_exception(vcpu, MC_VECTOR);
3665         } else if (!(banks[1] & MCI_STATUS_VAL)
3666                    || !(banks[1] & MCI_STATUS_UC)) {
3667                 if (banks[1] & MCI_STATUS_VAL)
3668                         mce->status |= MCI_STATUS_OVER;
3669                 banks[2] = mce->addr;
3670                 banks[3] = mce->misc;
3671                 banks[1] = mce->status;
3672         } else
3673                 banks[1] |= MCI_STATUS_OVER;
3674         return 0;
3675 }
3676
3677 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3678                                                struct kvm_vcpu_events *events)
3679 {
3680         process_nmi(vcpu);
3681
3682         /*
3683          * The API doesn't provide the instruction length for software
3684          * exceptions, so don't report them. As long as the guest RIP
3685          * isn't advanced, we should expect to encounter the exception
3686          * again.
3687          */
3688         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3689                 events->exception.injected = 0;
3690                 events->exception.pending = 0;
3691         } else {
3692                 events->exception.injected = vcpu->arch.exception.injected;
3693                 events->exception.pending = vcpu->arch.exception.pending;
3694                 /*
3695                  * For ABI compatibility, deliberately conflate
3696                  * pending and injected exceptions when
3697                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3698                  */
3699                 if (!vcpu->kvm->arch.exception_payload_enabled)
3700                         events->exception.injected |=
3701                                 vcpu->arch.exception.pending;
3702         }
3703         events->exception.nr = vcpu->arch.exception.nr;
3704         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3705         events->exception.error_code = vcpu->arch.exception.error_code;
3706         events->exception_has_payload = vcpu->arch.exception.has_payload;
3707         events->exception_payload = vcpu->arch.exception.payload;
3708
3709         events->interrupt.injected =
3710                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3711         events->interrupt.nr = vcpu->arch.interrupt.nr;
3712         events->interrupt.soft = 0;
3713         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3714
3715         events->nmi.injected = vcpu->arch.nmi_injected;
3716         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3717         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3718         events->nmi.pad = 0;
3719
3720         events->sipi_vector = 0; /* never valid when reporting to user space */
3721
3722         events->smi.smm = is_smm(vcpu);
3723         events->smi.pending = vcpu->arch.smi_pending;
3724         events->smi.smm_inside_nmi =
3725                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3726         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3727
3728         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3729                          | KVM_VCPUEVENT_VALID_SHADOW
3730                          | KVM_VCPUEVENT_VALID_SMM);
3731         if (vcpu->kvm->arch.exception_payload_enabled)
3732                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3733
3734         memset(&events->reserved, 0, sizeof(events->reserved));
3735 }
3736
3737 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3738
3739 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3740                                               struct kvm_vcpu_events *events)
3741 {
3742         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3743                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3744                               | KVM_VCPUEVENT_VALID_SHADOW
3745                               | KVM_VCPUEVENT_VALID_SMM
3746                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3747                 return -EINVAL;
3748
3749         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3750                 if (!vcpu->kvm->arch.exception_payload_enabled)
3751                         return -EINVAL;
3752                 if (events->exception.pending)
3753                         events->exception.injected = 0;
3754                 else
3755                         events->exception_has_payload = 0;
3756         } else {
3757                 events->exception.pending = 0;
3758                 events->exception_has_payload = 0;
3759         }
3760
3761         if ((events->exception.injected || events->exception.pending) &&
3762             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3763                 return -EINVAL;
3764
3765         /* INITs are latched while in SMM */
3766         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3767             (events->smi.smm || events->smi.pending) &&
3768             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3769                 return -EINVAL;
3770
3771         process_nmi(vcpu);
3772         vcpu->arch.exception.injected = events->exception.injected;
3773         vcpu->arch.exception.pending = events->exception.pending;
3774         vcpu->arch.exception.nr = events->exception.nr;
3775         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3776         vcpu->arch.exception.error_code = events->exception.error_code;
3777         vcpu->arch.exception.has_payload = events->exception_has_payload;
3778         vcpu->arch.exception.payload = events->exception_payload;
3779
3780         vcpu->arch.interrupt.injected = events->interrupt.injected;
3781         vcpu->arch.interrupt.nr = events->interrupt.nr;
3782         vcpu->arch.interrupt.soft = events->interrupt.soft;
3783         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3784                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3785                                                   events->interrupt.shadow);
3786
3787         vcpu->arch.nmi_injected = events->nmi.injected;
3788         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3789                 vcpu->arch.nmi_pending = events->nmi.pending;
3790         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3791
3792         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3793             lapic_in_kernel(vcpu))
3794                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3795
3796         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3797                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3798                         if (events->smi.smm)
3799                                 vcpu->arch.hflags |= HF_SMM_MASK;
3800                         else
3801                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3802                         kvm_smm_changed(vcpu);
3803                 }
3804
3805                 vcpu->arch.smi_pending = events->smi.pending;
3806
3807                 if (events->smi.smm) {
3808                         if (events->smi.smm_inside_nmi)
3809                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3810                         else
3811                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3812                         if (lapic_in_kernel(vcpu)) {
3813                                 if (events->smi.latched_init)
3814                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3815                                 else
3816                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3817                         }
3818                 }
3819         }
3820
3821         kvm_make_request(KVM_REQ_EVENT, vcpu);
3822
3823         return 0;
3824 }
3825
3826 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3827                                              struct kvm_debugregs *dbgregs)
3828 {
3829         unsigned long val;
3830
3831         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3832         kvm_get_dr(vcpu, 6, &val);
3833         dbgregs->dr6 = val;
3834         dbgregs->dr7 = vcpu->arch.dr7;
3835         dbgregs->flags = 0;
3836         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3837 }
3838
3839 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3840                                             struct kvm_debugregs *dbgregs)
3841 {
3842         if (dbgregs->flags)
3843                 return -EINVAL;
3844
3845         if (dbgregs->dr6 & ~0xffffffffull)
3846                 return -EINVAL;
3847         if (dbgregs->dr7 & ~0xffffffffull)
3848                 return -EINVAL;
3849
3850         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3851         kvm_update_dr0123(vcpu);
3852         vcpu->arch.dr6 = dbgregs->dr6;
3853         kvm_update_dr6(vcpu);
3854         vcpu->arch.dr7 = dbgregs->dr7;
3855         kvm_update_dr7(vcpu);
3856
3857         return 0;
3858 }
3859
3860 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3861
3862 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3863 {
3864         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3865         u64 xstate_bv = xsave->header.xfeatures;
3866         u64 valid;
3867
3868         /*
3869          * Copy legacy XSAVE area, to avoid complications with CPUID
3870          * leaves 0 and 1 in the loop below.
3871          */
3872         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3873
3874         /* Set XSTATE_BV */
3875         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3876         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3877
3878         /*
3879          * Copy each region from the possibly compacted offset to the
3880          * non-compacted offset.
3881          */
3882         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3883         while (valid) {
3884                 u64 xfeature_mask = valid & -valid;
3885                 int xfeature_nr = fls64(xfeature_mask) - 1;
3886                 void *src = get_xsave_addr(xsave, xfeature_nr);
3887
3888                 if (src) {
3889                         u32 size, offset, ecx, edx;
3890                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3891                                     &size, &offset, &ecx, &edx);
3892                         if (xfeature_nr == XFEATURE_PKRU)
3893                                 memcpy(dest + offset, &vcpu->arch.pkru,
3894                                        sizeof(vcpu->arch.pkru));
3895                         else
3896                                 memcpy(dest + offset, src, size);
3897
3898                 }
3899
3900                 valid -= xfeature_mask;
3901         }
3902 }
3903
3904 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3905 {
3906         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3907         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3908         u64 valid;
3909
3910         /*
3911          * Copy legacy XSAVE area, to avoid complications with CPUID
3912          * leaves 0 and 1 in the loop below.
3913          */
3914         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3915
3916         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3917         xsave->header.xfeatures = xstate_bv;
3918         if (boot_cpu_has(X86_FEATURE_XSAVES))
3919                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3920
3921         /*
3922          * Copy each region from the non-compacted offset to the
3923          * possibly compacted offset.
3924          */
3925         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3926         while (valid) {
3927                 u64 xfeature_mask = valid & -valid;
3928                 int xfeature_nr = fls64(xfeature_mask) - 1;
3929                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3930
3931                 if (dest) {
3932                         u32 size, offset, ecx, edx;
3933                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3934                                     &size, &offset, &ecx, &edx);
3935                         if (xfeature_nr == XFEATURE_PKRU)
3936                                 memcpy(&vcpu->arch.pkru, src + offset,
3937                                        sizeof(vcpu->arch.pkru));
3938                         else
3939                                 memcpy(dest, src + offset, size);
3940                 }
3941
3942                 valid -= xfeature_mask;
3943         }
3944 }
3945
3946 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3947                                          struct kvm_xsave *guest_xsave)
3948 {
3949         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3950                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3951                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3952         } else {
3953                 memcpy(guest_xsave->region,
3954                         &vcpu->arch.guest_fpu->state.fxsave,
3955                         sizeof(struct fxregs_state));
3956                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3957                         XFEATURE_MASK_FPSSE;
3958         }
3959 }
3960
3961 #define XSAVE_MXCSR_OFFSET 24
3962
3963 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3964                                         struct kvm_xsave *guest_xsave)
3965 {
3966         u64 xstate_bv =
3967                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3968         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3969
3970         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3971                 /*
3972                  * Here we allow setting states that are not present in
3973                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3974                  * with old userspace.
3975                  */
3976                 if (xstate_bv & ~kvm_supported_xcr0() ||
3977                         mxcsr & ~mxcsr_feature_mask)
3978                         return -EINVAL;
3979                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3980         } else {
3981                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3982                         mxcsr & ~mxcsr_feature_mask)
3983                         return -EINVAL;
3984                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3985                         guest_xsave->region, sizeof(struct fxregs_state));
3986         }
3987         return 0;
3988 }
3989
3990 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3991                                         struct kvm_xcrs *guest_xcrs)
3992 {
3993         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3994                 guest_xcrs->nr_xcrs = 0;
3995                 return;
3996         }
3997
3998         guest_xcrs->nr_xcrs = 1;
3999         guest_xcrs->flags = 0;
4000         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4001         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4002 }
4003
4004 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4005                                        struct kvm_xcrs *guest_xcrs)
4006 {
4007         int i, r = 0;
4008
4009         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4010                 return -EINVAL;
4011
4012         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4013                 return -EINVAL;
4014
4015         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4016                 /* Only support XCR0 currently */
4017                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4018                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4019                                 guest_xcrs->xcrs[i].value);
4020                         break;
4021                 }
4022         if (r)
4023                 r = -EINVAL;
4024         return r;
4025 }
4026
4027 /*
4028  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4029  * stopped by the hypervisor.  This function will be called from the host only.
4030  * EINVAL is returned when the host attempts to set the flag for a guest that
4031  * does not support pv clocks.
4032  */
4033 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4034 {
4035         if (!vcpu->arch.pv_time_enabled)
4036                 return -EINVAL;
4037         vcpu->arch.pvclock_set_guest_stopped_request = true;
4038         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4039         return 0;
4040 }
4041
4042 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4043                                      struct kvm_enable_cap *cap)
4044 {
4045         int r;
4046         uint16_t vmcs_version;
4047         void __user *user_ptr;
4048
4049         if (cap->flags)
4050                 return -EINVAL;
4051
4052         switch (cap->cap) {
4053         case KVM_CAP_HYPERV_SYNIC2:
4054                 if (cap->args[0])
4055                         return -EINVAL;
4056                 /* fall through */
4057
4058         case KVM_CAP_HYPERV_SYNIC:
4059                 if (!irqchip_in_kernel(vcpu->kvm))
4060                         return -EINVAL;
4061                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4062                                              KVM_CAP_HYPERV_SYNIC2);
4063         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4064                 if (!kvm_x86_ops->nested_enable_evmcs)
4065                         return -ENOTTY;
4066                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4067                 if (!r) {
4068                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4069                         if (copy_to_user(user_ptr, &vmcs_version,
4070                                          sizeof(vmcs_version)))
4071                                 r = -EFAULT;
4072                 }
4073                 return r;
4074         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4075                 if (!kvm_x86_ops->enable_direct_tlbflush)
4076                         return -ENOTTY;
4077
4078                 return kvm_x86_ops->enable_direct_tlbflush(vcpu);
4079
4080         default:
4081                 return -EINVAL;
4082         }
4083 }
4084
4085 long kvm_arch_vcpu_ioctl(struct file *filp,
4086                          unsigned int ioctl, unsigned long arg)
4087 {
4088         struct kvm_vcpu *vcpu = filp->private_data;
4089         void __user *argp = (void __user *)arg;
4090         int r;
4091         union {
4092                 struct kvm_lapic_state *lapic;
4093                 struct kvm_xsave *xsave;
4094                 struct kvm_xcrs *xcrs;
4095                 void *buffer;
4096         } u;
4097
4098         vcpu_load(vcpu);
4099
4100         u.buffer = NULL;
4101         switch (ioctl) {
4102         case KVM_GET_LAPIC: {
4103                 r = -EINVAL;
4104                 if (!lapic_in_kernel(vcpu))
4105                         goto out;
4106                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4107                                 GFP_KERNEL_ACCOUNT);
4108
4109                 r = -ENOMEM;
4110                 if (!u.lapic)
4111                         goto out;
4112                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4113                 if (r)
4114                         goto out;
4115                 r = -EFAULT;
4116                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4117                         goto out;
4118                 r = 0;
4119                 break;
4120         }
4121         case KVM_SET_LAPIC: {
4122                 r = -EINVAL;
4123                 if (!lapic_in_kernel(vcpu))
4124                         goto out;
4125                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4126                 if (IS_ERR(u.lapic)) {
4127                         r = PTR_ERR(u.lapic);
4128                         goto out_nofree;
4129                 }
4130
4131                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4132                 break;
4133         }
4134         case KVM_INTERRUPT: {
4135                 struct kvm_interrupt irq;
4136
4137                 r = -EFAULT;
4138                 if (copy_from_user(&irq, argp, sizeof(irq)))
4139                         goto out;
4140                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4141                 break;
4142         }
4143         case KVM_NMI: {
4144                 r = kvm_vcpu_ioctl_nmi(vcpu);
4145                 break;
4146         }
4147         case KVM_SMI: {
4148                 r = kvm_vcpu_ioctl_smi(vcpu);
4149                 break;
4150         }
4151         case KVM_SET_CPUID: {
4152                 struct kvm_cpuid __user *cpuid_arg = argp;
4153                 struct kvm_cpuid cpuid;
4154
4155                 r = -EFAULT;
4156                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4157                         goto out;
4158                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4159                 break;
4160         }
4161         case KVM_SET_CPUID2: {
4162                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4163                 struct kvm_cpuid2 cpuid;
4164
4165                 r = -EFAULT;
4166                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4167                         goto out;
4168                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4169                                               cpuid_arg->entries);
4170                 break;
4171         }
4172         case KVM_GET_CPUID2: {
4173                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4174                 struct kvm_cpuid2 cpuid;
4175
4176                 r = -EFAULT;
4177                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4178                         goto out;
4179                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4180                                               cpuid_arg->entries);
4181                 if (r)
4182                         goto out;
4183                 r = -EFAULT;
4184                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4185                         goto out;
4186                 r = 0;
4187                 break;
4188         }
4189         case KVM_GET_MSRS: {
4190                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4191                 r = msr_io(vcpu, argp, do_get_msr, 1);
4192                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4193                 break;
4194         }
4195         case KVM_SET_MSRS: {
4196                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4197                 r = msr_io(vcpu, argp, do_set_msr, 0);
4198                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4199                 break;
4200         }
4201         case KVM_TPR_ACCESS_REPORTING: {
4202                 struct kvm_tpr_access_ctl tac;
4203
4204                 r = -EFAULT;
4205                 if (copy_from_user(&tac, argp, sizeof(tac)))
4206                         goto out;
4207                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4208                 if (r)
4209                         goto out;
4210                 r = -EFAULT;
4211                 if (copy_to_user(argp, &tac, sizeof(tac)))
4212                         goto out;
4213                 r = 0;
4214                 break;
4215         };
4216         case KVM_SET_VAPIC_ADDR: {
4217                 struct kvm_vapic_addr va;
4218                 int idx;
4219
4220                 r = -EINVAL;
4221                 if (!lapic_in_kernel(vcpu))
4222                         goto out;
4223                 r = -EFAULT;
4224                 if (copy_from_user(&va, argp, sizeof(va)))
4225                         goto out;
4226                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4227                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4228                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4229                 break;
4230         }
4231         case KVM_X86_SETUP_MCE: {
4232                 u64 mcg_cap;
4233
4234                 r = -EFAULT;
4235                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4236                         goto out;
4237                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4238                 break;
4239         }
4240         case KVM_X86_SET_MCE: {
4241                 struct kvm_x86_mce mce;
4242
4243                 r = -EFAULT;
4244                 if (copy_from_user(&mce, argp, sizeof(mce)))
4245                         goto out;
4246                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4247                 break;
4248         }
4249         case KVM_GET_VCPU_EVENTS: {
4250                 struct kvm_vcpu_events events;
4251
4252                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4253
4254                 r = -EFAULT;
4255                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4256                         break;
4257                 r = 0;
4258                 break;
4259         }
4260         case KVM_SET_VCPU_EVENTS: {
4261                 struct kvm_vcpu_events events;
4262
4263                 r = -EFAULT;
4264                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4265                         break;
4266
4267                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4268                 break;
4269         }
4270         case KVM_GET_DEBUGREGS: {
4271                 struct kvm_debugregs dbgregs;
4272
4273                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4274
4275                 r = -EFAULT;
4276                 if (copy_to_user(argp, &dbgregs,
4277                                  sizeof(struct kvm_debugregs)))
4278                         break;
4279                 r = 0;
4280                 break;
4281         }
4282         case KVM_SET_DEBUGREGS: {
4283                 struct kvm_debugregs dbgregs;
4284
4285                 r = -EFAULT;
4286                 if (copy_from_user(&dbgregs, argp,
4287                                    sizeof(struct kvm_debugregs)))
4288                         break;
4289
4290                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4291                 break;
4292         }
4293         case KVM_GET_XSAVE: {
4294                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4295                 r = -ENOMEM;
4296                 if (!u.xsave)
4297                         break;
4298
4299                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4300
4301                 r = -EFAULT;
4302                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4303                         break;
4304                 r = 0;
4305                 break;
4306         }
4307         case KVM_SET_XSAVE: {
4308                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4309                 if (IS_ERR(u.xsave)) {
4310                         r = PTR_ERR(u.xsave);
4311                         goto out_nofree;
4312                 }
4313
4314                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4315                 break;
4316         }
4317         case KVM_GET_XCRS: {
4318                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4319                 r = -ENOMEM;
4320                 if (!u.xcrs)
4321                         break;
4322
4323                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4324
4325                 r = -EFAULT;
4326                 if (copy_to_user(argp, u.xcrs,
4327                                  sizeof(struct kvm_xcrs)))
4328                         break;
4329                 r = 0;
4330                 break;
4331         }
4332         case KVM_SET_XCRS: {
4333                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4334                 if (IS_ERR(u.xcrs)) {
4335                         r = PTR_ERR(u.xcrs);
4336                         goto out_nofree;
4337                 }
4338
4339                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4340                 break;
4341         }
4342         case KVM_SET_TSC_KHZ: {
4343                 u32 user_tsc_khz;
4344
4345                 r = -EINVAL;
4346                 user_tsc_khz = (u32)arg;
4347
4348                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4349                         goto out;
4350
4351                 if (user_tsc_khz == 0)
4352                         user_tsc_khz = tsc_khz;
4353
4354                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4355                         r = 0;
4356
4357                 goto out;
4358         }
4359         case KVM_GET_TSC_KHZ: {
4360                 r = vcpu->arch.virtual_tsc_khz;
4361                 goto out;
4362         }
4363         case KVM_KVMCLOCK_CTRL: {
4364                 r = kvm_set_guest_paused(vcpu);
4365                 goto out;
4366         }
4367         case KVM_ENABLE_CAP: {
4368                 struct kvm_enable_cap cap;
4369
4370                 r = -EFAULT;
4371                 if (copy_from_user(&cap, argp, sizeof(cap)))
4372                         goto out;
4373                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4374                 break;
4375         }
4376         case KVM_GET_NESTED_STATE: {
4377                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4378                 u32 user_data_size;
4379
4380                 r = -EINVAL;
4381                 if (!kvm_x86_ops->get_nested_state)
4382                         break;
4383
4384                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4385                 r = -EFAULT;
4386                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4387                         break;
4388
4389                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4390                                                   user_data_size);
4391                 if (r < 0)
4392                         break;
4393
4394                 if (r > user_data_size) {
4395                         if (put_user(r, &user_kvm_nested_state->size))
4396                                 r = -EFAULT;
4397                         else
4398                                 r = -E2BIG;
4399                         break;
4400                 }
4401
4402                 r = 0;
4403                 break;
4404         }
4405         case KVM_SET_NESTED_STATE: {
4406                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4407                 struct kvm_nested_state kvm_state;
4408
4409                 r = -EINVAL;
4410                 if (!kvm_x86_ops->set_nested_state)
4411                         break;
4412
4413                 r = -EFAULT;
4414                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4415                         break;
4416
4417                 r = -EINVAL;
4418                 if (kvm_state.size < sizeof(kvm_state))
4419                         break;
4420
4421                 if (kvm_state.flags &
4422                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4423                       | KVM_STATE_NESTED_EVMCS))
4424                         break;
4425
4426                 /* nested_run_pending implies guest_mode.  */
4427                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4428                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4429                         break;
4430
4431                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4432                 break;
4433         }
4434         case KVM_GET_SUPPORTED_HV_CPUID: {
4435                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4436                 struct kvm_cpuid2 cpuid;
4437
4438                 r = -EFAULT;
4439                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4440                         goto out;
4441
4442                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4443                                                 cpuid_arg->entries);
4444                 if (r)
4445                         goto out;
4446
4447                 r = -EFAULT;
4448                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4449                         goto out;
4450                 r = 0;
4451                 break;
4452         }
4453         default:
4454                 r = -EINVAL;
4455         }
4456 out:
4457         kfree(u.buffer);
4458 out_nofree:
4459         vcpu_put(vcpu);
4460         return r;
4461 }
4462
4463 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4464 {
4465         return VM_FAULT_SIGBUS;
4466 }
4467
4468 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4469 {
4470         int ret;
4471
4472         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4473                 return -EINVAL;
4474         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4475         return ret;
4476 }
4477
4478 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4479                                               u64 ident_addr)
4480 {
4481         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4482 }
4483
4484 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4485                                          unsigned long kvm_nr_mmu_pages)
4486 {
4487         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4488                 return -EINVAL;
4489
4490         mutex_lock(&kvm->slots_lock);
4491
4492         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4493         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4494
4495         mutex_unlock(&kvm->slots_lock);
4496         return 0;
4497 }
4498
4499 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4500 {
4501         return kvm->arch.n_max_mmu_pages;
4502 }
4503
4504 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4505 {
4506         struct kvm_pic *pic = kvm->arch.vpic;
4507         int r;
4508
4509         r = 0;
4510         switch (chip->chip_id) {
4511         case KVM_IRQCHIP_PIC_MASTER:
4512                 memcpy(&chip->chip.pic, &pic->pics[0],
4513                         sizeof(struct kvm_pic_state));
4514                 break;
4515         case KVM_IRQCHIP_PIC_SLAVE:
4516                 memcpy(&chip->chip.pic, &pic->pics[1],
4517                         sizeof(struct kvm_pic_state));
4518                 break;
4519         case KVM_IRQCHIP_IOAPIC:
4520                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4521                 break;
4522         default:
4523                 r = -EINVAL;
4524                 break;
4525         }
4526         return r;
4527 }
4528
4529 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4530 {
4531         struct kvm_pic *pic = kvm->arch.vpic;
4532         int r;
4533
4534         r = 0;
4535         switch (chip->chip_id) {
4536         case KVM_IRQCHIP_PIC_MASTER:
4537                 spin_lock(&pic->lock);
4538                 memcpy(&pic->pics[0], &chip->chip.pic,
4539                         sizeof(struct kvm_pic_state));
4540                 spin_unlock(&pic->lock);
4541                 break;
4542         case KVM_IRQCHIP_PIC_SLAVE:
4543                 spin_lock(&pic->lock);
4544                 memcpy(&pic->pics[1], &chip->chip.pic,
4545                         sizeof(struct kvm_pic_state));
4546                 spin_unlock(&pic->lock);
4547                 break;
4548         case KVM_IRQCHIP_IOAPIC:
4549                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4550                 break;
4551         default:
4552                 r = -EINVAL;
4553                 break;
4554         }
4555         kvm_pic_update_irq(pic);
4556         return r;
4557 }
4558
4559 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4560 {
4561         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4562
4563         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4564
4565         mutex_lock(&kps->lock);
4566         memcpy(ps, &kps->channels, sizeof(*ps));
4567         mutex_unlock(&kps->lock);
4568         return 0;
4569 }
4570
4571 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4572 {
4573         int i;
4574         struct kvm_pit *pit = kvm->arch.vpit;
4575
4576         mutex_lock(&pit->pit_state.lock);
4577         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4578         for (i = 0; i < 3; i++)
4579                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4580         mutex_unlock(&pit->pit_state.lock);
4581         return 0;
4582 }
4583
4584 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4585 {
4586         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4587         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4588                 sizeof(ps->channels));
4589         ps->flags = kvm->arch.vpit->pit_state.flags;
4590         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4591         memset(&ps->reserved, 0, sizeof(ps->reserved));
4592         return 0;
4593 }
4594
4595 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4596 {
4597         int start = 0;
4598         int i;
4599         u32 prev_legacy, cur_legacy;
4600         struct kvm_pit *pit = kvm->arch.vpit;
4601
4602         mutex_lock(&pit->pit_state.lock);
4603         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4604         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4605         if (!prev_legacy && cur_legacy)
4606                 start = 1;
4607         memcpy(&pit->pit_state.channels, &ps->channels,
4608                sizeof(pit->pit_state.channels));
4609         pit->pit_state.flags = ps->flags;
4610         for (i = 0; i < 3; i++)
4611                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4612                                    start && i == 0);
4613         mutex_unlock(&pit->pit_state.lock);
4614         return 0;
4615 }
4616
4617 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4618                                  struct kvm_reinject_control *control)
4619 {
4620         struct kvm_pit *pit = kvm->arch.vpit;
4621
4622         if (!pit)
4623                 return -ENXIO;
4624
4625         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4626          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4627          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4628          */
4629         mutex_lock(&pit->pit_state.lock);
4630         kvm_pit_set_reinject(pit, control->pit_reinject);
4631         mutex_unlock(&pit->pit_state.lock);
4632
4633         return 0;
4634 }
4635
4636 /**
4637  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4638  * @kvm: kvm instance
4639  * @log: slot id and address to which we copy the log
4640  *
4641  * Steps 1-4 below provide general overview of dirty page logging. See
4642  * kvm_get_dirty_log_protect() function description for additional details.
4643  *
4644  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4645  * always flush the TLB (step 4) even if previous step failed  and the dirty
4646  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4647  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4648  * writes will be marked dirty for next log read.
4649  *
4650  *   1. Take a snapshot of the bit and clear it if needed.
4651  *   2. Write protect the corresponding page.
4652  *   3. Copy the snapshot to the userspace.
4653  *   4. Flush TLB's if needed.
4654  */
4655 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4656 {
4657         bool flush = false;
4658         int r;
4659
4660         mutex_lock(&kvm->slots_lock);
4661
4662         /*
4663          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4664          */
4665         if (kvm_x86_ops->flush_log_dirty)
4666                 kvm_x86_ops->flush_log_dirty(kvm);
4667
4668         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4669
4670         /*
4671          * All the TLBs can be flushed out of mmu lock, see the comments in
4672          * kvm_mmu_slot_remove_write_access().
4673          */
4674         lockdep_assert_held(&kvm->slots_lock);
4675         if (flush)
4676                 kvm_flush_remote_tlbs(kvm);
4677
4678         mutex_unlock(&kvm->slots_lock);
4679         return r;
4680 }
4681
4682 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4683 {
4684         bool flush = false;
4685         int r;
4686
4687         mutex_lock(&kvm->slots_lock);
4688
4689         /*
4690          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4691          */
4692         if (kvm_x86_ops->flush_log_dirty)
4693                 kvm_x86_ops->flush_log_dirty(kvm);
4694
4695         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4696
4697         /*
4698          * All the TLBs can be flushed out of mmu lock, see the comments in
4699          * kvm_mmu_slot_remove_write_access().
4700          */
4701         lockdep_assert_held(&kvm->slots_lock);
4702         if (flush)
4703                 kvm_flush_remote_tlbs(kvm);
4704
4705         mutex_unlock(&kvm->slots_lock);
4706         return r;
4707 }
4708
4709 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4710                         bool line_status)
4711 {
4712         if (!irqchip_in_kernel(kvm))
4713                 return -ENXIO;
4714
4715         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4716                                         irq_event->irq, irq_event->level,
4717                                         line_status);
4718         return 0;
4719 }
4720
4721 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4722                             struct kvm_enable_cap *cap)
4723 {
4724         int r;
4725
4726         if (cap->flags)
4727                 return -EINVAL;
4728
4729         switch (cap->cap) {
4730         case KVM_CAP_DISABLE_QUIRKS:
4731                 kvm->arch.disabled_quirks = cap->args[0];
4732                 r = 0;
4733                 break;
4734         case KVM_CAP_SPLIT_IRQCHIP: {
4735                 mutex_lock(&kvm->lock);
4736                 r = -EINVAL;
4737                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4738                         goto split_irqchip_unlock;
4739                 r = -EEXIST;
4740                 if (irqchip_in_kernel(kvm))
4741                         goto split_irqchip_unlock;
4742                 if (kvm->created_vcpus)
4743                         goto split_irqchip_unlock;
4744                 r = kvm_setup_empty_irq_routing(kvm);
4745                 if (r)
4746                         goto split_irqchip_unlock;
4747                 /* Pairs with irqchip_in_kernel. */
4748                 smp_wmb();
4749                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4750                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4751                 r = 0;
4752 split_irqchip_unlock:
4753                 mutex_unlock(&kvm->lock);
4754                 break;
4755         }
4756         case KVM_CAP_X2APIC_API:
4757                 r = -EINVAL;
4758                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4759                         break;
4760
4761                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4762                         kvm->arch.x2apic_format = true;
4763                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4764                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4765
4766                 r = 0;
4767                 break;
4768         case KVM_CAP_X86_DISABLE_EXITS:
4769                 r = -EINVAL;
4770                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4771                         break;
4772
4773                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4774                         kvm_can_mwait_in_guest())
4775                         kvm->arch.mwait_in_guest = true;
4776                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4777                         kvm->arch.hlt_in_guest = true;
4778                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4779                         kvm->arch.pause_in_guest = true;
4780                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4781                         kvm->arch.cstate_in_guest = true;
4782                 r = 0;
4783                 break;
4784         case KVM_CAP_MSR_PLATFORM_INFO:
4785                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4786                 r = 0;
4787                 break;
4788         case KVM_CAP_EXCEPTION_PAYLOAD:
4789                 kvm->arch.exception_payload_enabled = cap->args[0];
4790                 r = 0;
4791                 break;
4792         default:
4793                 r = -EINVAL;
4794                 break;
4795         }
4796         return r;
4797 }
4798
4799 long kvm_arch_vm_ioctl(struct file *filp,
4800                        unsigned int ioctl, unsigned long arg)
4801 {
4802         struct kvm *kvm = filp->private_data;
4803         void __user *argp = (void __user *)arg;
4804         int r = -ENOTTY;
4805         /*
4806          * This union makes it completely explicit to gcc-3.x
4807          * that these two variables' stack usage should be
4808          * combined, not added together.
4809          */
4810         union {
4811                 struct kvm_pit_state ps;
4812                 struct kvm_pit_state2 ps2;
4813                 struct kvm_pit_config pit_config;
4814         } u;
4815
4816         switch (ioctl) {
4817         case KVM_SET_TSS_ADDR:
4818                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4819                 break;
4820         case KVM_SET_IDENTITY_MAP_ADDR: {
4821                 u64 ident_addr;
4822
4823                 mutex_lock(&kvm->lock);
4824                 r = -EINVAL;
4825                 if (kvm->created_vcpus)
4826                         goto set_identity_unlock;
4827                 r = -EFAULT;
4828                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4829                         goto set_identity_unlock;
4830                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4831 set_identity_unlock:
4832                 mutex_unlock(&kvm->lock);
4833                 break;
4834         }
4835         case KVM_SET_NR_MMU_PAGES:
4836                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4837                 break;
4838         case KVM_GET_NR_MMU_PAGES:
4839                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4840                 break;
4841         case KVM_CREATE_IRQCHIP: {
4842                 mutex_lock(&kvm->lock);
4843
4844                 r = -EEXIST;
4845                 if (irqchip_in_kernel(kvm))
4846                         goto create_irqchip_unlock;
4847
4848                 r = -EINVAL;
4849                 if (kvm->created_vcpus)
4850                         goto create_irqchip_unlock;
4851
4852                 r = kvm_pic_init(kvm);
4853                 if (r)
4854                         goto create_irqchip_unlock;
4855
4856                 r = kvm_ioapic_init(kvm);
4857                 if (r) {
4858                         kvm_pic_destroy(kvm);
4859                         goto create_irqchip_unlock;
4860                 }
4861
4862                 r = kvm_setup_default_irq_routing(kvm);
4863                 if (r) {
4864                         kvm_ioapic_destroy(kvm);
4865                         kvm_pic_destroy(kvm);
4866                         goto create_irqchip_unlock;
4867                 }
4868                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4869                 smp_wmb();
4870                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4871         create_irqchip_unlock:
4872                 mutex_unlock(&kvm->lock);
4873                 break;
4874         }
4875         case KVM_CREATE_PIT:
4876                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4877                 goto create_pit;
4878         case KVM_CREATE_PIT2:
4879                 r = -EFAULT;
4880                 if (copy_from_user(&u.pit_config, argp,
4881                                    sizeof(struct kvm_pit_config)))
4882                         goto out;
4883         create_pit:
4884                 mutex_lock(&kvm->lock);
4885                 r = -EEXIST;
4886                 if (kvm->arch.vpit)
4887                         goto create_pit_unlock;
4888                 r = -ENOMEM;
4889                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4890                 if (kvm->arch.vpit)
4891                         r = 0;
4892         create_pit_unlock:
4893                 mutex_unlock(&kvm->lock);
4894                 break;
4895         case KVM_GET_IRQCHIP: {
4896                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4897                 struct kvm_irqchip *chip;
4898
4899                 chip = memdup_user(argp, sizeof(*chip));
4900                 if (IS_ERR(chip)) {
4901                         r = PTR_ERR(chip);
4902                         goto out;
4903                 }
4904
4905                 r = -ENXIO;
4906                 if (!irqchip_kernel(kvm))
4907                         goto get_irqchip_out;
4908                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4909                 if (r)
4910                         goto get_irqchip_out;
4911                 r = -EFAULT;
4912                 if (copy_to_user(argp, chip, sizeof(*chip)))
4913                         goto get_irqchip_out;
4914                 r = 0;
4915         get_irqchip_out:
4916                 kfree(chip);
4917                 break;
4918         }
4919         case KVM_SET_IRQCHIP: {
4920                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4921                 struct kvm_irqchip *chip;
4922
4923                 chip = memdup_user(argp, sizeof(*chip));
4924                 if (IS_ERR(chip)) {
4925                         r = PTR_ERR(chip);
4926                         goto out;
4927                 }
4928
4929                 r = -ENXIO;
4930                 if (!irqchip_kernel(kvm))
4931                         goto set_irqchip_out;
4932                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4933                 if (r)
4934                         goto set_irqchip_out;
4935                 r = 0;
4936         set_irqchip_out:
4937                 kfree(chip);
4938                 break;
4939         }
4940         case KVM_GET_PIT: {
4941                 r = -EFAULT;
4942                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4943                         goto out;
4944                 r = -ENXIO;
4945                 if (!kvm->arch.vpit)
4946                         goto out;
4947                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4948                 if (r)
4949                         goto out;
4950                 r = -EFAULT;
4951                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4952                         goto out;
4953                 r = 0;
4954                 break;
4955         }
4956         case KVM_SET_PIT: {
4957                 r = -EFAULT;
4958                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4959                         goto out;
4960                 r = -ENXIO;
4961                 if (!kvm->arch.vpit)
4962                         goto out;
4963                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4964                 break;
4965         }
4966         case KVM_GET_PIT2: {
4967                 r = -ENXIO;
4968                 if (!kvm->arch.vpit)
4969                         goto out;
4970                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4971                 if (r)
4972                         goto out;
4973                 r = -EFAULT;
4974                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4975                         goto out;
4976                 r = 0;
4977                 break;
4978         }
4979         case KVM_SET_PIT2: {
4980                 r = -EFAULT;
4981                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4982                         goto out;
4983                 r = -ENXIO;
4984                 if (!kvm->arch.vpit)
4985                         goto out;
4986                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4987                 break;
4988         }
4989         case KVM_REINJECT_CONTROL: {
4990                 struct kvm_reinject_control control;
4991                 r =  -EFAULT;
4992                 if (copy_from_user(&control, argp, sizeof(control)))
4993                         goto out;
4994                 r = kvm_vm_ioctl_reinject(kvm, &control);
4995                 break;
4996         }
4997         case KVM_SET_BOOT_CPU_ID:
4998                 r = 0;
4999                 mutex_lock(&kvm->lock);
5000                 if (kvm->created_vcpus)
5001                         r = -EBUSY;
5002                 else
5003                         kvm->arch.bsp_vcpu_id = arg;
5004                 mutex_unlock(&kvm->lock);
5005                 break;
5006         case KVM_XEN_HVM_CONFIG: {
5007                 struct kvm_xen_hvm_config xhc;
5008                 r = -EFAULT;
5009                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5010                         goto out;
5011                 r = -EINVAL;
5012                 if (xhc.flags)
5013                         goto out;
5014                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5015                 r = 0;
5016                 break;
5017         }
5018         case KVM_SET_CLOCK: {
5019                 struct kvm_clock_data user_ns;
5020                 u64 now_ns;
5021
5022                 r = -EFAULT;
5023                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5024                         goto out;
5025
5026                 r = -EINVAL;
5027                 if (user_ns.flags)
5028                         goto out;
5029
5030                 r = 0;
5031                 /*
5032                  * TODO: userspace has to take care of races with VCPU_RUN, so
5033                  * kvm_gen_update_masterclock() can be cut down to locked
5034                  * pvclock_update_vm_gtod_copy().
5035                  */
5036                 kvm_gen_update_masterclock(kvm);
5037                 now_ns = get_kvmclock_ns(kvm);
5038                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5039                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5040                 break;
5041         }
5042         case KVM_GET_CLOCK: {
5043                 struct kvm_clock_data user_ns;
5044                 u64 now_ns;
5045
5046                 now_ns = get_kvmclock_ns(kvm);
5047                 user_ns.clock = now_ns;
5048                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5049                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5050
5051                 r = -EFAULT;
5052                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5053                         goto out;
5054                 r = 0;
5055                 break;
5056         }
5057         case KVM_MEMORY_ENCRYPT_OP: {
5058                 r = -ENOTTY;
5059                 if (kvm_x86_ops->mem_enc_op)
5060                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5061                 break;
5062         }
5063         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5064                 struct kvm_enc_region region;
5065
5066                 r = -EFAULT;
5067                 if (copy_from_user(&region, argp, sizeof(region)))
5068                         goto out;
5069
5070                 r = -ENOTTY;
5071                 if (kvm_x86_ops->mem_enc_reg_region)
5072                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5073                 break;
5074         }
5075         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5076                 struct kvm_enc_region region;
5077
5078                 r = -EFAULT;
5079                 if (copy_from_user(&region, argp, sizeof(region)))
5080                         goto out;
5081
5082                 r = -ENOTTY;
5083                 if (kvm_x86_ops->mem_enc_unreg_region)
5084                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5085                 break;
5086         }
5087         case KVM_HYPERV_EVENTFD: {
5088                 struct kvm_hyperv_eventfd hvevfd;
5089
5090                 r = -EFAULT;
5091                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5092                         goto out;
5093                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5094                 break;
5095         }
5096         case KVM_SET_PMU_EVENT_FILTER:
5097                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5098                 break;
5099         default:
5100                 r = -ENOTTY;
5101         }
5102 out:
5103         return r;
5104 }
5105
5106 static void kvm_init_msr_list(void)
5107 {
5108         u32 dummy[2];
5109         unsigned i, j;
5110
5111         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5112                          "Please update the fixed PMCs in msrs_to_save[]");
5113         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_GENERIC != 32,
5114                          "Please update the generic perfctr/eventsel MSRs in msrs_to_save[]");
5115
5116         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
5117                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
5118                         continue;
5119
5120                 /*
5121                  * Even MSRs that are valid in the host may not be exposed
5122                  * to the guests in some cases.
5123                  */
5124                 switch (msrs_to_save[i]) {
5125                 case MSR_IA32_BNDCFGS:
5126                         if (!kvm_mpx_supported())
5127                                 continue;
5128                         break;
5129                 case MSR_TSC_AUX:
5130                         if (!kvm_x86_ops->rdtscp_supported())
5131                                 continue;
5132                         break;
5133                 case MSR_IA32_RTIT_CTL:
5134                 case MSR_IA32_RTIT_STATUS:
5135                         if (!kvm_x86_ops->pt_supported())
5136                                 continue;
5137                         break;
5138                 case MSR_IA32_RTIT_CR3_MATCH:
5139                         if (!kvm_x86_ops->pt_supported() ||
5140                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5141                                 continue;
5142                         break;
5143                 case MSR_IA32_RTIT_OUTPUT_BASE:
5144                 case MSR_IA32_RTIT_OUTPUT_MASK:
5145                         if (!kvm_x86_ops->pt_supported() ||
5146                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5147                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5148                                 continue;
5149                         break;
5150                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5151                         if (!kvm_x86_ops->pt_supported() ||
5152                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5153                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5154                                 continue;
5155                         break;
5156                 }
5157                 default:
5158                         break;
5159                 }
5160
5161                 if (j < i)
5162                         msrs_to_save[j] = msrs_to_save[i];
5163                 j++;
5164         }
5165         num_msrs_to_save = j;
5166
5167         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5168                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5169                         continue;
5170
5171                 if (j < i)
5172                         emulated_msrs[j] = emulated_msrs[i];
5173                 j++;
5174         }
5175         num_emulated_msrs = j;
5176
5177         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5178                 struct kvm_msr_entry msr;
5179
5180                 msr.index = msr_based_features[i];
5181                 if (kvm_get_msr_feature(&msr))
5182                         continue;
5183
5184                 if (j < i)
5185                         msr_based_features[j] = msr_based_features[i];
5186                 j++;
5187         }
5188         num_msr_based_features = j;
5189 }
5190
5191 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5192                            const void *v)
5193 {
5194         int handled = 0;
5195         int n;
5196
5197         do {
5198                 n = min(len, 8);
5199                 if (!(lapic_in_kernel(vcpu) &&
5200                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5201                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5202                         break;
5203                 handled += n;
5204                 addr += n;
5205                 len -= n;
5206                 v += n;
5207         } while (len);
5208
5209         return handled;
5210 }
5211
5212 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5213 {
5214         int handled = 0;
5215         int n;
5216
5217         do {
5218                 n = min(len, 8);
5219                 if (!(lapic_in_kernel(vcpu) &&
5220                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5221                                          addr, n, v))
5222                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5223                         break;
5224                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5225                 handled += n;
5226                 addr += n;
5227                 len -= n;
5228                 v += n;
5229         } while (len);
5230
5231         return handled;
5232 }
5233
5234 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5235                         struct kvm_segment *var, int seg)
5236 {
5237         kvm_x86_ops->set_segment(vcpu, var, seg);
5238 }
5239
5240 void kvm_get_segment(struct kvm_vcpu *vcpu,
5241                      struct kvm_segment *var, int seg)
5242 {
5243         kvm_x86_ops->get_segment(vcpu, var, seg);
5244 }
5245
5246 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5247                            struct x86_exception *exception)
5248 {
5249         gpa_t t_gpa;
5250
5251         BUG_ON(!mmu_is_nested(vcpu));
5252
5253         /* NPT walks are always user-walks */
5254         access |= PFERR_USER_MASK;
5255         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5256
5257         return t_gpa;
5258 }
5259
5260 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5261                               struct x86_exception *exception)
5262 {
5263         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5264         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5265 }
5266
5267  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5268                                 struct x86_exception *exception)
5269 {
5270         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5271         access |= PFERR_FETCH_MASK;
5272         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5273 }
5274
5275 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5276                                struct x86_exception *exception)
5277 {
5278         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5279         access |= PFERR_WRITE_MASK;
5280         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5281 }
5282
5283 /* uses this to access any guest's mapped memory without checking CPL */
5284 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5285                                 struct x86_exception *exception)
5286 {
5287         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5288 }
5289
5290 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5291                                       struct kvm_vcpu *vcpu, u32 access,
5292                                       struct x86_exception *exception)
5293 {
5294         void *data = val;
5295         int r = X86EMUL_CONTINUE;
5296
5297         while (bytes) {
5298                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5299                                                             exception);
5300                 unsigned offset = addr & (PAGE_SIZE-1);
5301                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5302                 int ret;
5303
5304                 if (gpa == UNMAPPED_GVA)
5305                         return X86EMUL_PROPAGATE_FAULT;
5306                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5307                                                offset, toread);
5308                 if (ret < 0) {
5309                         r = X86EMUL_IO_NEEDED;
5310                         goto out;
5311                 }
5312
5313                 bytes -= toread;
5314                 data += toread;
5315                 addr += toread;
5316         }
5317 out:
5318         return r;
5319 }
5320
5321 /* used for instruction fetching */
5322 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5323                                 gva_t addr, void *val, unsigned int bytes,
5324                                 struct x86_exception *exception)
5325 {
5326         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5327         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5328         unsigned offset;
5329         int ret;
5330
5331         /* Inline kvm_read_guest_virt_helper for speed.  */
5332         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5333                                                     exception);
5334         if (unlikely(gpa == UNMAPPED_GVA))
5335                 return X86EMUL_PROPAGATE_FAULT;
5336
5337         offset = addr & (PAGE_SIZE-1);
5338         if (WARN_ON(offset + bytes > PAGE_SIZE))
5339                 bytes = (unsigned)PAGE_SIZE - offset;
5340         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5341                                        offset, bytes);
5342         if (unlikely(ret < 0))
5343                 return X86EMUL_IO_NEEDED;
5344
5345         return X86EMUL_CONTINUE;
5346 }
5347
5348 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5349                                gva_t addr, void *val, unsigned int bytes,
5350                                struct x86_exception *exception)
5351 {
5352         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5353
5354         /*
5355          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5356          * is returned, but our callers are not ready for that and they blindly
5357          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5358          * uninitialized kernel stack memory into cr2 and error code.
5359          */
5360         memset(exception, 0, sizeof(*exception));
5361         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5362                                           exception);
5363 }
5364 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5365
5366 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5367                              gva_t addr, void *val, unsigned int bytes,
5368                              struct x86_exception *exception, bool system)
5369 {
5370         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5371         u32 access = 0;
5372
5373         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5374                 access |= PFERR_USER_MASK;
5375
5376         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5377 }
5378
5379 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5380                 unsigned long addr, void *val, unsigned int bytes)
5381 {
5382         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5383         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5384
5385         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5386 }
5387
5388 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5389                                       struct kvm_vcpu *vcpu, u32 access,
5390                                       struct x86_exception *exception)
5391 {
5392         void *data = val;
5393         int r = X86EMUL_CONTINUE;
5394
5395         while (bytes) {
5396                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5397                                                              access,
5398                                                              exception);
5399                 unsigned offset = addr & (PAGE_SIZE-1);
5400                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5401                 int ret;
5402
5403                 if (gpa == UNMAPPED_GVA)
5404                         return X86EMUL_PROPAGATE_FAULT;
5405                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5406                 if (ret < 0) {
5407                         r = X86EMUL_IO_NEEDED;
5408                         goto out;
5409                 }
5410
5411                 bytes -= towrite;
5412                 data += towrite;
5413                 addr += towrite;
5414         }
5415 out:
5416         return r;
5417 }
5418
5419 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5420                               unsigned int bytes, struct x86_exception *exception,
5421                               bool system)
5422 {
5423         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5424         u32 access = PFERR_WRITE_MASK;
5425
5426         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5427                 access |= PFERR_USER_MASK;
5428
5429         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5430                                            access, exception);
5431 }
5432
5433 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5434                                 unsigned int bytes, struct x86_exception *exception)
5435 {
5436         /* kvm_write_guest_virt_system can pull in tons of pages. */
5437         vcpu->arch.l1tf_flush_l1d = true;
5438
5439         /*
5440          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5441          * is returned, but our callers are not ready for that and they blindly
5442          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5443          * uninitialized kernel stack memory into cr2 and error code.
5444          */
5445         memset(exception, 0, sizeof(*exception));
5446         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5447                                            PFERR_WRITE_MASK, exception);
5448 }
5449 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5450
5451 int handle_ud(struct kvm_vcpu *vcpu)
5452 {
5453         int emul_type = EMULTYPE_TRAP_UD;
5454         char sig[5]; /* ud2; .ascii "kvm" */
5455         struct x86_exception e;
5456
5457         if (force_emulation_prefix &&
5458             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5459                                 sig, sizeof(sig), &e) == 0 &&
5460             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5461                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5462                 emul_type = EMULTYPE_TRAP_UD_FORCED;
5463         }
5464
5465         return kvm_emulate_instruction(vcpu, emul_type);
5466 }
5467 EXPORT_SYMBOL_GPL(handle_ud);
5468
5469 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5470                             gpa_t gpa, bool write)
5471 {
5472         /* For APIC access vmexit */
5473         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5474                 return 1;
5475
5476         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5477                 trace_vcpu_match_mmio(gva, gpa, write, true);
5478                 return 1;
5479         }
5480
5481         return 0;
5482 }
5483
5484 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5485                                 gpa_t *gpa, struct x86_exception *exception,
5486                                 bool write)
5487 {
5488         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5489                 | (write ? PFERR_WRITE_MASK : 0);
5490
5491         /*
5492          * currently PKRU is only applied to ept enabled guest so
5493          * there is no pkey in EPT page table for L1 guest or EPT
5494          * shadow page table for L2 guest.
5495          */
5496         if (vcpu_match_mmio_gva(vcpu, gva)
5497             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5498                                  vcpu->arch.mmio_access, 0, access)) {
5499                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5500                                         (gva & (PAGE_SIZE - 1));
5501                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5502                 return 1;
5503         }
5504
5505         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5506
5507         if (*gpa == UNMAPPED_GVA)
5508                 return -1;
5509
5510         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5511 }
5512
5513 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5514                         const void *val, int bytes)
5515 {
5516         int ret;
5517
5518         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5519         if (ret < 0)
5520                 return 0;
5521         kvm_page_track_write(vcpu, gpa, val, bytes);
5522         return 1;
5523 }
5524
5525 struct read_write_emulator_ops {
5526         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5527                                   int bytes);
5528         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5529                                   void *val, int bytes);
5530         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5531                                int bytes, void *val);
5532         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5533                                     void *val, int bytes);
5534         bool write;
5535 };
5536
5537 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5538 {
5539         if (vcpu->mmio_read_completed) {
5540                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5541                                vcpu->mmio_fragments[0].gpa, val);
5542                 vcpu->mmio_read_completed = 0;
5543                 return 1;
5544         }
5545
5546         return 0;
5547 }
5548
5549 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5550                         void *val, int bytes)
5551 {
5552         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5553 }
5554
5555 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5556                          void *val, int bytes)
5557 {
5558         return emulator_write_phys(vcpu, gpa, val, bytes);
5559 }
5560
5561 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5562 {
5563         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5564         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5565 }
5566
5567 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5568                           void *val, int bytes)
5569 {
5570         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5571         return X86EMUL_IO_NEEDED;
5572 }
5573
5574 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5575                            void *val, int bytes)
5576 {
5577         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5578
5579         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5580         return X86EMUL_CONTINUE;
5581 }
5582
5583 static const struct read_write_emulator_ops read_emultor = {
5584         .read_write_prepare = read_prepare,
5585         .read_write_emulate = read_emulate,
5586         .read_write_mmio = vcpu_mmio_read,
5587         .read_write_exit_mmio = read_exit_mmio,
5588 };
5589
5590 static const struct read_write_emulator_ops write_emultor = {
5591         .read_write_emulate = write_emulate,
5592         .read_write_mmio = write_mmio,
5593         .read_write_exit_mmio = write_exit_mmio,
5594         .write = true,
5595 };
5596
5597 static int emulator_read_write_onepage(unsigned long addr, void *val,
5598                                        unsigned int bytes,
5599                                        struct x86_exception *exception,
5600                                        struct kvm_vcpu *vcpu,
5601                                        const struct read_write_emulator_ops *ops)
5602 {
5603         gpa_t gpa;
5604         int handled, ret;
5605         bool write = ops->write;
5606         struct kvm_mmio_fragment *frag;
5607         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5608
5609         /*
5610          * If the exit was due to a NPF we may already have a GPA.
5611          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5612          * Note, this cannot be used on string operations since string
5613          * operation using rep will only have the initial GPA from the NPF
5614          * occurred.
5615          */
5616         if (vcpu->arch.gpa_available &&
5617             emulator_can_use_gpa(ctxt) &&
5618             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5619                 gpa = vcpu->arch.gpa_val;
5620                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5621         } else {
5622                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5623                 if (ret < 0)
5624                         return X86EMUL_PROPAGATE_FAULT;
5625         }
5626
5627         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5628                 return X86EMUL_CONTINUE;
5629
5630         /*
5631          * Is this MMIO handled locally?
5632          */
5633         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5634         if (handled == bytes)
5635                 return X86EMUL_CONTINUE;
5636
5637         gpa += handled;
5638         bytes -= handled;
5639         val += handled;
5640
5641         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5642         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5643         frag->gpa = gpa;
5644         frag->data = val;
5645         frag->len = bytes;
5646         return X86EMUL_CONTINUE;
5647 }
5648
5649 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5650                         unsigned long addr,
5651                         void *val, unsigned int bytes,
5652                         struct x86_exception *exception,
5653                         const struct read_write_emulator_ops *ops)
5654 {
5655         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5656         gpa_t gpa;
5657         int rc;
5658
5659         if (ops->read_write_prepare &&
5660                   ops->read_write_prepare(vcpu, val, bytes))
5661                 return X86EMUL_CONTINUE;
5662
5663         vcpu->mmio_nr_fragments = 0;
5664
5665         /* Crossing a page boundary? */
5666         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5667                 int now;
5668
5669                 now = -addr & ~PAGE_MASK;
5670                 rc = emulator_read_write_onepage(addr, val, now, exception,
5671                                                  vcpu, ops);
5672
5673                 if (rc != X86EMUL_CONTINUE)
5674                         return rc;
5675                 addr += now;
5676                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5677                         addr = (u32)addr;
5678                 val += now;
5679                 bytes -= now;
5680         }
5681
5682         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5683                                          vcpu, ops);
5684         if (rc != X86EMUL_CONTINUE)
5685                 return rc;
5686
5687         if (!vcpu->mmio_nr_fragments)
5688                 return rc;
5689
5690         gpa = vcpu->mmio_fragments[0].gpa;
5691
5692         vcpu->mmio_needed = 1;
5693         vcpu->mmio_cur_fragment = 0;
5694
5695         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5696         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5697         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5698         vcpu->run->mmio.phys_addr = gpa;
5699
5700         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5701 }
5702
5703 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5704                                   unsigned long addr,
5705                                   void *val,
5706                                   unsigned int bytes,
5707                                   struct x86_exception *exception)
5708 {
5709         return emulator_read_write(ctxt, addr, val, bytes,
5710                                    exception, &read_emultor);
5711 }
5712
5713 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5714                             unsigned long addr,
5715                             const void *val,
5716                             unsigned int bytes,
5717                             struct x86_exception *exception)
5718 {
5719         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5720                                    exception, &write_emultor);
5721 }
5722
5723 #define CMPXCHG_TYPE(t, ptr, old, new) \
5724         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5725
5726 #ifdef CONFIG_X86_64
5727 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5728 #else
5729 #  define CMPXCHG64(ptr, old, new) \
5730         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5731 #endif
5732
5733 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5734                                      unsigned long addr,
5735                                      const void *old,
5736                                      const void *new,
5737                                      unsigned int bytes,
5738                                      struct x86_exception *exception)
5739 {
5740         struct kvm_host_map map;
5741         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5742         gpa_t gpa;
5743         char *kaddr;
5744         bool exchanged;
5745
5746         /* guests cmpxchg8b have to be emulated atomically */
5747         if (bytes > 8 || (bytes & (bytes - 1)))
5748                 goto emul_write;
5749
5750         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5751
5752         if (gpa == UNMAPPED_GVA ||
5753             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5754                 goto emul_write;
5755
5756         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5757                 goto emul_write;
5758
5759         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5760                 goto emul_write;
5761
5762         kaddr = map.hva + offset_in_page(gpa);
5763
5764         switch (bytes) {
5765         case 1:
5766                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5767                 break;
5768         case 2:
5769                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5770                 break;
5771         case 4:
5772                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5773                 break;
5774         case 8:
5775                 exchanged = CMPXCHG64(kaddr, old, new);
5776                 break;
5777         default:
5778                 BUG();
5779         }
5780
5781         kvm_vcpu_unmap(vcpu, &map, true);
5782
5783         if (!exchanged)
5784                 return X86EMUL_CMPXCHG_FAILED;
5785
5786         kvm_page_track_write(vcpu, gpa, new, bytes);
5787
5788         return X86EMUL_CONTINUE;
5789
5790 emul_write:
5791         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5792
5793         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5794 }
5795
5796 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5797 {
5798         int r = 0, i;
5799
5800         for (i = 0; i < vcpu->arch.pio.count; i++) {
5801                 if (vcpu->arch.pio.in)
5802                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5803                                             vcpu->arch.pio.size, pd);
5804                 else
5805                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5806                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5807                                              pd);
5808                 if (r)
5809                         break;
5810                 pd += vcpu->arch.pio.size;
5811         }
5812         return r;
5813 }
5814
5815 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5816                                unsigned short port, void *val,
5817                                unsigned int count, bool in)
5818 {
5819         vcpu->arch.pio.port = port;
5820         vcpu->arch.pio.in = in;
5821         vcpu->arch.pio.count  = count;
5822         vcpu->arch.pio.size = size;
5823
5824         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5825                 vcpu->arch.pio.count = 0;
5826                 return 1;
5827         }
5828
5829         vcpu->run->exit_reason = KVM_EXIT_IO;
5830         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5831         vcpu->run->io.size = size;
5832         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5833         vcpu->run->io.count = count;
5834         vcpu->run->io.port = port;
5835
5836         return 0;
5837 }
5838
5839 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5840                                     int size, unsigned short port, void *val,
5841                                     unsigned int count)
5842 {
5843         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5844         int ret;
5845
5846         if (vcpu->arch.pio.count)
5847                 goto data_avail;
5848
5849         memset(vcpu->arch.pio_data, 0, size * count);
5850
5851         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5852         if (ret) {
5853 data_avail:
5854                 memcpy(val, vcpu->arch.pio_data, size * count);
5855                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5856                 vcpu->arch.pio.count = 0;
5857                 return 1;
5858         }
5859
5860         return 0;
5861 }
5862
5863 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5864                                      int size, unsigned short port,
5865                                      const void *val, unsigned int count)
5866 {
5867         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5868
5869         memcpy(vcpu->arch.pio_data, val, size * count);
5870         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5871         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5872 }
5873
5874 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5875 {
5876         return kvm_x86_ops->get_segment_base(vcpu, seg);
5877 }
5878
5879 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5880 {
5881         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5882 }
5883
5884 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5885 {
5886         if (!need_emulate_wbinvd(vcpu))
5887                 return X86EMUL_CONTINUE;
5888
5889         if (kvm_x86_ops->has_wbinvd_exit()) {
5890                 int cpu = get_cpu();
5891
5892                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5893                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5894                                 wbinvd_ipi, NULL, 1);
5895                 put_cpu();
5896                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5897         } else
5898                 wbinvd();
5899         return X86EMUL_CONTINUE;
5900 }
5901
5902 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5903 {
5904         kvm_emulate_wbinvd_noskip(vcpu);
5905         return kvm_skip_emulated_instruction(vcpu);
5906 }
5907 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5908
5909
5910
5911 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5912 {
5913         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5914 }
5915
5916 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5917                            unsigned long *dest)
5918 {
5919         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5920 }
5921
5922 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5923                            unsigned long value)
5924 {
5925
5926         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5927 }
5928
5929 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5930 {
5931         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5932 }
5933
5934 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5935 {
5936         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5937         unsigned long value;
5938
5939         switch (cr) {
5940         case 0:
5941                 value = kvm_read_cr0(vcpu);
5942                 break;
5943         case 2:
5944                 value = vcpu->arch.cr2;
5945                 break;
5946         case 3:
5947                 value = kvm_read_cr3(vcpu);
5948                 break;
5949         case 4:
5950                 value = kvm_read_cr4(vcpu);
5951                 break;
5952         case 8:
5953                 value = kvm_get_cr8(vcpu);
5954                 break;
5955         default:
5956                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5957                 return 0;
5958         }
5959
5960         return value;
5961 }
5962
5963 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5964 {
5965         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5966         int res = 0;
5967
5968         switch (cr) {
5969         case 0:
5970                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5971                 break;
5972         case 2:
5973                 vcpu->arch.cr2 = val;
5974                 break;
5975         case 3:
5976                 res = kvm_set_cr3(vcpu, val);
5977                 break;
5978         case 4:
5979                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5980                 break;
5981         case 8:
5982                 res = kvm_set_cr8(vcpu, val);
5983                 break;
5984         default:
5985                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5986                 res = -1;
5987         }
5988
5989         return res;
5990 }
5991
5992 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5993 {
5994         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5995 }
5996
5997 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5998 {
5999         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
6000 }
6001
6002 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6003 {
6004         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
6005 }
6006
6007 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6008 {
6009         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
6010 }
6011
6012 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6013 {
6014         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6015 }
6016
6017 static unsigned long emulator_get_cached_segment_base(
6018         struct x86_emulate_ctxt *ctxt, int seg)
6019 {
6020         return get_segment_base(emul_to_vcpu(ctxt), seg);
6021 }
6022
6023 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6024                                  struct desc_struct *desc, u32 *base3,
6025                                  int seg)
6026 {
6027         struct kvm_segment var;
6028
6029         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6030         *selector = var.selector;
6031
6032         if (var.unusable) {
6033                 memset(desc, 0, sizeof(*desc));
6034                 if (base3)
6035                         *base3 = 0;
6036                 return false;
6037         }
6038
6039         if (var.g)
6040                 var.limit >>= 12;
6041         set_desc_limit(desc, var.limit);
6042         set_desc_base(desc, (unsigned long)var.base);
6043 #ifdef CONFIG_X86_64
6044         if (base3)
6045                 *base3 = var.base >> 32;
6046 #endif
6047         desc->type = var.type;
6048         desc->s = var.s;
6049         desc->dpl = var.dpl;
6050         desc->p = var.present;
6051         desc->avl = var.avl;
6052         desc->l = var.l;
6053         desc->d = var.db;
6054         desc->g = var.g;
6055
6056         return true;
6057 }
6058
6059 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6060                                  struct desc_struct *desc, u32 base3,
6061                                  int seg)
6062 {
6063         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6064         struct kvm_segment var;
6065
6066         var.selector = selector;
6067         var.base = get_desc_base(desc);
6068 #ifdef CONFIG_X86_64
6069         var.base |= ((u64)base3) << 32;
6070 #endif
6071         var.limit = get_desc_limit(desc);
6072         if (desc->g)
6073                 var.limit = (var.limit << 12) | 0xfff;
6074         var.type = desc->type;
6075         var.dpl = desc->dpl;
6076         var.db = desc->d;
6077         var.s = desc->s;
6078         var.l = desc->l;
6079         var.g = desc->g;
6080         var.avl = desc->avl;
6081         var.present = desc->p;
6082         var.unusable = !var.present;
6083         var.padding = 0;
6084
6085         kvm_set_segment(vcpu, &var, seg);
6086         return;
6087 }
6088
6089 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6090                             u32 msr_index, u64 *pdata)
6091 {
6092         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6093 }
6094
6095 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6096                             u32 msr_index, u64 data)
6097 {
6098         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6099 }
6100
6101 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6102 {
6103         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6104
6105         return vcpu->arch.smbase;
6106 }
6107
6108 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6109 {
6110         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6111
6112         vcpu->arch.smbase = smbase;
6113 }
6114
6115 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6116                               u32 pmc)
6117 {
6118         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6119 }
6120
6121 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6122                              u32 pmc, u64 *pdata)
6123 {
6124         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6125 }
6126
6127 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6128 {
6129         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6130 }
6131
6132 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6133                               struct x86_instruction_info *info,
6134                               enum x86_intercept_stage stage)
6135 {
6136         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6137 }
6138
6139 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6140                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6141 {
6142         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6143 }
6144
6145 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6146 {
6147         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6148 }
6149
6150 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6151 {
6152         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6153 }
6154
6155 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6156 {
6157         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6158 }
6159
6160 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6161 {
6162         return emul_to_vcpu(ctxt)->arch.hflags;
6163 }
6164
6165 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6166 {
6167         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6168 }
6169
6170 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6171                                   const char *smstate)
6172 {
6173         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6174 }
6175
6176 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6177 {
6178         kvm_smm_changed(emul_to_vcpu(ctxt));
6179 }
6180
6181 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6182 {
6183         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6184 }
6185
6186 static const struct x86_emulate_ops emulate_ops = {
6187         .read_gpr            = emulator_read_gpr,
6188         .write_gpr           = emulator_write_gpr,
6189         .read_std            = emulator_read_std,
6190         .write_std           = emulator_write_std,
6191         .read_phys           = kvm_read_guest_phys_system,
6192         .fetch               = kvm_fetch_guest_virt,
6193         .read_emulated       = emulator_read_emulated,
6194         .write_emulated      = emulator_write_emulated,
6195         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6196         .invlpg              = emulator_invlpg,
6197         .pio_in_emulated     = emulator_pio_in_emulated,
6198         .pio_out_emulated    = emulator_pio_out_emulated,
6199         .get_segment         = emulator_get_segment,
6200         .set_segment         = emulator_set_segment,
6201         .get_cached_segment_base = emulator_get_cached_segment_base,
6202         .get_gdt             = emulator_get_gdt,
6203         .get_idt             = emulator_get_idt,
6204         .set_gdt             = emulator_set_gdt,
6205         .set_idt             = emulator_set_idt,
6206         .get_cr              = emulator_get_cr,
6207         .set_cr              = emulator_set_cr,
6208         .cpl                 = emulator_get_cpl,
6209         .get_dr              = emulator_get_dr,
6210         .set_dr              = emulator_set_dr,
6211         .get_smbase          = emulator_get_smbase,
6212         .set_smbase          = emulator_set_smbase,
6213         .set_msr             = emulator_set_msr,
6214         .get_msr             = emulator_get_msr,
6215         .check_pmc           = emulator_check_pmc,
6216         .read_pmc            = emulator_read_pmc,
6217         .halt                = emulator_halt,
6218         .wbinvd              = emulator_wbinvd,
6219         .fix_hypercall       = emulator_fix_hypercall,
6220         .intercept           = emulator_intercept,
6221         .get_cpuid           = emulator_get_cpuid,
6222         .set_nmi_mask        = emulator_set_nmi_mask,
6223         .get_hflags          = emulator_get_hflags,
6224         .set_hflags          = emulator_set_hflags,
6225         .pre_leave_smm       = emulator_pre_leave_smm,
6226         .post_leave_smm      = emulator_post_leave_smm,
6227         .set_xcr             = emulator_set_xcr,
6228 };
6229
6230 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6231 {
6232         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6233         /*
6234          * an sti; sti; sequence only disable interrupts for the first
6235          * instruction. So, if the last instruction, be it emulated or
6236          * not, left the system with the INT_STI flag enabled, it
6237          * means that the last instruction is an sti. We should not
6238          * leave the flag on in this case. The same goes for mov ss
6239          */
6240         if (int_shadow & mask)
6241                 mask = 0;
6242         if (unlikely(int_shadow || mask)) {
6243                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6244                 if (!mask)
6245                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6246         }
6247 }
6248
6249 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6250 {
6251         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6252         if (ctxt->exception.vector == PF_VECTOR)
6253                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6254
6255         if (ctxt->exception.error_code_valid)
6256                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6257                                       ctxt->exception.error_code);
6258         else
6259                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6260         return false;
6261 }
6262
6263 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6264 {
6265         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6266         int cs_db, cs_l;
6267
6268         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6269
6270         ctxt->eflags = kvm_get_rflags(vcpu);
6271         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6272
6273         ctxt->eip = kvm_rip_read(vcpu);
6274         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6275                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6276                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6277                      cs_db                              ? X86EMUL_MODE_PROT32 :
6278                                                           X86EMUL_MODE_PROT16;
6279         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6280         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6281         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6282
6283         init_decode_cache(ctxt);
6284         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6285 }
6286
6287 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6288 {
6289         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6290         int ret;
6291
6292         init_emulate_ctxt(vcpu);
6293
6294         ctxt->op_bytes = 2;
6295         ctxt->ad_bytes = 2;
6296         ctxt->_eip = ctxt->eip + inc_eip;
6297         ret = emulate_int_real(ctxt, irq);
6298
6299         if (ret != X86EMUL_CONTINUE) {
6300                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6301         } else {
6302                 ctxt->eip = ctxt->_eip;
6303                 kvm_rip_write(vcpu, ctxt->eip);
6304                 kvm_set_rflags(vcpu, ctxt->eflags);
6305         }
6306 }
6307 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6308
6309 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6310 {
6311         ++vcpu->stat.insn_emulation_fail;
6312         trace_kvm_emulate_insn_failed(vcpu);
6313
6314         if (emulation_type & EMULTYPE_VMWARE_GP) {
6315                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6316                 return 1;
6317         }
6318
6319         if (emulation_type & EMULTYPE_SKIP) {
6320                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6321                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6322                 vcpu->run->internal.ndata = 0;
6323                 return 0;
6324         }
6325
6326         kvm_queue_exception(vcpu, UD_VECTOR);
6327
6328         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6329                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6330                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6331                 vcpu->run->internal.ndata = 0;
6332                 return 0;
6333         }
6334
6335         return 1;
6336 }
6337
6338 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6339                                   bool write_fault_to_shadow_pgtable,
6340                                   int emulation_type)
6341 {
6342         gpa_t gpa = cr2;
6343         kvm_pfn_t pfn;
6344
6345         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6346                 return false;
6347
6348         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6349                 return false;
6350
6351         if (!vcpu->arch.mmu->direct_map) {
6352                 /*
6353                  * Write permission should be allowed since only
6354                  * write access need to be emulated.
6355                  */
6356                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6357
6358                 /*
6359                  * If the mapping is invalid in guest, let cpu retry
6360                  * it to generate fault.
6361                  */
6362                 if (gpa == UNMAPPED_GVA)
6363                         return true;
6364         }
6365
6366         /*
6367          * Do not retry the unhandleable instruction if it faults on the
6368          * readonly host memory, otherwise it will goto a infinite loop:
6369          * retry instruction -> write #PF -> emulation fail -> retry
6370          * instruction -> ...
6371          */
6372         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6373
6374         /*
6375          * If the instruction failed on the error pfn, it can not be fixed,
6376          * report the error to userspace.
6377          */
6378         if (is_error_noslot_pfn(pfn))
6379                 return false;
6380
6381         kvm_release_pfn_clean(pfn);
6382
6383         /* The instructions are well-emulated on direct mmu. */
6384         if (vcpu->arch.mmu->direct_map) {
6385                 unsigned int indirect_shadow_pages;
6386
6387                 spin_lock(&vcpu->kvm->mmu_lock);
6388                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6389                 spin_unlock(&vcpu->kvm->mmu_lock);
6390
6391                 if (indirect_shadow_pages)
6392                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6393
6394                 return true;
6395         }
6396
6397         /*
6398          * if emulation was due to access to shadowed page table
6399          * and it failed try to unshadow page and re-enter the
6400          * guest to let CPU execute the instruction.
6401          */
6402         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6403
6404         /*
6405          * If the access faults on its page table, it can not
6406          * be fixed by unprotecting shadow page and it should
6407          * be reported to userspace.
6408          */
6409         return !write_fault_to_shadow_pgtable;
6410 }
6411
6412 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6413                               unsigned long cr2,  int emulation_type)
6414 {
6415         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6416         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6417
6418         last_retry_eip = vcpu->arch.last_retry_eip;
6419         last_retry_addr = vcpu->arch.last_retry_addr;
6420
6421         /*
6422          * If the emulation is caused by #PF and it is non-page_table
6423          * writing instruction, it means the VM-EXIT is caused by shadow
6424          * page protected, we can zap the shadow page and retry this
6425          * instruction directly.
6426          *
6427          * Note: if the guest uses a non-page-table modifying instruction
6428          * on the PDE that points to the instruction, then we will unmap
6429          * the instruction and go to an infinite loop. So, we cache the
6430          * last retried eip and the last fault address, if we meet the eip
6431          * and the address again, we can break out of the potential infinite
6432          * loop.
6433          */
6434         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6435
6436         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6437                 return false;
6438
6439         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6440                 return false;
6441
6442         if (x86_page_table_writing_insn(ctxt))
6443                 return false;
6444
6445         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6446                 return false;
6447
6448         vcpu->arch.last_retry_eip = ctxt->eip;
6449         vcpu->arch.last_retry_addr = cr2;
6450
6451         if (!vcpu->arch.mmu->direct_map)
6452                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6453
6454         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6455
6456         return true;
6457 }
6458
6459 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6460 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6461
6462 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6463 {
6464         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6465                 /* This is a good place to trace that we are exiting SMM.  */
6466                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6467
6468                 /* Process a latched INIT or SMI, if any.  */
6469                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6470         }
6471
6472         kvm_mmu_reset_context(vcpu);
6473 }
6474
6475 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6476                                 unsigned long *db)
6477 {
6478         u32 dr6 = 0;
6479         int i;
6480         u32 enable, rwlen;
6481
6482         enable = dr7;
6483         rwlen = dr7 >> 16;
6484         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6485                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6486                         dr6 |= (1 << i);
6487         return dr6;
6488 }
6489
6490 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
6491 {
6492         struct kvm_run *kvm_run = vcpu->run;
6493
6494         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6495                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6496                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6497                 kvm_run->debug.arch.exception = DB_VECTOR;
6498                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6499                 return 0;
6500         }
6501         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6502         return 1;
6503 }
6504
6505 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6506 {
6507         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6508         int r;
6509
6510         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6511         if (unlikely(!r))
6512                 return 0;
6513
6514         /*
6515          * rflags is the old, "raw" value of the flags.  The new value has
6516          * not been saved yet.
6517          *
6518          * This is correct even for TF set by the guest, because "the
6519          * processor will not generate this exception after the instruction
6520          * that sets the TF flag".
6521          */
6522         if (unlikely(rflags & X86_EFLAGS_TF))
6523                 r = kvm_vcpu_do_singlestep(vcpu);
6524         return r;
6525 }
6526 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6527
6528 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6529 {
6530         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6531             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6532                 struct kvm_run *kvm_run = vcpu->run;
6533                 unsigned long eip = kvm_get_linear_rip(vcpu);
6534                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6535                                            vcpu->arch.guest_debug_dr7,
6536                                            vcpu->arch.eff_db);
6537
6538                 if (dr6 != 0) {
6539                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6540                         kvm_run->debug.arch.pc = eip;
6541                         kvm_run->debug.arch.exception = DB_VECTOR;
6542                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6543                         *r = 0;
6544                         return true;
6545                 }
6546         }
6547
6548         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6549             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6550                 unsigned long eip = kvm_get_linear_rip(vcpu);
6551                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6552                                            vcpu->arch.dr7,
6553                                            vcpu->arch.db);
6554
6555                 if (dr6 != 0) {
6556                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6557                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6558                         kvm_queue_exception(vcpu, DB_VECTOR);
6559                         *r = 1;
6560                         return true;
6561                 }
6562         }
6563
6564         return false;
6565 }
6566
6567 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6568 {
6569         switch (ctxt->opcode_len) {
6570         case 1:
6571                 switch (ctxt->b) {
6572                 case 0xe4:      /* IN */
6573                 case 0xe5:
6574                 case 0xec:
6575                 case 0xed:
6576                 case 0xe6:      /* OUT */
6577                 case 0xe7:
6578                 case 0xee:
6579                 case 0xef:
6580                 case 0x6c:      /* INS */
6581                 case 0x6d:
6582                 case 0x6e:      /* OUTS */
6583                 case 0x6f:
6584                         return true;
6585                 }
6586                 break;
6587         case 2:
6588                 switch (ctxt->b) {
6589                 case 0x33:      /* RDPMC */
6590                         return true;
6591                 }
6592                 break;
6593         }
6594
6595         return false;
6596 }
6597
6598 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6599                             unsigned long cr2,
6600                             int emulation_type,
6601                             void *insn,
6602                             int insn_len)
6603 {
6604         int r;
6605         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6606         bool writeback = true;
6607         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6608
6609         vcpu->arch.l1tf_flush_l1d = true;
6610
6611         /*
6612          * Clear write_fault_to_shadow_pgtable here to ensure it is
6613          * never reused.
6614          */
6615         vcpu->arch.write_fault_to_shadow_pgtable = false;
6616         kvm_clear_exception_queue(vcpu);
6617
6618         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6619                 init_emulate_ctxt(vcpu);
6620
6621                 /*
6622                  * We will reenter on the same instruction since
6623                  * we do not set complete_userspace_io.  This does not
6624                  * handle watchpoints yet, those would be handled in
6625                  * the emulate_ops.
6626                  */
6627                 if (!(emulation_type & EMULTYPE_SKIP) &&
6628                     kvm_vcpu_check_breakpoint(vcpu, &r))
6629                         return r;
6630
6631                 ctxt->interruptibility = 0;
6632                 ctxt->have_exception = false;
6633                 ctxt->exception.vector = -1;
6634                 ctxt->perm_ok = false;
6635
6636                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6637
6638                 r = x86_decode_insn(ctxt, insn, insn_len);
6639
6640                 trace_kvm_emulate_insn_start(vcpu);
6641                 ++vcpu->stat.insn_emulation;
6642                 if (r != EMULATION_OK)  {
6643                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
6644                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
6645                                 kvm_queue_exception(vcpu, UD_VECTOR);
6646                                 return 1;
6647                         }
6648                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6649                                                 emulation_type))
6650                                 return 1;
6651                         if (ctxt->have_exception) {
6652                                 /*
6653                                  * #UD should result in just EMULATION_FAILED, and trap-like
6654                                  * exception should not be encountered during decode.
6655                                  */
6656                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6657                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6658                                 inject_emulated_exception(vcpu);
6659                                 return 1;
6660                         }
6661                         return handle_emulation_failure(vcpu, emulation_type);
6662                 }
6663         }
6664
6665         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
6666             !is_vmware_backdoor_opcode(ctxt)) {
6667                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6668                 return 1;
6669         }
6670
6671         /*
6672          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
6673          * for kvm_skip_emulated_instruction().  The caller is responsible for
6674          * updating interruptibility state and injecting single-step #DBs.
6675          */
6676         if (emulation_type & EMULTYPE_SKIP) {
6677                 kvm_rip_write(vcpu, ctxt->_eip);
6678                 if (ctxt->eflags & X86_EFLAGS_RF)
6679                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6680                 return 1;
6681         }
6682
6683         if (retry_instruction(ctxt, cr2, emulation_type))
6684                 return 1;
6685
6686         /* this is needed for vmware backdoor interface to work since it
6687            changes registers values  during IO operation */
6688         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6689                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6690                 emulator_invalidate_register_cache(ctxt);
6691         }
6692
6693 restart:
6694         /* Save the faulting GPA (cr2) in the address field */
6695         ctxt->exception.address = cr2;
6696
6697         r = x86_emulate_insn(ctxt);
6698
6699         if (r == EMULATION_INTERCEPTED)
6700                 return 1;
6701
6702         if (r == EMULATION_FAILED) {
6703                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6704                                         emulation_type))
6705                         return 1;
6706
6707                 return handle_emulation_failure(vcpu, emulation_type);
6708         }
6709
6710         if (ctxt->have_exception) {
6711                 r = 1;
6712                 if (inject_emulated_exception(vcpu))
6713                         return r;
6714         } else if (vcpu->arch.pio.count) {
6715                 if (!vcpu->arch.pio.in) {
6716                         /* FIXME: return into emulator if single-stepping.  */
6717                         vcpu->arch.pio.count = 0;
6718                 } else {
6719                         writeback = false;
6720                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6721                 }
6722                 r = 0;
6723         } else if (vcpu->mmio_needed) {
6724                 ++vcpu->stat.mmio_exits;
6725
6726                 if (!vcpu->mmio_is_write)
6727                         writeback = false;
6728                 r = 0;
6729                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6730         } else if (r == EMULATION_RESTART)
6731                 goto restart;
6732         else
6733                 r = 1;
6734
6735         if (writeback) {
6736                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6737                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6738                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6739                 if (!ctxt->have_exception ||
6740                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6741                         kvm_rip_write(vcpu, ctxt->eip);
6742                         if (r && ctxt->tf)
6743                                 r = kvm_vcpu_do_singlestep(vcpu);
6744                         __kvm_set_rflags(vcpu, ctxt->eflags);
6745                 }
6746
6747                 /*
6748                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6749                  * do nothing, and it will be requested again as soon as
6750                  * the shadow expires.  But we still need to check here,
6751                  * because POPF has no interrupt shadow.
6752                  */
6753                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6754                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6755         } else
6756                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6757
6758         return r;
6759 }
6760
6761 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6762 {
6763         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6764 }
6765 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6766
6767 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6768                                         void *insn, int insn_len)
6769 {
6770         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6771 }
6772 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6773
6774 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6775 {
6776         vcpu->arch.pio.count = 0;
6777         return 1;
6778 }
6779
6780 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6781 {
6782         vcpu->arch.pio.count = 0;
6783
6784         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6785                 return 1;
6786
6787         return kvm_skip_emulated_instruction(vcpu);
6788 }
6789
6790 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6791                             unsigned short port)
6792 {
6793         unsigned long val = kvm_rax_read(vcpu);
6794         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6795                                             size, port, &val, 1);
6796         if (ret)
6797                 return ret;
6798
6799         /*
6800          * Workaround userspace that relies on old KVM behavior of %rip being
6801          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6802          */
6803         if (port == 0x7e &&
6804             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6805                 vcpu->arch.complete_userspace_io =
6806                         complete_fast_pio_out_port_0x7e;
6807                 kvm_skip_emulated_instruction(vcpu);
6808         } else {
6809                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6810                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6811         }
6812         return 0;
6813 }
6814
6815 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6816 {
6817         unsigned long val;
6818
6819         /* We should only ever be called with arch.pio.count equal to 1 */
6820         BUG_ON(vcpu->arch.pio.count != 1);
6821
6822         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6823                 vcpu->arch.pio.count = 0;
6824                 return 1;
6825         }
6826
6827         /* For size less than 4 we merge, else we zero extend */
6828         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6829
6830         /*
6831          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6832          * the copy and tracing
6833          */
6834         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6835                                  vcpu->arch.pio.port, &val, 1);
6836         kvm_rax_write(vcpu, val);
6837
6838         return kvm_skip_emulated_instruction(vcpu);
6839 }
6840
6841 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6842                            unsigned short port)
6843 {
6844         unsigned long val;
6845         int ret;
6846
6847         /* For size less than 4 we merge, else we zero extend */
6848         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6849
6850         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6851                                        &val, 1);
6852         if (ret) {
6853                 kvm_rax_write(vcpu, val);
6854                 return ret;
6855         }
6856
6857         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6858         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6859
6860         return 0;
6861 }
6862
6863 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6864 {
6865         int ret;
6866
6867         if (in)
6868                 ret = kvm_fast_pio_in(vcpu, size, port);
6869         else
6870                 ret = kvm_fast_pio_out(vcpu, size, port);
6871         return ret && kvm_skip_emulated_instruction(vcpu);
6872 }
6873 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6874
6875 static int kvmclock_cpu_down_prep(unsigned int cpu)
6876 {
6877         __this_cpu_write(cpu_tsc_khz, 0);
6878         return 0;
6879 }
6880
6881 static void tsc_khz_changed(void *data)
6882 {
6883         struct cpufreq_freqs *freq = data;
6884         unsigned long khz = 0;
6885
6886         if (data)
6887                 khz = freq->new;
6888         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6889                 khz = cpufreq_quick_get(raw_smp_processor_id());
6890         if (!khz)
6891                 khz = tsc_khz;
6892         __this_cpu_write(cpu_tsc_khz, khz);
6893 }
6894
6895 #ifdef CONFIG_X86_64
6896 static void kvm_hyperv_tsc_notifier(void)
6897 {
6898         struct kvm *kvm;
6899         struct kvm_vcpu *vcpu;
6900         int cpu;
6901
6902         mutex_lock(&kvm_lock);
6903         list_for_each_entry(kvm, &vm_list, vm_list)
6904                 kvm_make_mclock_inprogress_request(kvm);
6905
6906         hyperv_stop_tsc_emulation();
6907
6908         /* TSC frequency always matches when on Hyper-V */
6909         for_each_present_cpu(cpu)
6910                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6911         kvm_max_guest_tsc_khz = tsc_khz;
6912
6913         list_for_each_entry(kvm, &vm_list, vm_list) {
6914                 struct kvm_arch *ka = &kvm->arch;
6915
6916                 spin_lock(&ka->pvclock_gtod_sync_lock);
6917
6918                 pvclock_update_vm_gtod_copy(kvm);
6919
6920                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6921                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6922
6923                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6924                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6925
6926                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6927         }
6928         mutex_unlock(&kvm_lock);
6929 }
6930 #endif
6931
6932 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6933 {
6934         struct kvm *kvm;
6935         struct kvm_vcpu *vcpu;
6936         int i, send_ipi = 0;
6937
6938         /*
6939          * We allow guests to temporarily run on slowing clocks,
6940          * provided we notify them after, or to run on accelerating
6941          * clocks, provided we notify them before.  Thus time never
6942          * goes backwards.
6943          *
6944          * However, we have a problem.  We can't atomically update
6945          * the frequency of a given CPU from this function; it is
6946          * merely a notifier, which can be called from any CPU.
6947          * Changing the TSC frequency at arbitrary points in time
6948          * requires a recomputation of local variables related to
6949          * the TSC for each VCPU.  We must flag these local variables
6950          * to be updated and be sure the update takes place with the
6951          * new frequency before any guests proceed.
6952          *
6953          * Unfortunately, the combination of hotplug CPU and frequency
6954          * change creates an intractable locking scenario; the order
6955          * of when these callouts happen is undefined with respect to
6956          * CPU hotplug, and they can race with each other.  As such,
6957          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6958          * undefined; you can actually have a CPU frequency change take
6959          * place in between the computation of X and the setting of the
6960          * variable.  To protect against this problem, all updates of
6961          * the per_cpu tsc_khz variable are done in an interrupt
6962          * protected IPI, and all callers wishing to update the value
6963          * must wait for a synchronous IPI to complete (which is trivial
6964          * if the caller is on the CPU already).  This establishes the
6965          * necessary total order on variable updates.
6966          *
6967          * Note that because a guest time update may take place
6968          * anytime after the setting of the VCPU's request bit, the
6969          * correct TSC value must be set before the request.  However,
6970          * to ensure the update actually makes it to any guest which
6971          * starts running in hardware virtualization between the set
6972          * and the acquisition of the spinlock, we must also ping the
6973          * CPU after setting the request bit.
6974          *
6975          */
6976
6977         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6978
6979         mutex_lock(&kvm_lock);
6980         list_for_each_entry(kvm, &vm_list, vm_list) {
6981                 kvm_for_each_vcpu(i, vcpu, kvm) {
6982                         if (vcpu->cpu != cpu)
6983                                 continue;
6984                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6985                         if (vcpu->cpu != raw_smp_processor_id())
6986                                 send_ipi = 1;
6987                 }
6988         }
6989         mutex_unlock(&kvm_lock);
6990
6991         if (freq->old < freq->new && send_ipi) {
6992                 /*
6993                  * We upscale the frequency.  Must make the guest
6994                  * doesn't see old kvmclock values while running with
6995                  * the new frequency, otherwise we risk the guest sees
6996                  * time go backwards.
6997                  *
6998                  * In case we update the frequency for another cpu
6999                  * (which might be in guest context) send an interrupt
7000                  * to kick the cpu out of guest context.  Next time
7001                  * guest context is entered kvmclock will be updated,
7002                  * so the guest will not see stale values.
7003                  */
7004                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7005         }
7006 }
7007
7008 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7009                                      void *data)
7010 {
7011         struct cpufreq_freqs *freq = data;
7012         int cpu;
7013
7014         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7015                 return 0;
7016         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7017                 return 0;
7018
7019         for_each_cpu(cpu, freq->policy->cpus)
7020                 __kvmclock_cpufreq_notifier(freq, cpu);
7021
7022         return 0;
7023 }
7024
7025 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7026         .notifier_call  = kvmclock_cpufreq_notifier
7027 };
7028
7029 static int kvmclock_cpu_online(unsigned int cpu)
7030 {
7031         tsc_khz_changed(NULL);
7032         return 0;
7033 }
7034
7035 static void kvm_timer_init(void)
7036 {
7037         max_tsc_khz = tsc_khz;
7038
7039         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7040 #ifdef CONFIG_CPU_FREQ
7041                 struct cpufreq_policy policy;
7042                 int cpu;
7043
7044                 memset(&policy, 0, sizeof(policy));
7045                 cpu = get_cpu();
7046                 cpufreq_get_policy(&policy, cpu);
7047                 if (policy.cpuinfo.max_freq)
7048                         max_tsc_khz = policy.cpuinfo.max_freq;
7049                 put_cpu();
7050 #endif
7051                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7052                                           CPUFREQ_TRANSITION_NOTIFIER);
7053         }
7054
7055         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7056                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7057 }
7058
7059 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7060 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7061
7062 int kvm_is_in_guest(void)
7063 {
7064         return __this_cpu_read(current_vcpu) != NULL;
7065 }
7066
7067 static int kvm_is_user_mode(void)
7068 {
7069         int user_mode = 3;
7070
7071         if (__this_cpu_read(current_vcpu))
7072                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7073
7074         return user_mode != 0;
7075 }
7076
7077 static unsigned long kvm_get_guest_ip(void)
7078 {
7079         unsigned long ip = 0;
7080
7081         if (__this_cpu_read(current_vcpu))
7082                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7083
7084         return ip;
7085 }
7086
7087 static void kvm_handle_intel_pt_intr(void)
7088 {
7089         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7090
7091         kvm_make_request(KVM_REQ_PMI, vcpu);
7092         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7093                         (unsigned long *)&vcpu->arch.pmu.global_status);
7094 }
7095
7096 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7097         .is_in_guest            = kvm_is_in_guest,
7098         .is_user_mode           = kvm_is_user_mode,
7099         .get_guest_ip           = kvm_get_guest_ip,
7100         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7101 };
7102
7103 #ifdef CONFIG_X86_64
7104 static void pvclock_gtod_update_fn(struct work_struct *work)
7105 {
7106         struct kvm *kvm;
7107
7108         struct kvm_vcpu *vcpu;
7109         int i;
7110
7111         mutex_lock(&kvm_lock);
7112         list_for_each_entry(kvm, &vm_list, vm_list)
7113                 kvm_for_each_vcpu(i, vcpu, kvm)
7114                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7115         atomic_set(&kvm_guest_has_master_clock, 0);
7116         mutex_unlock(&kvm_lock);
7117 }
7118
7119 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7120
7121 /*
7122  * Notification about pvclock gtod data update.
7123  */
7124 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7125                                void *priv)
7126 {
7127         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7128         struct timekeeper *tk = priv;
7129
7130         update_pvclock_gtod(tk);
7131
7132         /* disable master clock if host does not trust, or does not
7133          * use, TSC based clocksource.
7134          */
7135         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7136             atomic_read(&kvm_guest_has_master_clock) != 0)
7137                 queue_work(system_long_wq, &pvclock_gtod_work);
7138
7139         return 0;
7140 }
7141
7142 static struct notifier_block pvclock_gtod_notifier = {
7143         .notifier_call = pvclock_gtod_notify,
7144 };
7145 #endif
7146
7147 int kvm_arch_init(void *opaque)
7148 {
7149         int r;
7150         struct kvm_x86_ops *ops = opaque;
7151
7152         if (kvm_x86_ops) {
7153                 printk(KERN_ERR "kvm: already loaded the other module\n");
7154                 r = -EEXIST;
7155                 goto out;
7156         }
7157
7158         if (!ops->cpu_has_kvm_support()) {
7159                 printk(KERN_ERR "kvm: no hardware support\n");
7160                 r = -EOPNOTSUPP;
7161                 goto out;
7162         }
7163         if (ops->disabled_by_bios()) {
7164                 printk(KERN_ERR "kvm: disabled by bios\n");
7165                 r = -EOPNOTSUPP;
7166                 goto out;
7167         }
7168
7169         /*
7170          * KVM explicitly assumes that the guest has an FPU and
7171          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7172          * vCPU's FPU state as a fxregs_state struct.
7173          */
7174         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7175                 printk(KERN_ERR "kvm: inadequate fpu\n");
7176                 r = -EOPNOTSUPP;
7177                 goto out;
7178         }
7179
7180         r = -ENOMEM;
7181         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7182                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7183                                           NULL);
7184         if (!x86_fpu_cache) {
7185                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7186                 goto out;
7187         }
7188
7189         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7190         if (!shared_msrs) {
7191                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7192                 goto out_free_x86_fpu_cache;
7193         }
7194
7195         r = kvm_mmu_module_init();
7196         if (r)
7197                 goto out_free_percpu;
7198
7199         kvm_x86_ops = ops;
7200
7201         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7202                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7203                         PT_PRESENT_MASK, 0, sme_me_mask);
7204         kvm_timer_init();
7205
7206         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7207
7208         if (boot_cpu_has(X86_FEATURE_XSAVE))
7209                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7210
7211         kvm_lapic_init();
7212         if (pi_inject_timer == -1)
7213                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7214 #ifdef CONFIG_X86_64
7215         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7216
7217         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7218                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7219 #endif
7220
7221         return 0;
7222
7223 out_free_percpu:
7224         free_percpu(shared_msrs);
7225 out_free_x86_fpu_cache:
7226         kmem_cache_destroy(x86_fpu_cache);
7227 out:
7228         return r;
7229 }
7230
7231 void kvm_arch_exit(void)
7232 {
7233 #ifdef CONFIG_X86_64
7234         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7235                 clear_hv_tscchange_cb();
7236 #endif
7237         kvm_lapic_exit();
7238         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7239
7240         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7241                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7242                                             CPUFREQ_TRANSITION_NOTIFIER);
7243         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7244 #ifdef CONFIG_X86_64
7245         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7246 #endif
7247         kvm_x86_ops = NULL;
7248         kvm_mmu_module_exit();
7249         free_percpu(shared_msrs);
7250         kmem_cache_destroy(x86_fpu_cache);
7251 }
7252
7253 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7254 {
7255         ++vcpu->stat.halt_exits;
7256         if (lapic_in_kernel(vcpu)) {
7257                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7258                 return 1;
7259         } else {
7260                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7261                 return 0;
7262         }
7263 }
7264 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7265
7266 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7267 {
7268         int ret = kvm_skip_emulated_instruction(vcpu);
7269         /*
7270          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7271          * KVM_EXIT_DEBUG here.
7272          */
7273         return kvm_vcpu_halt(vcpu) && ret;
7274 }
7275 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7276
7277 #ifdef CONFIG_X86_64
7278 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7279                                 unsigned long clock_type)
7280 {
7281         struct kvm_clock_pairing clock_pairing;
7282         struct timespec64 ts;
7283         u64 cycle;
7284         int ret;
7285
7286         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7287                 return -KVM_EOPNOTSUPP;
7288
7289         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7290                 return -KVM_EOPNOTSUPP;
7291
7292         clock_pairing.sec = ts.tv_sec;
7293         clock_pairing.nsec = ts.tv_nsec;
7294         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7295         clock_pairing.flags = 0;
7296         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7297
7298         ret = 0;
7299         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7300                             sizeof(struct kvm_clock_pairing)))
7301                 ret = -KVM_EFAULT;
7302
7303         return ret;
7304 }
7305 #endif
7306
7307 /*
7308  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7309  *
7310  * @apicid - apicid of vcpu to be kicked.
7311  */
7312 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7313 {
7314         struct kvm_lapic_irq lapic_irq;
7315
7316         lapic_irq.shorthand = 0;
7317         lapic_irq.dest_mode = 0;
7318         lapic_irq.level = 0;
7319         lapic_irq.dest_id = apicid;
7320         lapic_irq.msi_redir_hint = false;
7321
7322         lapic_irq.delivery_mode = APIC_DM_REMRD;
7323         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7324 }
7325
7326 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7327 {
7328         if (!lapic_in_kernel(vcpu)) {
7329                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7330                 return;
7331         }
7332         if (!vcpu->arch.apicv_active)
7333                 return;
7334
7335         vcpu->arch.apicv_active = false;
7336         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7337 }
7338
7339 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7340 {
7341         struct kvm_vcpu *target = NULL;
7342         struct kvm_apic_map *map;
7343
7344         rcu_read_lock();
7345         map = rcu_dereference(kvm->arch.apic_map);
7346
7347         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7348                 target = map->phys_map[dest_id]->vcpu;
7349
7350         rcu_read_unlock();
7351
7352         if (target && READ_ONCE(target->ready))
7353                 kvm_vcpu_yield_to(target);
7354 }
7355
7356 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7357 {
7358         unsigned long nr, a0, a1, a2, a3, ret;
7359         int op_64_bit;
7360
7361         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7362                 return kvm_hv_hypercall(vcpu);
7363
7364         nr = kvm_rax_read(vcpu);
7365         a0 = kvm_rbx_read(vcpu);
7366         a1 = kvm_rcx_read(vcpu);
7367         a2 = kvm_rdx_read(vcpu);
7368         a3 = kvm_rsi_read(vcpu);
7369
7370         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7371
7372         op_64_bit = is_64_bit_mode(vcpu);
7373         if (!op_64_bit) {
7374                 nr &= 0xFFFFFFFF;
7375                 a0 &= 0xFFFFFFFF;
7376                 a1 &= 0xFFFFFFFF;
7377                 a2 &= 0xFFFFFFFF;
7378                 a3 &= 0xFFFFFFFF;
7379         }
7380
7381         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7382                 ret = -KVM_EPERM;
7383                 goto out;
7384         }
7385
7386         switch (nr) {
7387         case KVM_HC_VAPIC_POLL_IRQ:
7388                 ret = 0;
7389                 break;
7390         case KVM_HC_KICK_CPU:
7391                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7392                 kvm_sched_yield(vcpu->kvm, a1);
7393                 ret = 0;
7394                 break;
7395 #ifdef CONFIG_X86_64
7396         case KVM_HC_CLOCK_PAIRING:
7397                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7398                 break;
7399 #endif
7400         case KVM_HC_SEND_IPI:
7401                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7402                 break;
7403         case KVM_HC_SCHED_YIELD:
7404                 kvm_sched_yield(vcpu->kvm, a0);
7405                 ret = 0;
7406                 break;
7407         default:
7408                 ret = -KVM_ENOSYS;
7409                 break;
7410         }
7411 out:
7412         if (!op_64_bit)
7413                 ret = (u32)ret;
7414         kvm_rax_write(vcpu, ret);
7415
7416         ++vcpu->stat.hypercalls;
7417         return kvm_skip_emulated_instruction(vcpu);
7418 }
7419 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7420
7421 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7422 {
7423         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7424         char instruction[3];
7425         unsigned long rip = kvm_rip_read(vcpu);
7426
7427         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7428
7429         return emulator_write_emulated(ctxt, rip, instruction, 3,
7430                 &ctxt->exception);
7431 }
7432
7433 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7434 {
7435         return vcpu->run->request_interrupt_window &&
7436                 likely(!pic_in_kernel(vcpu->kvm));
7437 }
7438
7439 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7440 {
7441         struct kvm_run *kvm_run = vcpu->run;
7442
7443         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7444         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7445         kvm_run->cr8 = kvm_get_cr8(vcpu);
7446         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7447         kvm_run->ready_for_interrupt_injection =
7448                 pic_in_kernel(vcpu->kvm) ||
7449                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7450 }
7451
7452 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7453 {
7454         int max_irr, tpr;
7455
7456         if (!kvm_x86_ops->update_cr8_intercept)
7457                 return;
7458
7459         if (!lapic_in_kernel(vcpu))
7460                 return;
7461
7462         if (vcpu->arch.apicv_active)
7463                 return;
7464
7465         if (!vcpu->arch.apic->vapic_addr)
7466                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7467         else
7468                 max_irr = -1;
7469
7470         if (max_irr != -1)
7471                 max_irr >>= 4;
7472
7473         tpr = kvm_lapic_get_cr8(vcpu);
7474
7475         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7476 }
7477
7478 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7479 {
7480         int r;
7481
7482         /* try to reinject previous events if any */
7483
7484         if (vcpu->arch.exception.injected)
7485                 kvm_x86_ops->queue_exception(vcpu);
7486         /*
7487          * Do not inject an NMI or interrupt if there is a pending
7488          * exception.  Exceptions and interrupts are recognized at
7489          * instruction boundaries, i.e. the start of an instruction.
7490          * Trap-like exceptions, e.g. #DB, have higher priority than
7491          * NMIs and interrupts, i.e. traps are recognized before an
7492          * NMI/interrupt that's pending on the same instruction.
7493          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7494          * priority, but are only generated (pended) during instruction
7495          * execution, i.e. a pending fault-like exception means the
7496          * fault occurred on the *previous* instruction and must be
7497          * serviced prior to recognizing any new events in order to
7498          * fully complete the previous instruction.
7499          */
7500         else if (!vcpu->arch.exception.pending) {
7501                 if (vcpu->arch.nmi_injected)
7502                         kvm_x86_ops->set_nmi(vcpu);
7503                 else if (vcpu->arch.interrupt.injected)
7504                         kvm_x86_ops->set_irq(vcpu);
7505         }
7506
7507         /*
7508          * Call check_nested_events() even if we reinjected a previous event
7509          * in order for caller to determine if it should require immediate-exit
7510          * from L2 to L1 due to pending L1 events which require exit
7511          * from L2 to L1.
7512          */
7513         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7514                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7515                 if (r != 0)
7516                         return r;
7517         }
7518
7519         /* try to inject new event if pending */
7520         if (vcpu->arch.exception.pending) {
7521                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7522                                         vcpu->arch.exception.has_error_code,
7523                                         vcpu->arch.exception.error_code);
7524
7525                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7526                 vcpu->arch.exception.pending = false;
7527                 vcpu->arch.exception.injected = true;
7528
7529                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7530                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7531                                              X86_EFLAGS_RF);
7532
7533                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7534                         /*
7535                          * This code assumes that nSVM doesn't use
7536                          * check_nested_events(). If it does, the
7537                          * DR6/DR7 changes should happen before L1
7538                          * gets a #VMEXIT for an intercepted #DB in
7539                          * L2.  (Under VMX, on the other hand, the
7540                          * DR6/DR7 changes should not happen in the
7541                          * event of a VM-exit to L1 for an intercepted
7542                          * #DB in L2.)
7543                          */
7544                         kvm_deliver_exception_payload(vcpu);
7545                         if (vcpu->arch.dr7 & DR7_GD) {
7546                                 vcpu->arch.dr7 &= ~DR7_GD;
7547                                 kvm_update_dr7(vcpu);
7548                         }
7549                 }
7550
7551                 kvm_x86_ops->queue_exception(vcpu);
7552         }
7553
7554         /* Don't consider new event if we re-injected an event */
7555         if (kvm_event_needs_reinjection(vcpu))
7556                 return 0;
7557
7558         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7559             kvm_x86_ops->smi_allowed(vcpu)) {
7560                 vcpu->arch.smi_pending = false;
7561                 ++vcpu->arch.smi_count;
7562                 enter_smm(vcpu);
7563         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7564                 --vcpu->arch.nmi_pending;
7565                 vcpu->arch.nmi_injected = true;
7566                 kvm_x86_ops->set_nmi(vcpu);
7567         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7568                 /*
7569                  * Because interrupts can be injected asynchronously, we are
7570                  * calling check_nested_events again here to avoid a race condition.
7571                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7572                  * proposal and current concerns.  Perhaps we should be setting
7573                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7574                  */
7575                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7576                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7577                         if (r != 0)
7578                                 return r;
7579                 }
7580                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7581                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7582                                             false);
7583                         kvm_x86_ops->set_irq(vcpu);
7584                 }
7585         }
7586
7587         return 0;
7588 }
7589
7590 static void process_nmi(struct kvm_vcpu *vcpu)
7591 {
7592         unsigned limit = 2;
7593
7594         /*
7595          * x86 is limited to one NMI running, and one NMI pending after it.
7596          * If an NMI is already in progress, limit further NMIs to just one.
7597          * Otherwise, allow two (and we'll inject the first one immediately).
7598          */
7599         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7600                 limit = 1;
7601
7602         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7603         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7604         kvm_make_request(KVM_REQ_EVENT, vcpu);
7605 }
7606
7607 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7608 {
7609         u32 flags = 0;
7610         flags |= seg->g       << 23;
7611         flags |= seg->db      << 22;
7612         flags |= seg->l       << 21;
7613         flags |= seg->avl     << 20;
7614         flags |= seg->present << 15;
7615         flags |= seg->dpl     << 13;
7616         flags |= seg->s       << 12;
7617         flags |= seg->type    << 8;
7618         return flags;
7619 }
7620
7621 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7622 {
7623         struct kvm_segment seg;
7624         int offset;
7625
7626         kvm_get_segment(vcpu, &seg, n);
7627         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7628
7629         if (n < 3)
7630                 offset = 0x7f84 + n * 12;
7631         else
7632                 offset = 0x7f2c + (n - 3) * 12;
7633
7634         put_smstate(u32, buf, offset + 8, seg.base);
7635         put_smstate(u32, buf, offset + 4, seg.limit);
7636         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7637 }
7638
7639 #ifdef CONFIG_X86_64
7640 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7641 {
7642         struct kvm_segment seg;
7643         int offset;
7644         u16 flags;
7645
7646         kvm_get_segment(vcpu, &seg, n);
7647         offset = 0x7e00 + n * 16;
7648
7649         flags = enter_smm_get_segment_flags(&seg) >> 8;
7650         put_smstate(u16, buf, offset, seg.selector);
7651         put_smstate(u16, buf, offset + 2, flags);
7652         put_smstate(u32, buf, offset + 4, seg.limit);
7653         put_smstate(u64, buf, offset + 8, seg.base);
7654 }
7655 #endif
7656
7657 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7658 {
7659         struct desc_ptr dt;
7660         struct kvm_segment seg;
7661         unsigned long val;
7662         int i;
7663
7664         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7665         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7666         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7667         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7668
7669         for (i = 0; i < 8; i++)
7670                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7671
7672         kvm_get_dr(vcpu, 6, &val);
7673         put_smstate(u32, buf, 0x7fcc, (u32)val);
7674         kvm_get_dr(vcpu, 7, &val);
7675         put_smstate(u32, buf, 0x7fc8, (u32)val);
7676
7677         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7678         put_smstate(u32, buf, 0x7fc4, seg.selector);
7679         put_smstate(u32, buf, 0x7f64, seg.base);
7680         put_smstate(u32, buf, 0x7f60, seg.limit);
7681         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7682
7683         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7684         put_smstate(u32, buf, 0x7fc0, seg.selector);
7685         put_smstate(u32, buf, 0x7f80, seg.base);
7686         put_smstate(u32, buf, 0x7f7c, seg.limit);
7687         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7688
7689         kvm_x86_ops->get_gdt(vcpu, &dt);
7690         put_smstate(u32, buf, 0x7f74, dt.address);
7691         put_smstate(u32, buf, 0x7f70, dt.size);
7692
7693         kvm_x86_ops->get_idt(vcpu, &dt);
7694         put_smstate(u32, buf, 0x7f58, dt.address);
7695         put_smstate(u32, buf, 0x7f54, dt.size);
7696
7697         for (i = 0; i < 6; i++)
7698                 enter_smm_save_seg_32(vcpu, buf, i);
7699
7700         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7701
7702         /* revision id */
7703         put_smstate(u32, buf, 0x7efc, 0x00020000);
7704         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7705 }
7706
7707 #ifdef CONFIG_X86_64
7708 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7709 {
7710         struct desc_ptr dt;
7711         struct kvm_segment seg;
7712         unsigned long val;
7713         int i;
7714
7715         for (i = 0; i < 16; i++)
7716                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7717
7718         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7719         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7720
7721         kvm_get_dr(vcpu, 6, &val);
7722         put_smstate(u64, buf, 0x7f68, val);
7723         kvm_get_dr(vcpu, 7, &val);
7724         put_smstate(u64, buf, 0x7f60, val);
7725
7726         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7727         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7728         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7729
7730         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7731
7732         /* revision id */
7733         put_smstate(u32, buf, 0x7efc, 0x00020064);
7734
7735         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7736
7737         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7738         put_smstate(u16, buf, 0x7e90, seg.selector);
7739         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7740         put_smstate(u32, buf, 0x7e94, seg.limit);
7741         put_smstate(u64, buf, 0x7e98, seg.base);
7742
7743         kvm_x86_ops->get_idt(vcpu, &dt);
7744         put_smstate(u32, buf, 0x7e84, dt.size);
7745         put_smstate(u64, buf, 0x7e88, dt.address);
7746
7747         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7748         put_smstate(u16, buf, 0x7e70, seg.selector);
7749         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7750         put_smstate(u32, buf, 0x7e74, seg.limit);
7751         put_smstate(u64, buf, 0x7e78, seg.base);
7752
7753         kvm_x86_ops->get_gdt(vcpu, &dt);
7754         put_smstate(u32, buf, 0x7e64, dt.size);
7755         put_smstate(u64, buf, 0x7e68, dt.address);
7756
7757         for (i = 0; i < 6; i++)
7758                 enter_smm_save_seg_64(vcpu, buf, i);
7759 }
7760 #endif
7761
7762 static void enter_smm(struct kvm_vcpu *vcpu)
7763 {
7764         struct kvm_segment cs, ds;
7765         struct desc_ptr dt;
7766         char buf[512];
7767         u32 cr0;
7768
7769         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7770         memset(buf, 0, 512);
7771 #ifdef CONFIG_X86_64
7772         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7773                 enter_smm_save_state_64(vcpu, buf);
7774         else
7775 #endif
7776                 enter_smm_save_state_32(vcpu, buf);
7777
7778         /*
7779          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7780          * vCPU state (e.g. leave guest mode) after we've saved the state into
7781          * the SMM state-save area.
7782          */
7783         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7784
7785         vcpu->arch.hflags |= HF_SMM_MASK;
7786         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7787
7788         if (kvm_x86_ops->get_nmi_mask(vcpu))
7789                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7790         else
7791                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7792
7793         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7794         kvm_rip_write(vcpu, 0x8000);
7795
7796         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7797         kvm_x86_ops->set_cr0(vcpu, cr0);
7798         vcpu->arch.cr0 = cr0;
7799
7800         kvm_x86_ops->set_cr4(vcpu, 0);
7801
7802         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7803         dt.address = dt.size = 0;
7804         kvm_x86_ops->set_idt(vcpu, &dt);
7805
7806         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7807
7808         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7809         cs.base = vcpu->arch.smbase;
7810
7811         ds.selector = 0;
7812         ds.base = 0;
7813
7814         cs.limit    = ds.limit = 0xffffffff;
7815         cs.type     = ds.type = 0x3;
7816         cs.dpl      = ds.dpl = 0;
7817         cs.db       = ds.db = 0;
7818         cs.s        = ds.s = 1;
7819         cs.l        = ds.l = 0;
7820         cs.g        = ds.g = 1;
7821         cs.avl      = ds.avl = 0;
7822         cs.present  = ds.present = 1;
7823         cs.unusable = ds.unusable = 0;
7824         cs.padding  = ds.padding = 0;
7825
7826         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7827         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7828         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7829         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7830         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7831         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7832
7833 #ifdef CONFIG_X86_64
7834         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7835                 kvm_x86_ops->set_efer(vcpu, 0);
7836 #endif
7837
7838         kvm_update_cpuid(vcpu);
7839         kvm_mmu_reset_context(vcpu);
7840 }
7841
7842 static void process_smi(struct kvm_vcpu *vcpu)
7843 {
7844         vcpu->arch.smi_pending = true;
7845         kvm_make_request(KVM_REQ_EVENT, vcpu);
7846 }
7847
7848 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7849 {
7850         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7851 }
7852
7853 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7854 {
7855         if (!kvm_apic_present(vcpu))
7856                 return;
7857
7858         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7859
7860         if (irqchip_split(vcpu->kvm))
7861                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7862         else {
7863                 if (vcpu->arch.apicv_active)
7864                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7865                 if (ioapic_in_kernel(vcpu->kvm))
7866                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7867         }
7868
7869         if (is_guest_mode(vcpu))
7870                 vcpu->arch.load_eoi_exitmap_pending = true;
7871         else
7872                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7873 }
7874
7875 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7876 {
7877         u64 eoi_exit_bitmap[4];
7878
7879         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7880                 return;
7881
7882         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7883                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7884         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7885 }
7886
7887 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7888                 unsigned long start, unsigned long end,
7889                 bool blockable)
7890 {
7891         unsigned long apic_address;
7892
7893         /*
7894          * The physical address of apic access page is stored in the VMCS.
7895          * Update it when it becomes invalid.
7896          */
7897         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7898         if (start <= apic_address && apic_address < end)
7899                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7900
7901         return 0;
7902 }
7903
7904 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7905 {
7906         struct page *page = NULL;
7907
7908         if (!lapic_in_kernel(vcpu))
7909                 return;
7910
7911         if (!kvm_x86_ops->set_apic_access_page_addr)
7912                 return;
7913
7914         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7915         if (is_error_page(page))
7916                 return;
7917         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7918
7919         /*
7920          * Do not pin apic access page in memory, the MMU notifier
7921          * will call us again if it is migrated or swapped out.
7922          */
7923         put_page(page);
7924 }
7925 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7926
7927 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7928 {
7929         smp_send_reschedule(vcpu->cpu);
7930 }
7931 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7932
7933 /*
7934  * Returns 1 to let vcpu_run() continue the guest execution loop without
7935  * exiting to the userspace.  Otherwise, the value will be returned to the
7936  * userspace.
7937  */
7938 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7939 {
7940         int r;
7941         bool req_int_win =
7942                 dm_request_for_irq_injection(vcpu) &&
7943                 kvm_cpu_accept_dm_intr(vcpu);
7944
7945         bool req_immediate_exit = false;
7946
7947         if (kvm_request_pending(vcpu)) {
7948                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7949                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7950                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7951                         kvm_mmu_unload(vcpu);
7952                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7953                         __kvm_migrate_timers(vcpu);
7954                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7955                         kvm_gen_update_masterclock(vcpu->kvm);
7956                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7957                         kvm_gen_kvmclock_update(vcpu);
7958                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7959                         r = kvm_guest_time_update(vcpu);
7960                         if (unlikely(r))
7961                                 goto out;
7962                 }
7963                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7964                         kvm_mmu_sync_roots(vcpu);
7965                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7966                         kvm_mmu_load_cr3(vcpu);
7967                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7968                         kvm_vcpu_flush_tlb(vcpu, true);
7969                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7970                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7971                         r = 0;
7972                         goto out;
7973                 }
7974                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7975                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7976                         vcpu->mmio_needed = 0;
7977                         r = 0;
7978                         goto out;
7979                 }
7980                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7981                         /* Page is swapped out. Do synthetic halt */
7982                         vcpu->arch.apf.halted = true;
7983                         r = 1;
7984                         goto out;
7985                 }
7986                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7987                         record_steal_time(vcpu);
7988                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7989                         process_smi(vcpu);
7990                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7991                         process_nmi(vcpu);
7992                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7993                         kvm_pmu_handle_event(vcpu);
7994                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7995                         kvm_pmu_deliver_pmi(vcpu);
7996                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7997                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7998                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7999                                      vcpu->arch.ioapic_handled_vectors)) {
8000                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8001                                 vcpu->run->eoi.vector =
8002                                                 vcpu->arch.pending_ioapic_eoi;
8003                                 r = 0;
8004                                 goto out;
8005                         }
8006                 }
8007                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8008                         vcpu_scan_ioapic(vcpu);
8009                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8010                         vcpu_load_eoi_exitmap(vcpu);
8011                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8012                         kvm_vcpu_reload_apic_access_page(vcpu);
8013                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8014                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8015                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8016                         r = 0;
8017                         goto out;
8018                 }
8019                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8020                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8021                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8022                         r = 0;
8023                         goto out;
8024                 }
8025                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8026                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8027                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8028                         r = 0;
8029                         goto out;
8030                 }
8031
8032                 /*
8033                  * KVM_REQ_HV_STIMER has to be processed after
8034                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8035                  * depend on the guest clock being up-to-date
8036                  */
8037                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8038                         kvm_hv_process_stimers(vcpu);
8039         }
8040
8041         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8042                 ++vcpu->stat.req_event;
8043                 kvm_apic_accept_events(vcpu);
8044                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8045                         r = 1;
8046                         goto out;
8047                 }
8048
8049                 if (inject_pending_event(vcpu, req_int_win) != 0)
8050                         req_immediate_exit = true;
8051                 else {
8052                         /* Enable SMI/NMI/IRQ window open exits if needed.
8053                          *
8054                          * SMIs have three cases:
8055                          * 1) They can be nested, and then there is nothing to
8056                          *    do here because RSM will cause a vmexit anyway.
8057                          * 2) There is an ISA-specific reason why SMI cannot be
8058                          *    injected, and the moment when this changes can be
8059                          *    intercepted.
8060                          * 3) Or the SMI can be pending because
8061                          *    inject_pending_event has completed the injection
8062                          *    of an IRQ or NMI from the previous vmexit, and
8063                          *    then we request an immediate exit to inject the
8064                          *    SMI.
8065                          */
8066                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8067                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8068                                         req_immediate_exit = true;
8069                         if (vcpu->arch.nmi_pending)
8070                                 kvm_x86_ops->enable_nmi_window(vcpu);
8071                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8072                                 kvm_x86_ops->enable_irq_window(vcpu);
8073                         WARN_ON(vcpu->arch.exception.pending);
8074                 }
8075
8076                 if (kvm_lapic_enabled(vcpu)) {
8077                         update_cr8_intercept(vcpu);
8078                         kvm_lapic_sync_to_vapic(vcpu);
8079                 }
8080         }
8081
8082         r = kvm_mmu_reload(vcpu);
8083         if (unlikely(r)) {
8084                 goto cancel_injection;
8085         }
8086
8087         preempt_disable();
8088
8089         kvm_x86_ops->prepare_guest_switch(vcpu);
8090
8091         /*
8092          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8093          * IPI are then delayed after guest entry, which ensures that they
8094          * result in virtual interrupt delivery.
8095          */
8096         local_irq_disable();
8097         vcpu->mode = IN_GUEST_MODE;
8098
8099         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8100
8101         /*
8102          * 1) We should set ->mode before checking ->requests.  Please see
8103          * the comment in kvm_vcpu_exiting_guest_mode().
8104          *
8105          * 2) For APICv, we should set ->mode before checking PID.ON. This
8106          * pairs with the memory barrier implicit in pi_test_and_set_on
8107          * (see vmx_deliver_posted_interrupt).
8108          *
8109          * 3) This also orders the write to mode from any reads to the page
8110          * tables done while the VCPU is running.  Please see the comment
8111          * in kvm_flush_remote_tlbs.
8112          */
8113         smp_mb__after_srcu_read_unlock();
8114
8115         /*
8116          * This handles the case where a posted interrupt was
8117          * notified with kvm_vcpu_kick.
8118          */
8119         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8120                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8121
8122         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8123             || need_resched() || signal_pending(current)) {
8124                 vcpu->mode = OUTSIDE_GUEST_MODE;
8125                 smp_wmb();
8126                 local_irq_enable();
8127                 preempt_enable();
8128                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8129                 r = 1;
8130                 goto cancel_injection;
8131         }
8132
8133         if (req_immediate_exit) {
8134                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8135                 kvm_x86_ops->request_immediate_exit(vcpu);
8136         }
8137
8138         trace_kvm_entry(vcpu->vcpu_id);
8139         guest_enter_irqoff();
8140
8141         /* The preempt notifier should have taken care of the FPU already.  */
8142         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8143
8144         if (unlikely(vcpu->arch.switch_db_regs)) {
8145                 set_debugreg(0, 7);
8146                 set_debugreg(vcpu->arch.eff_db[0], 0);
8147                 set_debugreg(vcpu->arch.eff_db[1], 1);
8148                 set_debugreg(vcpu->arch.eff_db[2], 2);
8149                 set_debugreg(vcpu->arch.eff_db[3], 3);
8150                 set_debugreg(vcpu->arch.dr6, 6);
8151                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8152         }
8153
8154         kvm_x86_ops->run(vcpu);
8155
8156         /*
8157          * Do this here before restoring debug registers on the host.  And
8158          * since we do this before handling the vmexit, a DR access vmexit
8159          * can (a) read the correct value of the debug registers, (b) set
8160          * KVM_DEBUGREG_WONT_EXIT again.
8161          */
8162         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8163                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8164                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8165                 kvm_update_dr0123(vcpu);
8166                 kvm_update_dr6(vcpu);
8167                 kvm_update_dr7(vcpu);
8168                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8169         }
8170
8171         /*
8172          * If the guest has used debug registers, at least dr7
8173          * will be disabled while returning to the host.
8174          * If we don't have active breakpoints in the host, we don't
8175          * care about the messed up debug address registers. But if
8176          * we have some of them active, restore the old state.
8177          */
8178         if (hw_breakpoint_active())
8179                 hw_breakpoint_restore();
8180
8181         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8182
8183         vcpu->mode = OUTSIDE_GUEST_MODE;
8184         smp_wmb();
8185
8186         kvm_x86_ops->handle_exit_irqoff(vcpu);
8187
8188         /*
8189          * Consume any pending interrupts, including the possible source of
8190          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8191          * An instruction is required after local_irq_enable() to fully unblock
8192          * interrupts on processors that implement an interrupt shadow, the
8193          * stat.exits increment will do nicely.
8194          */
8195         kvm_before_interrupt(vcpu);
8196         local_irq_enable();
8197         ++vcpu->stat.exits;
8198         local_irq_disable();
8199         kvm_after_interrupt(vcpu);
8200
8201         guest_exit_irqoff();
8202         if (lapic_in_kernel(vcpu)) {
8203                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8204                 if (delta != S64_MIN) {
8205                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8206                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8207                 }
8208         }
8209
8210         local_irq_enable();
8211         preempt_enable();
8212
8213         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8214
8215         /*
8216          * Profile KVM exit RIPs:
8217          */
8218         if (unlikely(prof_on == KVM_PROFILING)) {
8219                 unsigned long rip = kvm_rip_read(vcpu);
8220                 profile_hit(KVM_PROFILING, (void *)rip);
8221         }
8222
8223         if (unlikely(vcpu->arch.tsc_always_catchup))
8224                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8225
8226         if (vcpu->arch.apic_attention)
8227                 kvm_lapic_sync_from_vapic(vcpu);
8228
8229         vcpu->arch.gpa_available = false;
8230         r = kvm_x86_ops->handle_exit(vcpu);
8231         return r;
8232
8233 cancel_injection:
8234         kvm_x86_ops->cancel_injection(vcpu);
8235         if (unlikely(vcpu->arch.apic_attention))
8236                 kvm_lapic_sync_from_vapic(vcpu);
8237 out:
8238         return r;
8239 }
8240
8241 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8242 {
8243         if (!kvm_arch_vcpu_runnable(vcpu) &&
8244             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8245                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8246                 kvm_vcpu_block(vcpu);
8247                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8248
8249                 if (kvm_x86_ops->post_block)
8250                         kvm_x86_ops->post_block(vcpu);
8251
8252                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8253                         return 1;
8254         }
8255
8256         kvm_apic_accept_events(vcpu);
8257         switch(vcpu->arch.mp_state) {
8258         case KVM_MP_STATE_HALTED:
8259                 vcpu->arch.pv.pv_unhalted = false;
8260                 vcpu->arch.mp_state =
8261                         KVM_MP_STATE_RUNNABLE;
8262                 /* fall through */
8263         case KVM_MP_STATE_RUNNABLE:
8264                 vcpu->arch.apf.halted = false;
8265                 break;
8266         case KVM_MP_STATE_INIT_RECEIVED:
8267                 break;
8268         default:
8269                 return -EINTR;
8270                 break;
8271         }
8272         return 1;
8273 }
8274
8275 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8276 {
8277         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8278                 kvm_x86_ops->check_nested_events(vcpu, false);
8279
8280         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8281                 !vcpu->arch.apf.halted);
8282 }
8283
8284 static int vcpu_run(struct kvm_vcpu *vcpu)
8285 {
8286         int r;
8287         struct kvm *kvm = vcpu->kvm;
8288
8289         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8290         vcpu->arch.l1tf_flush_l1d = true;
8291
8292         for (;;) {
8293                 if (kvm_vcpu_running(vcpu)) {
8294                         r = vcpu_enter_guest(vcpu);
8295                 } else {
8296                         r = vcpu_block(kvm, vcpu);
8297                 }
8298
8299                 if (r <= 0)
8300                         break;
8301
8302                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8303                 if (kvm_cpu_has_pending_timer(vcpu))
8304                         kvm_inject_pending_timer_irqs(vcpu);
8305
8306                 if (dm_request_for_irq_injection(vcpu) &&
8307                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8308                         r = 0;
8309                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8310                         ++vcpu->stat.request_irq_exits;
8311                         break;
8312                 }
8313
8314                 kvm_check_async_pf_completion(vcpu);
8315
8316                 if (signal_pending(current)) {
8317                         r = -EINTR;
8318                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8319                         ++vcpu->stat.signal_exits;
8320                         break;
8321                 }
8322                 if (need_resched()) {
8323                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8324                         cond_resched();
8325                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8326                 }
8327         }
8328
8329         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8330
8331         return r;
8332 }
8333
8334 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8335 {
8336         int r;
8337
8338         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8339         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8340         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8341         return r;
8342 }
8343
8344 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8345 {
8346         BUG_ON(!vcpu->arch.pio.count);
8347
8348         return complete_emulated_io(vcpu);
8349 }
8350
8351 /*
8352  * Implements the following, as a state machine:
8353  *
8354  * read:
8355  *   for each fragment
8356  *     for each mmio piece in the fragment
8357  *       write gpa, len
8358  *       exit
8359  *       copy data
8360  *   execute insn
8361  *
8362  * write:
8363  *   for each fragment
8364  *     for each mmio piece in the fragment
8365  *       write gpa, len
8366  *       copy data
8367  *       exit
8368  */
8369 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8370 {
8371         struct kvm_run *run = vcpu->run;
8372         struct kvm_mmio_fragment *frag;
8373         unsigned len;
8374
8375         BUG_ON(!vcpu->mmio_needed);
8376
8377         /* Complete previous fragment */
8378         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8379         len = min(8u, frag->len);
8380         if (!vcpu->mmio_is_write)
8381                 memcpy(frag->data, run->mmio.data, len);
8382
8383         if (frag->len <= 8) {
8384                 /* Switch to the next fragment. */
8385                 frag++;
8386                 vcpu->mmio_cur_fragment++;
8387         } else {
8388                 /* Go forward to the next mmio piece. */
8389                 frag->data += len;
8390                 frag->gpa += len;
8391                 frag->len -= len;
8392         }
8393
8394         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8395                 vcpu->mmio_needed = 0;
8396
8397                 /* FIXME: return into emulator if single-stepping.  */
8398                 if (vcpu->mmio_is_write)
8399                         return 1;
8400                 vcpu->mmio_read_completed = 1;
8401                 return complete_emulated_io(vcpu);
8402         }
8403
8404         run->exit_reason = KVM_EXIT_MMIO;
8405         run->mmio.phys_addr = frag->gpa;
8406         if (vcpu->mmio_is_write)
8407                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8408         run->mmio.len = min(8u, frag->len);
8409         run->mmio.is_write = vcpu->mmio_is_write;
8410         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8411         return 0;
8412 }
8413
8414 /* Swap (qemu) user FPU context for the guest FPU context. */
8415 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8416 {
8417         fpregs_lock();
8418
8419         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8420         /* PKRU is separately restored in kvm_x86_ops->run.  */
8421         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8422                                 ~XFEATURE_MASK_PKRU);
8423
8424         fpregs_mark_activate();
8425         fpregs_unlock();
8426
8427         trace_kvm_fpu(1);
8428 }
8429
8430 /* When vcpu_run ends, restore user space FPU context. */
8431 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8432 {
8433         fpregs_lock();
8434
8435         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8436         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8437
8438         fpregs_mark_activate();
8439         fpregs_unlock();
8440
8441         ++vcpu->stat.fpu_reload;
8442         trace_kvm_fpu(0);
8443 }
8444
8445 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8446 {
8447         int r;
8448
8449         vcpu_load(vcpu);
8450         kvm_sigset_activate(vcpu);
8451         kvm_load_guest_fpu(vcpu);
8452
8453         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8454                 if (kvm_run->immediate_exit) {
8455                         r = -EINTR;
8456                         goto out;
8457                 }
8458                 kvm_vcpu_block(vcpu);
8459                 kvm_apic_accept_events(vcpu);
8460                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8461                 r = -EAGAIN;
8462                 if (signal_pending(current)) {
8463                         r = -EINTR;
8464                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8465                         ++vcpu->stat.signal_exits;
8466                 }
8467                 goto out;
8468         }
8469
8470         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8471                 r = -EINVAL;
8472                 goto out;
8473         }
8474
8475         if (vcpu->run->kvm_dirty_regs) {
8476                 r = sync_regs(vcpu);
8477                 if (r != 0)
8478                         goto out;
8479         }
8480
8481         /* re-sync apic's tpr */
8482         if (!lapic_in_kernel(vcpu)) {
8483                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8484                         r = -EINVAL;
8485                         goto out;
8486                 }
8487         }
8488
8489         if (unlikely(vcpu->arch.complete_userspace_io)) {
8490                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8491                 vcpu->arch.complete_userspace_io = NULL;
8492                 r = cui(vcpu);
8493                 if (r <= 0)
8494                         goto out;
8495         } else
8496                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8497
8498         if (kvm_run->immediate_exit)
8499                 r = -EINTR;
8500         else
8501                 r = vcpu_run(vcpu);
8502
8503 out:
8504         kvm_put_guest_fpu(vcpu);
8505         if (vcpu->run->kvm_valid_regs)
8506                 store_regs(vcpu);
8507         post_kvm_run_save(vcpu);
8508         kvm_sigset_deactivate(vcpu);
8509
8510         vcpu_put(vcpu);
8511         return r;
8512 }
8513
8514 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8515 {
8516         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8517                 /*
8518                  * We are here if userspace calls get_regs() in the middle of
8519                  * instruction emulation. Registers state needs to be copied
8520                  * back from emulation context to vcpu. Userspace shouldn't do
8521                  * that usually, but some bad designed PV devices (vmware
8522                  * backdoor interface) need this to work
8523                  */
8524                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8525                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8526         }
8527         regs->rax = kvm_rax_read(vcpu);
8528         regs->rbx = kvm_rbx_read(vcpu);
8529         regs->rcx = kvm_rcx_read(vcpu);
8530         regs->rdx = kvm_rdx_read(vcpu);
8531         regs->rsi = kvm_rsi_read(vcpu);
8532         regs->rdi = kvm_rdi_read(vcpu);
8533         regs->rsp = kvm_rsp_read(vcpu);
8534         regs->rbp = kvm_rbp_read(vcpu);
8535 #ifdef CONFIG_X86_64
8536         regs->r8 = kvm_r8_read(vcpu);
8537         regs->r9 = kvm_r9_read(vcpu);
8538         regs->r10 = kvm_r10_read(vcpu);
8539         regs->r11 = kvm_r11_read(vcpu);
8540         regs->r12 = kvm_r12_read(vcpu);
8541         regs->r13 = kvm_r13_read(vcpu);
8542         regs->r14 = kvm_r14_read(vcpu);
8543         regs->r15 = kvm_r15_read(vcpu);
8544 #endif
8545
8546         regs->rip = kvm_rip_read(vcpu);
8547         regs->rflags = kvm_get_rflags(vcpu);
8548 }
8549
8550 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8551 {
8552         vcpu_load(vcpu);
8553         __get_regs(vcpu, regs);
8554         vcpu_put(vcpu);
8555         return 0;
8556 }
8557
8558 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8559 {
8560         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8561         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8562
8563         kvm_rax_write(vcpu, regs->rax);
8564         kvm_rbx_write(vcpu, regs->rbx);
8565         kvm_rcx_write(vcpu, regs->rcx);
8566         kvm_rdx_write(vcpu, regs->rdx);
8567         kvm_rsi_write(vcpu, regs->rsi);
8568         kvm_rdi_write(vcpu, regs->rdi);
8569         kvm_rsp_write(vcpu, regs->rsp);
8570         kvm_rbp_write(vcpu, regs->rbp);
8571 #ifdef CONFIG_X86_64
8572         kvm_r8_write(vcpu, regs->r8);
8573         kvm_r9_write(vcpu, regs->r9);
8574         kvm_r10_write(vcpu, regs->r10);
8575         kvm_r11_write(vcpu, regs->r11);
8576         kvm_r12_write(vcpu, regs->r12);
8577         kvm_r13_write(vcpu, regs->r13);
8578         kvm_r14_write(vcpu, regs->r14);
8579         kvm_r15_write(vcpu, regs->r15);
8580 #endif
8581
8582         kvm_rip_write(vcpu, regs->rip);
8583         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8584
8585         vcpu->arch.exception.pending = false;
8586
8587         kvm_make_request(KVM_REQ_EVENT, vcpu);
8588 }
8589
8590 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8591 {
8592         vcpu_load(vcpu);
8593         __set_regs(vcpu, regs);
8594         vcpu_put(vcpu);
8595         return 0;
8596 }
8597
8598 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8599 {
8600         struct kvm_segment cs;
8601
8602         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8603         *db = cs.db;
8604         *l = cs.l;
8605 }
8606 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8607
8608 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8609 {
8610         struct desc_ptr dt;
8611
8612         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8613         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8614         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8615         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8616         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8617         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8618
8619         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8620         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8621
8622         kvm_x86_ops->get_idt(vcpu, &dt);
8623         sregs->idt.limit = dt.size;
8624         sregs->idt.base = dt.address;
8625         kvm_x86_ops->get_gdt(vcpu, &dt);
8626         sregs->gdt.limit = dt.size;
8627         sregs->gdt.base = dt.address;
8628
8629         sregs->cr0 = kvm_read_cr0(vcpu);
8630         sregs->cr2 = vcpu->arch.cr2;
8631         sregs->cr3 = kvm_read_cr3(vcpu);
8632         sregs->cr4 = kvm_read_cr4(vcpu);
8633         sregs->cr8 = kvm_get_cr8(vcpu);
8634         sregs->efer = vcpu->arch.efer;
8635         sregs->apic_base = kvm_get_apic_base(vcpu);
8636
8637         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8638
8639         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8640                 set_bit(vcpu->arch.interrupt.nr,
8641                         (unsigned long *)sregs->interrupt_bitmap);
8642 }
8643
8644 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8645                                   struct kvm_sregs *sregs)
8646 {
8647         vcpu_load(vcpu);
8648         __get_sregs(vcpu, sregs);
8649         vcpu_put(vcpu);
8650         return 0;
8651 }
8652
8653 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8654                                     struct kvm_mp_state *mp_state)
8655 {
8656         vcpu_load(vcpu);
8657
8658         kvm_apic_accept_events(vcpu);
8659         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8660                                         vcpu->arch.pv.pv_unhalted)
8661                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8662         else
8663                 mp_state->mp_state = vcpu->arch.mp_state;
8664
8665         vcpu_put(vcpu);
8666         return 0;
8667 }
8668
8669 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8670                                     struct kvm_mp_state *mp_state)
8671 {
8672         int ret = -EINVAL;
8673
8674         vcpu_load(vcpu);
8675
8676         if (!lapic_in_kernel(vcpu) &&
8677             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8678                 goto out;
8679
8680         /* INITs are latched while in SMM */
8681         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8682             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8683              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8684                 goto out;
8685
8686         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8687                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8688                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8689         } else
8690                 vcpu->arch.mp_state = mp_state->mp_state;
8691         kvm_make_request(KVM_REQ_EVENT, vcpu);
8692
8693         ret = 0;
8694 out:
8695         vcpu_put(vcpu);
8696         return ret;
8697 }
8698
8699 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8700                     int reason, bool has_error_code, u32 error_code)
8701 {
8702         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8703         int ret;
8704
8705         init_emulate_ctxt(vcpu);
8706
8707         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8708                                    has_error_code, error_code);
8709         if (ret) {
8710                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8711                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
8712                 vcpu->run->internal.ndata = 0;
8713                 return 0;
8714         }
8715
8716         kvm_rip_write(vcpu, ctxt->eip);
8717         kvm_set_rflags(vcpu, ctxt->eflags);
8718         kvm_make_request(KVM_REQ_EVENT, vcpu);
8719         return 1;
8720 }
8721 EXPORT_SYMBOL_GPL(kvm_task_switch);
8722
8723 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8724 {
8725         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8726                 /*
8727                  * When EFER.LME and CR0.PG are set, the processor is in
8728                  * 64-bit mode (though maybe in a 32-bit code segment).
8729                  * CR4.PAE and EFER.LMA must be set.
8730                  */
8731                 if (!(sregs->cr4 & X86_CR4_PAE)
8732                     || !(sregs->efer & EFER_LMA))
8733                         return -EINVAL;
8734         } else {
8735                 /*
8736                  * Not in 64-bit mode: EFER.LMA is clear and the code
8737                  * segment cannot be 64-bit.
8738                  */
8739                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8740                         return -EINVAL;
8741         }
8742
8743         return kvm_valid_cr4(vcpu, sregs->cr4);
8744 }
8745
8746 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8747 {
8748         struct msr_data apic_base_msr;
8749         int mmu_reset_needed = 0;
8750         int cpuid_update_needed = 0;
8751         int pending_vec, max_bits, idx;
8752         struct desc_ptr dt;
8753         int ret = -EINVAL;
8754
8755         if (kvm_valid_sregs(vcpu, sregs))
8756                 goto out;
8757
8758         apic_base_msr.data = sregs->apic_base;
8759         apic_base_msr.host_initiated = true;
8760         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8761                 goto out;
8762
8763         dt.size = sregs->idt.limit;
8764         dt.address = sregs->idt.base;
8765         kvm_x86_ops->set_idt(vcpu, &dt);
8766         dt.size = sregs->gdt.limit;
8767         dt.address = sregs->gdt.base;
8768         kvm_x86_ops->set_gdt(vcpu, &dt);
8769
8770         vcpu->arch.cr2 = sregs->cr2;
8771         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8772         vcpu->arch.cr3 = sregs->cr3;
8773         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8774
8775         kvm_set_cr8(vcpu, sregs->cr8);
8776
8777         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8778         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8779
8780         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8781         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8782         vcpu->arch.cr0 = sregs->cr0;
8783
8784         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8785         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8786                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8787         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8788         if (cpuid_update_needed)
8789                 kvm_update_cpuid(vcpu);
8790
8791         idx = srcu_read_lock(&vcpu->kvm->srcu);
8792         if (is_pae_paging(vcpu)) {
8793                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8794                 mmu_reset_needed = 1;
8795         }
8796         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8797
8798         if (mmu_reset_needed)
8799                 kvm_mmu_reset_context(vcpu);
8800
8801         max_bits = KVM_NR_INTERRUPTS;
8802         pending_vec = find_first_bit(
8803                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8804         if (pending_vec < max_bits) {
8805                 kvm_queue_interrupt(vcpu, pending_vec, false);
8806                 pr_debug("Set back pending irq %d\n", pending_vec);
8807         }
8808
8809         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8810         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8811         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8812         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8813         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8814         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8815
8816         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8817         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8818
8819         update_cr8_intercept(vcpu);
8820
8821         /* Older userspace won't unhalt the vcpu on reset. */
8822         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8823             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8824             !is_protmode(vcpu))
8825                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8826
8827         kvm_make_request(KVM_REQ_EVENT, vcpu);
8828
8829         ret = 0;
8830 out:
8831         return ret;
8832 }
8833
8834 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8835                                   struct kvm_sregs *sregs)
8836 {
8837         int ret;
8838
8839         vcpu_load(vcpu);
8840         ret = __set_sregs(vcpu, sregs);
8841         vcpu_put(vcpu);
8842         return ret;
8843 }
8844
8845 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8846                                         struct kvm_guest_debug *dbg)
8847 {
8848         unsigned long rflags;
8849         int i, r;
8850
8851         vcpu_load(vcpu);
8852
8853         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8854                 r = -EBUSY;
8855                 if (vcpu->arch.exception.pending)
8856                         goto out;
8857                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8858                         kvm_queue_exception(vcpu, DB_VECTOR);
8859                 else
8860                         kvm_queue_exception(vcpu, BP_VECTOR);
8861         }
8862
8863         /*
8864          * Read rflags as long as potentially injected trace flags are still
8865          * filtered out.
8866          */
8867         rflags = kvm_get_rflags(vcpu);
8868
8869         vcpu->guest_debug = dbg->control;
8870         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8871                 vcpu->guest_debug = 0;
8872
8873         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8874                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8875                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8876                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8877         } else {
8878                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8879                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8880         }
8881         kvm_update_dr7(vcpu);
8882
8883         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8884                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8885                         get_segment_base(vcpu, VCPU_SREG_CS);
8886
8887         /*
8888          * Trigger an rflags update that will inject or remove the trace
8889          * flags.
8890          */
8891         kvm_set_rflags(vcpu, rflags);
8892
8893         kvm_x86_ops->update_bp_intercept(vcpu);
8894
8895         r = 0;
8896
8897 out:
8898         vcpu_put(vcpu);
8899         return r;
8900 }
8901
8902 /*
8903  * Translate a guest virtual address to a guest physical address.
8904  */
8905 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8906                                     struct kvm_translation *tr)
8907 {
8908         unsigned long vaddr = tr->linear_address;
8909         gpa_t gpa;
8910         int idx;
8911
8912         vcpu_load(vcpu);
8913
8914         idx = srcu_read_lock(&vcpu->kvm->srcu);
8915         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8916         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8917         tr->physical_address = gpa;
8918         tr->valid = gpa != UNMAPPED_GVA;
8919         tr->writeable = 1;
8920         tr->usermode = 0;
8921
8922         vcpu_put(vcpu);
8923         return 0;
8924 }
8925
8926 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8927 {
8928         struct fxregs_state *fxsave;
8929
8930         vcpu_load(vcpu);
8931
8932         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8933         memcpy(fpu->fpr, fxsave->st_space, 128);
8934         fpu->fcw = fxsave->cwd;
8935         fpu->fsw = fxsave->swd;
8936         fpu->ftwx = fxsave->twd;
8937         fpu->last_opcode = fxsave->fop;
8938         fpu->last_ip = fxsave->rip;
8939         fpu->last_dp = fxsave->rdp;
8940         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8941
8942         vcpu_put(vcpu);
8943         return 0;
8944 }
8945
8946 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8947 {
8948         struct fxregs_state *fxsave;
8949
8950         vcpu_load(vcpu);
8951
8952         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8953
8954         memcpy(fxsave->st_space, fpu->fpr, 128);
8955         fxsave->cwd = fpu->fcw;
8956         fxsave->swd = fpu->fsw;
8957         fxsave->twd = fpu->ftwx;
8958         fxsave->fop = fpu->last_opcode;
8959         fxsave->rip = fpu->last_ip;
8960         fxsave->rdp = fpu->last_dp;
8961         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8962
8963         vcpu_put(vcpu);
8964         return 0;
8965 }
8966
8967 static void store_regs(struct kvm_vcpu *vcpu)
8968 {
8969         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8970
8971         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8972                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8973
8974         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8975                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8976
8977         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8978                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8979                                 vcpu, &vcpu->run->s.regs.events);
8980 }
8981
8982 static int sync_regs(struct kvm_vcpu *vcpu)
8983 {
8984         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8985                 return -EINVAL;
8986
8987         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8988                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8989                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8990         }
8991         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8992                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8993                         return -EINVAL;
8994                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8995         }
8996         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8997                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8998                                 vcpu, &vcpu->run->s.regs.events))
8999                         return -EINVAL;
9000                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9001         }
9002
9003         return 0;
9004 }
9005
9006 static void fx_init(struct kvm_vcpu *vcpu)
9007 {
9008         fpstate_init(&vcpu->arch.guest_fpu->state);
9009         if (boot_cpu_has(X86_FEATURE_XSAVES))
9010                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9011                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9012
9013         /*
9014          * Ensure guest xcr0 is valid for loading
9015          */
9016         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9017
9018         vcpu->arch.cr0 |= X86_CR0_ET;
9019 }
9020
9021 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
9022 {
9023         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
9024
9025         kvmclock_reset(vcpu);
9026
9027         kvm_x86_ops->vcpu_free(vcpu);
9028         free_cpumask_var(wbinvd_dirty_mask);
9029 }
9030
9031 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
9032                                                 unsigned int id)
9033 {
9034         struct kvm_vcpu *vcpu;
9035
9036         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9037                 printk_once(KERN_WARNING
9038                 "kvm: SMP vm created on host with unstable TSC; "
9039                 "guest TSC will not be reliable\n");
9040
9041         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
9042
9043         return vcpu;
9044 }
9045
9046 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
9047 {
9048         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9049         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9050         kvm_vcpu_mtrr_init(vcpu);
9051         vcpu_load(vcpu);
9052         kvm_vcpu_reset(vcpu, false);
9053         kvm_init_mmu(vcpu, false);
9054         vcpu_put(vcpu);
9055         return 0;
9056 }
9057
9058 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9059 {
9060         struct msr_data msr;
9061         struct kvm *kvm = vcpu->kvm;
9062
9063         kvm_hv_vcpu_postcreate(vcpu);
9064
9065         if (mutex_lock_killable(&vcpu->mutex))
9066                 return;
9067         vcpu_load(vcpu);
9068         msr.data = 0x0;
9069         msr.index = MSR_IA32_TSC;
9070         msr.host_initiated = true;
9071         kvm_write_tsc(vcpu, &msr);
9072         vcpu_put(vcpu);
9073
9074         /* poll control enabled by default */
9075         vcpu->arch.msr_kvm_poll_control = 1;
9076
9077         mutex_unlock(&vcpu->mutex);
9078
9079         if (!kvmclock_periodic_sync)
9080                 return;
9081
9082         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9083                                         KVMCLOCK_SYNC_PERIOD);
9084 }
9085
9086 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9087 {
9088         vcpu->arch.apf.msr_val = 0;
9089
9090         vcpu_load(vcpu);
9091         kvm_mmu_unload(vcpu);
9092         vcpu_put(vcpu);
9093
9094         kvm_x86_ops->vcpu_free(vcpu);
9095 }
9096
9097 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9098 {
9099         kvm_lapic_reset(vcpu, init_event);
9100
9101         vcpu->arch.hflags = 0;
9102
9103         vcpu->arch.smi_pending = 0;
9104         vcpu->arch.smi_count = 0;
9105         atomic_set(&vcpu->arch.nmi_queued, 0);
9106         vcpu->arch.nmi_pending = 0;
9107         vcpu->arch.nmi_injected = false;
9108         kvm_clear_interrupt_queue(vcpu);
9109         kvm_clear_exception_queue(vcpu);
9110         vcpu->arch.exception.pending = false;
9111
9112         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9113         kvm_update_dr0123(vcpu);
9114         vcpu->arch.dr6 = DR6_INIT;
9115         kvm_update_dr6(vcpu);
9116         vcpu->arch.dr7 = DR7_FIXED_1;
9117         kvm_update_dr7(vcpu);
9118
9119         vcpu->arch.cr2 = 0;
9120
9121         kvm_make_request(KVM_REQ_EVENT, vcpu);
9122         vcpu->arch.apf.msr_val = 0;
9123         vcpu->arch.st.msr_val = 0;
9124
9125         kvmclock_reset(vcpu);
9126
9127         kvm_clear_async_pf_completion_queue(vcpu);
9128         kvm_async_pf_hash_reset(vcpu);
9129         vcpu->arch.apf.halted = false;
9130
9131         if (kvm_mpx_supported()) {
9132                 void *mpx_state_buffer;
9133
9134                 /*
9135                  * To avoid have the INIT path from kvm_apic_has_events() that be
9136                  * called with loaded FPU and does not let userspace fix the state.
9137                  */
9138                 if (init_event)
9139                         kvm_put_guest_fpu(vcpu);
9140                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9141                                         XFEATURE_BNDREGS);
9142                 if (mpx_state_buffer)
9143                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9144                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9145                                         XFEATURE_BNDCSR);
9146                 if (mpx_state_buffer)
9147                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9148                 if (init_event)
9149                         kvm_load_guest_fpu(vcpu);
9150         }
9151
9152         if (!init_event) {
9153                 kvm_pmu_reset(vcpu);
9154                 vcpu->arch.smbase = 0x30000;
9155
9156                 vcpu->arch.msr_misc_features_enables = 0;
9157
9158                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9159         }
9160
9161         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9162         vcpu->arch.regs_avail = ~0;
9163         vcpu->arch.regs_dirty = ~0;
9164
9165         vcpu->arch.ia32_xss = 0;
9166
9167         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9168 }
9169
9170 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9171 {
9172         struct kvm_segment cs;
9173
9174         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9175         cs.selector = vector << 8;
9176         cs.base = vector << 12;
9177         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9178         kvm_rip_write(vcpu, 0);
9179 }
9180
9181 int kvm_arch_hardware_enable(void)
9182 {
9183         struct kvm *kvm;
9184         struct kvm_vcpu *vcpu;
9185         int i;
9186         int ret;
9187         u64 local_tsc;
9188         u64 max_tsc = 0;
9189         bool stable, backwards_tsc = false;
9190
9191         kvm_shared_msr_cpu_online();
9192         ret = kvm_x86_ops->hardware_enable();
9193         if (ret != 0)
9194                 return ret;
9195
9196         local_tsc = rdtsc();
9197         stable = !kvm_check_tsc_unstable();
9198         list_for_each_entry(kvm, &vm_list, vm_list) {
9199                 kvm_for_each_vcpu(i, vcpu, kvm) {
9200                         if (!stable && vcpu->cpu == smp_processor_id())
9201                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9202                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9203                                 backwards_tsc = true;
9204                                 if (vcpu->arch.last_host_tsc > max_tsc)
9205                                         max_tsc = vcpu->arch.last_host_tsc;
9206                         }
9207                 }
9208         }
9209
9210         /*
9211          * Sometimes, even reliable TSCs go backwards.  This happens on
9212          * platforms that reset TSC during suspend or hibernate actions, but
9213          * maintain synchronization.  We must compensate.  Fortunately, we can
9214          * detect that condition here, which happens early in CPU bringup,
9215          * before any KVM threads can be running.  Unfortunately, we can't
9216          * bring the TSCs fully up to date with real time, as we aren't yet far
9217          * enough into CPU bringup that we know how much real time has actually
9218          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9219          * variables that haven't been updated yet.
9220          *
9221          * So we simply find the maximum observed TSC above, then record the
9222          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9223          * the adjustment will be applied.  Note that we accumulate
9224          * adjustments, in case multiple suspend cycles happen before some VCPU
9225          * gets a chance to run again.  In the event that no KVM threads get a
9226          * chance to run, we will miss the entire elapsed period, as we'll have
9227          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9228          * loose cycle time.  This isn't too big a deal, since the loss will be
9229          * uniform across all VCPUs (not to mention the scenario is extremely
9230          * unlikely). It is possible that a second hibernate recovery happens
9231          * much faster than a first, causing the observed TSC here to be
9232          * smaller; this would require additional padding adjustment, which is
9233          * why we set last_host_tsc to the local tsc observed here.
9234          *
9235          * N.B. - this code below runs only on platforms with reliable TSC,
9236          * as that is the only way backwards_tsc is set above.  Also note
9237          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9238          * have the same delta_cyc adjustment applied if backwards_tsc
9239          * is detected.  Note further, this adjustment is only done once,
9240          * as we reset last_host_tsc on all VCPUs to stop this from being
9241          * called multiple times (one for each physical CPU bringup).
9242          *
9243          * Platforms with unreliable TSCs don't have to deal with this, they
9244          * will be compensated by the logic in vcpu_load, which sets the TSC to
9245          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9246          * guarantee that they stay in perfect synchronization.
9247          */
9248         if (backwards_tsc) {
9249                 u64 delta_cyc = max_tsc - local_tsc;
9250                 list_for_each_entry(kvm, &vm_list, vm_list) {
9251                         kvm->arch.backwards_tsc_observed = true;
9252                         kvm_for_each_vcpu(i, vcpu, kvm) {
9253                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9254                                 vcpu->arch.last_host_tsc = local_tsc;
9255                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9256                         }
9257
9258                         /*
9259                          * We have to disable TSC offset matching.. if you were
9260                          * booting a VM while issuing an S4 host suspend....
9261                          * you may have some problem.  Solving this issue is
9262                          * left as an exercise to the reader.
9263                          */
9264                         kvm->arch.last_tsc_nsec = 0;
9265                         kvm->arch.last_tsc_write = 0;
9266                 }
9267
9268         }
9269         return 0;
9270 }
9271
9272 void kvm_arch_hardware_disable(void)
9273 {
9274         kvm_x86_ops->hardware_disable();
9275         drop_user_return_notifiers();
9276 }
9277
9278 int kvm_arch_hardware_setup(void)
9279 {
9280         int r;
9281
9282         r = kvm_x86_ops->hardware_setup();
9283         if (r != 0)
9284                 return r;
9285
9286         if (kvm_has_tsc_control) {
9287                 /*
9288                  * Make sure the user can only configure tsc_khz values that
9289                  * fit into a signed integer.
9290                  * A min value is not calculated because it will always
9291                  * be 1 on all machines.
9292                  */
9293                 u64 max = min(0x7fffffffULL,
9294                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9295                 kvm_max_guest_tsc_khz = max;
9296
9297                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9298         }
9299
9300         kvm_init_msr_list();
9301         return 0;
9302 }
9303
9304 void kvm_arch_hardware_unsetup(void)
9305 {
9306         kvm_x86_ops->hardware_unsetup();
9307 }
9308
9309 int kvm_arch_check_processor_compat(void)
9310 {
9311         return kvm_x86_ops->check_processor_compatibility();
9312 }
9313
9314 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9315 {
9316         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9317 }
9318 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9319
9320 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9321 {
9322         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9323 }
9324
9325 struct static_key kvm_no_apic_vcpu __read_mostly;
9326 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9327
9328 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9329 {
9330         struct page *page;
9331         int r;
9332
9333         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9334         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9335                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9336         else
9337                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9338
9339         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9340         if (!page) {
9341                 r = -ENOMEM;
9342                 goto fail;
9343         }
9344         vcpu->arch.pio_data = page_address(page);
9345
9346         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9347
9348         r = kvm_mmu_create(vcpu);
9349         if (r < 0)
9350                 goto fail_free_pio_data;
9351
9352         if (irqchip_in_kernel(vcpu->kvm)) {
9353                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9354                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9355                 if (r < 0)
9356                         goto fail_mmu_destroy;
9357         } else
9358                 static_key_slow_inc(&kvm_no_apic_vcpu);
9359
9360         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9361                                        GFP_KERNEL_ACCOUNT);
9362         if (!vcpu->arch.mce_banks) {
9363                 r = -ENOMEM;
9364                 goto fail_free_lapic;
9365         }
9366         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9367
9368         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9369                                 GFP_KERNEL_ACCOUNT)) {
9370                 r = -ENOMEM;
9371                 goto fail_free_mce_banks;
9372         }
9373
9374         fx_init(vcpu);
9375
9376         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9377
9378         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9379
9380         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9381
9382         kvm_async_pf_hash_reset(vcpu);
9383         kvm_pmu_init(vcpu);
9384
9385         vcpu->arch.pending_external_vector = -1;
9386         vcpu->arch.preempted_in_kernel = false;
9387
9388         kvm_hv_vcpu_init(vcpu);
9389
9390         return 0;
9391
9392 fail_free_mce_banks:
9393         kfree(vcpu->arch.mce_banks);
9394 fail_free_lapic:
9395         kvm_free_lapic(vcpu);
9396 fail_mmu_destroy:
9397         kvm_mmu_destroy(vcpu);
9398 fail_free_pio_data:
9399         free_page((unsigned long)vcpu->arch.pio_data);
9400 fail:
9401         return r;
9402 }
9403
9404 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9405 {
9406         int idx;
9407
9408         kvm_hv_vcpu_uninit(vcpu);
9409         kvm_pmu_destroy(vcpu);
9410         kfree(vcpu->arch.mce_banks);
9411         kvm_free_lapic(vcpu);
9412         idx = srcu_read_lock(&vcpu->kvm->srcu);
9413         kvm_mmu_destroy(vcpu);
9414         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9415         free_page((unsigned long)vcpu->arch.pio_data);
9416         if (!lapic_in_kernel(vcpu))
9417                 static_key_slow_dec(&kvm_no_apic_vcpu);
9418 }
9419
9420 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9421 {
9422         vcpu->arch.l1tf_flush_l1d = true;
9423         kvm_x86_ops->sched_in(vcpu, cpu);
9424 }
9425
9426 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9427 {
9428         if (type)
9429                 return -EINVAL;
9430
9431         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9432         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9433         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9434         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9435         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9436
9437         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9438         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9439         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9440         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9441                 &kvm->arch.irq_sources_bitmap);
9442
9443         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9444         mutex_init(&kvm->arch.apic_map_lock);
9445         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9446
9447         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9448         pvclock_update_vm_gtod_copy(kvm);
9449
9450         kvm->arch.guest_can_read_msr_platform_info = true;
9451
9452         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9453         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9454
9455         kvm_hv_init_vm(kvm);
9456         kvm_page_track_init(kvm);
9457         kvm_mmu_init_vm(kvm);
9458
9459         return kvm_x86_ops->vm_init(kvm);
9460 }
9461
9462 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9463 {
9464         vcpu_load(vcpu);
9465         kvm_mmu_unload(vcpu);
9466         vcpu_put(vcpu);
9467 }
9468
9469 static void kvm_free_vcpus(struct kvm *kvm)
9470 {
9471         unsigned int i;
9472         struct kvm_vcpu *vcpu;
9473
9474         /*
9475          * Unpin any mmu pages first.
9476          */
9477         kvm_for_each_vcpu(i, vcpu, kvm) {
9478                 kvm_clear_async_pf_completion_queue(vcpu);
9479                 kvm_unload_vcpu_mmu(vcpu);
9480         }
9481         kvm_for_each_vcpu(i, vcpu, kvm)
9482                 kvm_arch_vcpu_free(vcpu);
9483
9484         mutex_lock(&kvm->lock);
9485         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9486                 kvm->vcpus[i] = NULL;
9487
9488         atomic_set(&kvm->online_vcpus, 0);
9489         mutex_unlock(&kvm->lock);
9490 }
9491
9492 void kvm_arch_sync_events(struct kvm *kvm)
9493 {
9494         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9495         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9496         kvm_free_pit(kvm);
9497 }
9498
9499 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9500 {
9501         int i, r;
9502         unsigned long hva;
9503         struct kvm_memslots *slots = kvm_memslots(kvm);
9504         struct kvm_memory_slot *slot, old;
9505
9506         /* Called with kvm->slots_lock held.  */
9507         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9508                 return -EINVAL;
9509
9510         slot = id_to_memslot(slots, id);
9511         if (size) {
9512                 if (slot->npages)
9513                         return -EEXIST;
9514
9515                 /*
9516                  * MAP_SHARED to prevent internal slot pages from being moved
9517                  * by fork()/COW.
9518                  */
9519                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9520                               MAP_SHARED | MAP_ANONYMOUS, 0);
9521                 if (IS_ERR((void *)hva))
9522                         return PTR_ERR((void *)hva);
9523         } else {
9524                 if (!slot->npages)
9525                         return 0;
9526
9527                 hva = 0;
9528         }
9529
9530         old = *slot;
9531         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9532                 struct kvm_userspace_memory_region m;
9533
9534                 m.slot = id | (i << 16);
9535                 m.flags = 0;
9536                 m.guest_phys_addr = gpa;
9537                 m.userspace_addr = hva;
9538                 m.memory_size = size;
9539                 r = __kvm_set_memory_region(kvm, &m);
9540                 if (r < 0)
9541                         return r;
9542         }
9543
9544         if (!size)
9545                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9546
9547         return 0;
9548 }
9549 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9550
9551 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9552 {
9553         int r;
9554
9555         mutex_lock(&kvm->slots_lock);
9556         r = __x86_set_memory_region(kvm, id, gpa, size);
9557         mutex_unlock(&kvm->slots_lock);
9558
9559         return r;
9560 }
9561 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9562
9563 void kvm_arch_destroy_vm(struct kvm *kvm)
9564 {
9565         if (current->mm == kvm->mm) {
9566                 /*
9567                  * Free memory regions allocated on behalf of userspace,
9568                  * unless the the memory map has changed due to process exit
9569                  * or fd copying.
9570                  */
9571                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9572                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9573                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9574         }
9575         if (kvm_x86_ops->vm_destroy)
9576                 kvm_x86_ops->vm_destroy(kvm);
9577         kvm_pic_destroy(kvm);
9578         kvm_ioapic_destroy(kvm);
9579         kvm_free_vcpus(kvm);
9580         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9581         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9582         kvm_mmu_uninit_vm(kvm);
9583         kvm_page_track_cleanup(kvm);
9584         kvm_hv_destroy_vm(kvm);
9585 }
9586
9587 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9588                            struct kvm_memory_slot *dont)
9589 {
9590         int i;
9591
9592         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9593                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9594                         kvfree(free->arch.rmap[i]);
9595                         free->arch.rmap[i] = NULL;
9596                 }
9597                 if (i == 0)
9598                         continue;
9599
9600                 if (!dont || free->arch.lpage_info[i - 1] !=
9601                              dont->arch.lpage_info[i - 1]) {
9602                         kvfree(free->arch.lpage_info[i - 1]);
9603                         free->arch.lpage_info[i - 1] = NULL;
9604                 }
9605         }
9606
9607         kvm_page_track_free_memslot(free, dont);
9608 }
9609
9610 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9611                             unsigned long npages)
9612 {
9613         int i;
9614
9615         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9616                 struct kvm_lpage_info *linfo;
9617                 unsigned long ugfn;
9618                 int lpages;
9619                 int level = i + 1;
9620
9621                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9622                                       slot->base_gfn, level) + 1;
9623
9624                 slot->arch.rmap[i] =
9625                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9626                                  GFP_KERNEL_ACCOUNT);
9627                 if (!slot->arch.rmap[i])
9628                         goto out_free;
9629                 if (i == 0)
9630                         continue;
9631
9632                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9633                 if (!linfo)
9634                         goto out_free;
9635
9636                 slot->arch.lpage_info[i - 1] = linfo;
9637
9638                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9639                         linfo[0].disallow_lpage = 1;
9640                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9641                         linfo[lpages - 1].disallow_lpage = 1;
9642                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9643                 /*
9644                  * If the gfn and userspace address are not aligned wrt each
9645                  * other, or if explicitly asked to, disable large page
9646                  * support for this slot
9647                  */
9648                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9649                     !kvm_largepages_enabled()) {
9650                         unsigned long j;
9651
9652                         for (j = 0; j < lpages; ++j)
9653                                 linfo[j].disallow_lpage = 1;
9654                 }
9655         }
9656
9657         if (kvm_page_track_create_memslot(slot, npages))
9658                 goto out_free;
9659
9660         return 0;
9661
9662 out_free:
9663         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9664                 kvfree(slot->arch.rmap[i]);
9665                 slot->arch.rmap[i] = NULL;
9666                 if (i == 0)
9667                         continue;
9668
9669                 kvfree(slot->arch.lpage_info[i - 1]);
9670                 slot->arch.lpage_info[i - 1] = NULL;
9671         }
9672         return -ENOMEM;
9673 }
9674
9675 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9676 {
9677         /*
9678          * memslots->generation has been incremented.
9679          * mmio generation may have reached its maximum value.
9680          */
9681         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9682 }
9683
9684 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9685                                 struct kvm_memory_slot *memslot,
9686                                 const struct kvm_userspace_memory_region *mem,
9687                                 enum kvm_mr_change change)
9688 {
9689         return 0;
9690 }
9691
9692 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9693                                      struct kvm_memory_slot *new)
9694 {
9695         /* Still write protect RO slot */
9696         if (new->flags & KVM_MEM_READONLY) {
9697                 kvm_mmu_slot_remove_write_access(kvm, new);
9698                 return;
9699         }
9700
9701         /*
9702          * Call kvm_x86_ops dirty logging hooks when they are valid.
9703          *
9704          * kvm_x86_ops->slot_disable_log_dirty is called when:
9705          *
9706          *  - KVM_MR_CREATE with dirty logging is disabled
9707          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9708          *
9709          * The reason is, in case of PML, we need to set D-bit for any slots
9710          * with dirty logging disabled in order to eliminate unnecessary GPA
9711          * logging in PML buffer (and potential PML buffer full VMEXT). This
9712          * guarantees leaving PML enabled during guest's lifetime won't have
9713          * any additional overhead from PML when guest is running with dirty
9714          * logging disabled for memory slots.
9715          *
9716          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9717          * to dirty logging mode.
9718          *
9719          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9720          *
9721          * In case of write protect:
9722          *
9723          * Write protect all pages for dirty logging.
9724          *
9725          * All the sptes including the large sptes which point to this
9726          * slot are set to readonly. We can not create any new large
9727          * spte on this slot until the end of the logging.
9728          *
9729          * See the comments in fast_page_fault().
9730          */
9731         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9732                 if (kvm_x86_ops->slot_enable_log_dirty)
9733                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9734                 else
9735                         kvm_mmu_slot_remove_write_access(kvm, new);
9736         } else {
9737                 if (kvm_x86_ops->slot_disable_log_dirty)
9738                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9739         }
9740 }
9741
9742 void kvm_arch_commit_memory_region(struct kvm *kvm,
9743                                 const struct kvm_userspace_memory_region *mem,
9744                                 const struct kvm_memory_slot *old,
9745                                 const struct kvm_memory_slot *new,
9746                                 enum kvm_mr_change change)
9747 {
9748         if (!kvm->arch.n_requested_mmu_pages)
9749                 kvm_mmu_change_mmu_pages(kvm,
9750                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9751
9752         /*
9753          * Dirty logging tracks sptes in 4k granularity, meaning that large
9754          * sptes have to be split.  If live migration is successful, the guest
9755          * in the source machine will be destroyed and large sptes will be
9756          * created in the destination. However, if the guest continues to run
9757          * in the source machine (for example if live migration fails), small
9758          * sptes will remain around and cause bad performance.
9759          *
9760          * Scan sptes if dirty logging has been stopped, dropping those
9761          * which can be collapsed into a single large-page spte.  Later
9762          * page faults will create the large-page sptes.
9763          *
9764          * There is no need to do this in any of the following cases:
9765          * CREATE:      No dirty mappings will already exist.
9766          * MOVE/DELETE: The old mappings will already have been cleaned up by
9767          *              kvm_arch_flush_shadow_memslot()
9768          */
9769         if (change == KVM_MR_FLAGS_ONLY &&
9770                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9771                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9772                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9773
9774         /*
9775          * Set up write protection and/or dirty logging for the new slot.
9776          *
9777          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9778          * been zapped so no dirty logging staff is needed for old slot. For
9779          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9780          * new and it's also covered when dealing with the new slot.
9781          *
9782          * FIXME: const-ify all uses of struct kvm_memory_slot.
9783          */
9784         if (change != KVM_MR_DELETE)
9785                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9786 }
9787
9788 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9789 {
9790         kvm_mmu_zap_all(kvm);
9791 }
9792
9793 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9794                                    struct kvm_memory_slot *slot)
9795 {
9796         kvm_page_track_flush_slot(kvm, slot);
9797 }
9798
9799 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9800 {
9801         return (is_guest_mode(vcpu) &&
9802                         kvm_x86_ops->guest_apic_has_interrupt &&
9803                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9804 }
9805
9806 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9807 {
9808         if (!list_empty_careful(&vcpu->async_pf.done))
9809                 return true;
9810
9811         if (kvm_apic_has_events(vcpu))
9812                 return true;
9813
9814         if (vcpu->arch.pv.pv_unhalted)
9815                 return true;
9816
9817         if (vcpu->arch.exception.pending)
9818                 return true;
9819
9820         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9821             (vcpu->arch.nmi_pending &&
9822              kvm_x86_ops->nmi_allowed(vcpu)))
9823                 return true;
9824
9825         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9826             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9827                 return true;
9828
9829         if (kvm_arch_interrupt_allowed(vcpu) &&
9830             (kvm_cpu_has_interrupt(vcpu) ||
9831             kvm_guest_apic_has_interrupt(vcpu)))
9832                 return true;
9833
9834         if (kvm_hv_has_stimer_pending(vcpu))
9835                 return true;
9836
9837         return false;
9838 }
9839
9840 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9841 {
9842         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9843 }
9844
9845 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
9846 {
9847         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
9848                 return true;
9849
9850         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9851                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
9852                  kvm_test_request(KVM_REQ_EVENT, vcpu))
9853                 return true;
9854
9855         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
9856                 return true;
9857
9858         return false;
9859 }
9860
9861 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9862 {
9863         return vcpu->arch.preempted_in_kernel;
9864 }
9865
9866 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9867 {
9868         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9869 }
9870
9871 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9872 {
9873         return kvm_x86_ops->interrupt_allowed(vcpu);
9874 }
9875
9876 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9877 {
9878         if (is_64_bit_mode(vcpu))
9879                 return kvm_rip_read(vcpu);
9880         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9881                      kvm_rip_read(vcpu));
9882 }
9883 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9884
9885 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9886 {
9887         return kvm_get_linear_rip(vcpu) == linear_rip;
9888 }
9889 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9890
9891 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9892 {
9893         unsigned long rflags;
9894
9895         rflags = kvm_x86_ops->get_rflags(vcpu);
9896         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9897                 rflags &= ~X86_EFLAGS_TF;
9898         return rflags;
9899 }
9900 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9901
9902 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9903 {
9904         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9905             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9906                 rflags |= X86_EFLAGS_TF;
9907         kvm_x86_ops->set_rflags(vcpu, rflags);
9908 }
9909
9910 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9911 {
9912         __kvm_set_rflags(vcpu, rflags);
9913         kvm_make_request(KVM_REQ_EVENT, vcpu);
9914 }
9915 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9916
9917 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9918 {
9919         int r;
9920
9921         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9922               work->wakeup_all)
9923                 return;
9924
9925         r = kvm_mmu_reload(vcpu);
9926         if (unlikely(r))
9927                 return;
9928
9929         if (!vcpu->arch.mmu->direct_map &&
9930               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9931                 return;
9932
9933         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9934 }
9935
9936 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9937 {
9938         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9939 }
9940
9941 static inline u32 kvm_async_pf_next_probe(u32 key)
9942 {
9943         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9944 }
9945
9946 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9947 {
9948         u32 key = kvm_async_pf_hash_fn(gfn);
9949
9950         while (vcpu->arch.apf.gfns[key] != ~0)
9951                 key = kvm_async_pf_next_probe(key);
9952
9953         vcpu->arch.apf.gfns[key] = gfn;
9954 }
9955
9956 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9957 {
9958         int i;
9959         u32 key = kvm_async_pf_hash_fn(gfn);
9960
9961         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9962                      (vcpu->arch.apf.gfns[key] != gfn &&
9963                       vcpu->arch.apf.gfns[key] != ~0); i++)
9964                 key = kvm_async_pf_next_probe(key);
9965
9966         return key;
9967 }
9968
9969 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9970 {
9971         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9972 }
9973
9974 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9975 {
9976         u32 i, j, k;
9977
9978         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9979         while (true) {
9980                 vcpu->arch.apf.gfns[i] = ~0;
9981                 do {
9982                         j = kvm_async_pf_next_probe(j);
9983                         if (vcpu->arch.apf.gfns[j] == ~0)
9984                                 return;
9985                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9986                         /*
9987                          * k lies cyclically in ]i,j]
9988                          * |    i.k.j |
9989                          * |....j i.k.| or  |.k..j i...|
9990                          */
9991                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9992                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9993                 i = j;
9994         }
9995 }
9996
9997 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9998 {
9999
10000         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
10001                                       sizeof(val));
10002 }
10003
10004 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
10005 {
10006
10007         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
10008                                       sizeof(u32));
10009 }
10010
10011 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10012 {
10013         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10014                 return false;
10015
10016         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
10017             (vcpu->arch.apf.send_user_only &&
10018              kvm_x86_ops->get_cpl(vcpu) == 0))
10019                 return false;
10020
10021         return true;
10022 }
10023
10024 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10025 {
10026         if (unlikely(!lapic_in_kernel(vcpu) ||
10027                      kvm_event_needs_reinjection(vcpu) ||
10028                      vcpu->arch.exception.pending))
10029                 return false;
10030
10031         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10032                 return false;
10033
10034         /*
10035          * If interrupts are off we cannot even use an artificial
10036          * halt state.
10037          */
10038         return kvm_x86_ops->interrupt_allowed(vcpu);
10039 }
10040
10041 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10042                                      struct kvm_async_pf *work)
10043 {
10044         struct x86_exception fault;
10045
10046         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
10047         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10048
10049         if (kvm_can_deliver_async_pf(vcpu) &&
10050             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10051                 fault.vector = PF_VECTOR;
10052                 fault.error_code_valid = true;
10053                 fault.error_code = 0;
10054                 fault.nested_page_fault = false;
10055                 fault.address = work->arch.token;
10056                 fault.async_page_fault = true;
10057                 kvm_inject_page_fault(vcpu, &fault);
10058         } else {
10059                 /*
10060                  * It is not possible to deliver a paravirtualized asynchronous
10061                  * page fault, but putting the guest in an artificial halt state
10062                  * can be beneficial nevertheless: if an interrupt arrives, we
10063                  * can deliver it timely and perhaps the guest will schedule
10064                  * another process.  When the instruction that triggered a page
10065                  * fault is retried, hopefully the page will be ready in the host.
10066                  */
10067                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10068         }
10069 }
10070
10071 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10072                                  struct kvm_async_pf *work)
10073 {
10074         struct x86_exception fault;
10075         u32 val;
10076
10077         if (work->wakeup_all)
10078                 work->arch.token = ~0; /* broadcast wakeup */
10079         else
10080                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10081         trace_kvm_async_pf_ready(work->arch.token, work->gva);
10082
10083         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10084             !apf_get_user(vcpu, &val)) {
10085                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10086                     vcpu->arch.exception.pending &&
10087                     vcpu->arch.exception.nr == PF_VECTOR &&
10088                     !apf_put_user(vcpu, 0)) {
10089                         vcpu->arch.exception.injected = false;
10090                         vcpu->arch.exception.pending = false;
10091                         vcpu->arch.exception.nr = 0;
10092                         vcpu->arch.exception.has_error_code = false;
10093                         vcpu->arch.exception.error_code = 0;
10094                         vcpu->arch.exception.has_payload = false;
10095                         vcpu->arch.exception.payload = 0;
10096                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10097                         fault.vector = PF_VECTOR;
10098                         fault.error_code_valid = true;
10099                         fault.error_code = 0;
10100                         fault.nested_page_fault = false;
10101                         fault.address = work->arch.token;
10102                         fault.async_page_fault = true;
10103                         kvm_inject_page_fault(vcpu, &fault);
10104                 }
10105         }
10106         vcpu->arch.apf.halted = false;
10107         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10108 }
10109
10110 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10111 {
10112         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10113                 return true;
10114         else
10115                 return kvm_can_do_async_pf(vcpu);
10116 }
10117
10118 void kvm_arch_start_assignment(struct kvm *kvm)
10119 {
10120         atomic_inc(&kvm->arch.assigned_device_count);
10121 }
10122 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10123
10124 void kvm_arch_end_assignment(struct kvm *kvm)
10125 {
10126         atomic_dec(&kvm->arch.assigned_device_count);
10127 }
10128 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10129
10130 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10131 {
10132         return atomic_read(&kvm->arch.assigned_device_count);
10133 }
10134 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10135
10136 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10137 {
10138         atomic_inc(&kvm->arch.noncoherent_dma_count);
10139 }
10140 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10141
10142 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10143 {
10144         atomic_dec(&kvm->arch.noncoherent_dma_count);
10145 }
10146 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10147
10148 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10149 {
10150         return atomic_read(&kvm->arch.noncoherent_dma_count);
10151 }
10152 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10153
10154 bool kvm_arch_has_irq_bypass(void)
10155 {
10156         return true;
10157 }
10158
10159 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10160                                       struct irq_bypass_producer *prod)
10161 {
10162         struct kvm_kernel_irqfd *irqfd =
10163                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10164
10165         irqfd->producer = prod;
10166
10167         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10168                                            prod->irq, irqfd->gsi, 1);
10169 }
10170
10171 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10172                                       struct irq_bypass_producer *prod)
10173 {
10174         int ret;
10175         struct kvm_kernel_irqfd *irqfd =
10176                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10177
10178         WARN_ON(irqfd->producer != prod);
10179         irqfd->producer = NULL;
10180
10181         /*
10182          * When producer of consumer is unregistered, we change back to
10183          * remapped mode, so we can re-use the current implementation
10184          * when the irq is masked/disabled or the consumer side (KVM
10185          * int this case doesn't want to receive the interrupts.
10186         */
10187         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10188         if (ret)
10189                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10190                        " fails: %d\n", irqfd->consumer.token, ret);
10191 }
10192
10193 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10194                                    uint32_t guest_irq, bool set)
10195 {
10196         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10197 }
10198
10199 bool kvm_vector_hashing_enabled(void)
10200 {
10201         return vector_hashing;
10202 }
10203 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10204
10205 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10206 {
10207         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10208 }
10209 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10210
10211
10212 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10213 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10214 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10215 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10216 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10217 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10218 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10219 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10220 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10221 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10222 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10223 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10224 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10225 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10226 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10227 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10228 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10229 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10230 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10231 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);