88a1920669d55158b3f5c4550693ffbfeeeb7531
[linux-2.6-block.git] / arch / mips / kernel / ptrace.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 Ross Biro
7  * Copyright (C) Linus Torvalds
8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9  * Copyright (C) 1996 David S. Miller
10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11  * Copyright (C) 1999 MIPS Technologies, Inc.
12  * Copyright (C) 2000 Ulf Carlsson
13  *
14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15  * binaries.
16  */
17 #include <linux/compiler.h>
18 #include <linux/context_tracking.h>
19 #include <linux/elf.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/mm.h>
23 #include <linux/errno.h>
24 #include <linux/ptrace.h>
25 #include <linux/regset.h>
26 #include <linux/smp.h>
27 #include <linux/security.h>
28 #include <linux/stddef.h>
29 #include <linux/tracehook.h>
30 #include <linux/audit.h>
31 #include <linux/seccomp.h>
32 #include <linux/ftrace.h>
33
34 #include <asm/byteorder.h>
35 #include <asm/cpu.h>
36 #include <asm/cpu-info.h>
37 #include <asm/dsp.h>
38 #include <asm/fpu.h>
39 #include <asm/mipsregs.h>
40 #include <asm/mipsmtregs.h>
41 #include <asm/pgtable.h>
42 #include <asm/page.h>
43 #include <asm/syscall.h>
44 #include <asm/uaccess.h>
45 #include <asm/bootinfo.h>
46 #include <asm/reg.h>
47
48 #define CREATE_TRACE_POINTS
49 #include <trace/events/syscalls.h>
50
51 static void init_fp_ctx(struct task_struct *target)
52 {
53         /* If FP has been used then the target already has context */
54         if (tsk_used_math(target))
55                 return;
56
57         /* Begin with data registers set to all 1s... */
58         memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
59
60         /* ...and FCSR zeroed */
61         target->thread.fpu.fcr31 = 0;
62
63         /*
64          * Record that the target has "used" math, such that the context
65          * just initialised, and any modifications made by the caller,
66          * aren't discarded.
67          */
68         set_stopped_child_used_math(target);
69 }
70
71 /*
72  * Called by kernel/ptrace.c when detaching..
73  *
74  * Make sure single step bits etc are not set.
75  */
76 void ptrace_disable(struct task_struct *child)
77 {
78         /* Don't load the watchpoint registers for the ex-child. */
79         clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
80 }
81
82 /*
83  * Read a general register set.  We always use the 64-bit format, even
84  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
85  * Registers are sign extended to fill the available space.
86  */
87 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
88 {
89         struct pt_regs *regs;
90         int i;
91
92         if (!access_ok(VERIFY_WRITE, data, 38 * 8))
93                 return -EIO;
94
95         regs = task_pt_regs(child);
96
97         for (i = 0; i < 32; i++)
98                 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
99         __put_user((long)regs->lo, (__s64 __user *)&data->lo);
100         __put_user((long)regs->hi, (__s64 __user *)&data->hi);
101         __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
102         __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
103         __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
104         __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
105
106         return 0;
107 }
108
109 /*
110  * Write a general register set.  As for PTRACE_GETREGS, we always use
111  * the 64-bit format.  On a 32-bit kernel only the lower order half
112  * (according to endianness) will be used.
113  */
114 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
115 {
116         struct pt_regs *regs;
117         int i;
118
119         if (!access_ok(VERIFY_READ, data, 38 * 8))
120                 return -EIO;
121
122         regs = task_pt_regs(child);
123
124         for (i = 0; i < 32; i++)
125                 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
126         __get_user(regs->lo, (__s64 __user *)&data->lo);
127         __get_user(regs->hi, (__s64 __user *)&data->hi);
128         __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
129
130         /* badvaddr, status, and cause may not be written.  */
131
132         return 0;
133 }
134
135 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
136 {
137         int i;
138
139         if (!access_ok(VERIFY_WRITE, data, 33 * 8))
140                 return -EIO;
141
142         if (tsk_used_math(child)) {
143                 union fpureg *fregs = get_fpu_regs(child);
144                 for (i = 0; i < 32; i++)
145                         __put_user(get_fpr64(&fregs[i], 0),
146                                    i + (__u64 __user *)data);
147         } else {
148                 for (i = 0; i < 32; i++)
149                         __put_user((__u64) -1, i + (__u64 __user *) data);
150         }
151
152         __put_user(child->thread.fpu.fcr31, data + 64);
153         __put_user(boot_cpu_data.fpu_id, data + 65);
154
155         return 0;
156 }
157
158 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
159 {
160         union fpureg *fregs;
161         u64 fpr_val;
162         u32 fcr31;
163         u32 value;
164         u32 mask;
165         int i;
166
167         if (!access_ok(VERIFY_READ, data, 33 * 8))
168                 return -EIO;
169
170         init_fp_ctx(child);
171         fregs = get_fpu_regs(child);
172
173         for (i = 0; i < 32; i++) {
174                 __get_user(fpr_val, i + (__u64 __user *)data);
175                 set_fpr64(&fregs[i], 0, fpr_val);
176         }
177
178         __get_user(value, data + 64);
179         value &= ~FPU_CSR_ALL_X;
180         fcr31 = child->thread.fpu.fcr31;
181         mask = boot_cpu_data.fpu_msk31;
182         child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
183
184         /* FIR may not be written.  */
185
186         return 0;
187 }
188
189 int ptrace_get_watch_regs(struct task_struct *child,
190                           struct pt_watch_regs __user *addr)
191 {
192         enum pt_watch_style style;
193         int i;
194
195         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
196                 return -EIO;
197         if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
198                 return -EIO;
199
200 #ifdef CONFIG_32BIT
201         style = pt_watch_style_mips32;
202 #define WATCH_STYLE mips32
203 #else
204         style = pt_watch_style_mips64;
205 #define WATCH_STYLE mips64
206 #endif
207
208         __put_user(style, &addr->style);
209         __put_user(boot_cpu_data.watch_reg_use_cnt,
210                    &addr->WATCH_STYLE.num_valid);
211         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
212                 __put_user(child->thread.watch.mips3264.watchlo[i],
213                            &addr->WATCH_STYLE.watchlo[i]);
214                 __put_user(child->thread.watch.mips3264.watchhi[i] &
215                                 (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW),
216                            &addr->WATCH_STYLE.watchhi[i]);
217                 __put_user(boot_cpu_data.watch_reg_masks[i],
218                            &addr->WATCH_STYLE.watch_masks[i]);
219         }
220         for (; i < 8; i++) {
221                 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
222                 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
223                 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
224         }
225
226         return 0;
227 }
228
229 int ptrace_set_watch_regs(struct task_struct *child,
230                           struct pt_watch_regs __user *addr)
231 {
232         int i;
233         int watch_active = 0;
234         unsigned long lt[NUM_WATCH_REGS];
235         u16 ht[NUM_WATCH_REGS];
236
237         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
238                 return -EIO;
239         if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
240                 return -EIO;
241         /* Check the values. */
242         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
243                 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
244 #ifdef CONFIG_32BIT
245                 if (lt[i] & __UA_LIMIT)
246                         return -EINVAL;
247 #else
248                 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
249                         if (lt[i] & 0xffffffff80000000UL)
250                                 return -EINVAL;
251                 } else {
252                         if (lt[i] & __UA_LIMIT)
253                                 return -EINVAL;
254                 }
255 #endif
256                 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
257                 if (ht[i] & ~MIPS_WATCHHI_MASK)
258                         return -EINVAL;
259         }
260         /* Install them. */
261         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
262                 if (lt[i] & MIPS_WATCHLO_IRW)
263                         watch_active = 1;
264                 child->thread.watch.mips3264.watchlo[i] = lt[i];
265                 /* Set the G bit. */
266                 child->thread.watch.mips3264.watchhi[i] = ht[i];
267         }
268
269         if (watch_active)
270                 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
271         else
272                 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
273
274         return 0;
275 }
276
277 /* regset get/set implementations */
278
279 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
280
281 static int gpr32_get(struct task_struct *target,
282                      const struct user_regset *regset,
283                      unsigned int pos, unsigned int count,
284                      void *kbuf, void __user *ubuf)
285 {
286         struct pt_regs *regs = task_pt_regs(target);
287         u32 uregs[ELF_NGREG] = {};
288         unsigned i;
289
290         for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
291                 /* k0/k1 are copied as zero. */
292                 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
293                         continue;
294
295                 uregs[i] = regs->regs[i - MIPS32_EF_R0];
296         }
297
298         uregs[MIPS32_EF_LO] = regs->lo;
299         uregs[MIPS32_EF_HI] = regs->hi;
300         uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
301         uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
302         uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
303         uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
304
305         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
306                                    sizeof(uregs));
307 }
308
309 static int gpr32_set(struct task_struct *target,
310                      const struct user_regset *regset,
311                      unsigned int pos, unsigned int count,
312                      const void *kbuf, const void __user *ubuf)
313 {
314         struct pt_regs *regs = task_pt_regs(target);
315         u32 uregs[ELF_NGREG];
316         unsigned start, num_regs, i;
317         int err;
318
319         start = pos / sizeof(u32);
320         num_regs = count / sizeof(u32);
321
322         if (start + num_regs > ELF_NGREG)
323                 return -EIO;
324
325         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
326                                  sizeof(uregs));
327         if (err)
328                 return err;
329
330         for (i = start; i < num_regs; i++) {
331                 /*
332                  * Cast all values to signed here so that if this is a 64-bit
333                  * kernel, the supplied 32-bit values will be sign extended.
334                  */
335                 switch (i) {
336                 case MIPS32_EF_R1 ... MIPS32_EF_R25:
337                         /* k0/k1 are ignored. */
338                 case MIPS32_EF_R28 ... MIPS32_EF_R31:
339                         regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
340                         break;
341                 case MIPS32_EF_LO:
342                         regs->lo = (s32)uregs[i];
343                         break;
344                 case MIPS32_EF_HI:
345                         regs->hi = (s32)uregs[i];
346                         break;
347                 case MIPS32_EF_CP0_EPC:
348                         regs->cp0_epc = (s32)uregs[i];
349                         break;
350                 }
351         }
352
353         return 0;
354 }
355
356 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
357
358 #ifdef CONFIG_64BIT
359
360 static int gpr64_get(struct task_struct *target,
361                      const struct user_regset *regset,
362                      unsigned int pos, unsigned int count,
363                      void *kbuf, void __user *ubuf)
364 {
365         struct pt_regs *regs = task_pt_regs(target);
366         u64 uregs[ELF_NGREG] = {};
367         unsigned i;
368
369         for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
370                 /* k0/k1 are copied as zero. */
371                 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
372                         continue;
373
374                 uregs[i] = regs->regs[i - MIPS64_EF_R0];
375         }
376
377         uregs[MIPS64_EF_LO] = regs->lo;
378         uregs[MIPS64_EF_HI] = regs->hi;
379         uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
380         uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
381         uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
382         uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
383
384         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
385                                    sizeof(uregs));
386 }
387
388 static int gpr64_set(struct task_struct *target,
389                      const struct user_regset *regset,
390                      unsigned int pos, unsigned int count,
391                      const void *kbuf, const void __user *ubuf)
392 {
393         struct pt_regs *regs = task_pt_regs(target);
394         u64 uregs[ELF_NGREG];
395         unsigned start, num_regs, i;
396         int err;
397
398         start = pos / sizeof(u64);
399         num_regs = count / sizeof(u64);
400
401         if (start + num_regs > ELF_NGREG)
402                 return -EIO;
403
404         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
405                                  sizeof(uregs));
406         if (err)
407                 return err;
408
409         for (i = start; i < num_regs; i++) {
410                 switch (i) {
411                 case MIPS64_EF_R1 ... MIPS64_EF_R25:
412                         /* k0/k1 are ignored. */
413                 case MIPS64_EF_R28 ... MIPS64_EF_R31:
414                         regs->regs[i - MIPS64_EF_R0] = uregs[i];
415                         break;
416                 case MIPS64_EF_LO:
417                         regs->lo = uregs[i];
418                         break;
419                 case MIPS64_EF_HI:
420                         regs->hi = uregs[i];
421                         break;
422                 case MIPS64_EF_CP0_EPC:
423                         regs->cp0_epc = uregs[i];
424                         break;
425                 }
426         }
427
428         return 0;
429 }
430
431 #endif /* CONFIG_64BIT */
432
433 static int fpr_get(struct task_struct *target,
434                    const struct user_regset *regset,
435                    unsigned int pos, unsigned int count,
436                    void *kbuf, void __user *ubuf)
437 {
438         unsigned i;
439         int err;
440         u64 fpr_val;
441
442         /* XXX fcr31  */
443
444         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
445                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
446                                            &target->thread.fpu,
447                                            0, sizeof(elf_fpregset_t));
448
449         for (i = 0; i < NUM_FPU_REGS; i++) {
450                 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
451                 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
452                                           &fpr_val, i * sizeof(elf_fpreg_t),
453                                           (i + 1) * sizeof(elf_fpreg_t));
454                 if (err)
455                         return err;
456         }
457
458         return 0;
459 }
460
461 static int fpr_set(struct task_struct *target,
462                    const struct user_regset *regset,
463                    unsigned int pos, unsigned int count,
464                    const void *kbuf, const void __user *ubuf)
465 {
466         unsigned i;
467         int err;
468         u64 fpr_val;
469
470         /* XXX fcr31  */
471
472         init_fp_ctx(target);
473
474         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
475                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
476                                           &target->thread.fpu,
477                                           0, sizeof(elf_fpregset_t));
478
479         for (i = 0; i < NUM_FPU_REGS; i++) {
480                 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
481                                          &fpr_val, i * sizeof(elf_fpreg_t),
482                                          (i + 1) * sizeof(elf_fpreg_t));
483                 if (err)
484                         return err;
485                 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
486         }
487
488         return 0;
489 }
490
491 enum mips_regset {
492         REGSET_GPR,
493         REGSET_FPR,
494 };
495
496 struct pt_regs_offset {
497         const char *name;
498         int offset;
499 };
500
501 #define REG_OFFSET_NAME(reg, r) {                                       \
502         .name = #reg,                                                   \
503         .offset = offsetof(struct pt_regs, r)                           \
504 }
505
506 #define REG_OFFSET_END {                                                \
507         .name = NULL,                                                   \
508         .offset = 0                                                     \
509 }
510
511 static const struct pt_regs_offset regoffset_table[] = {
512         REG_OFFSET_NAME(r0, regs[0]),
513         REG_OFFSET_NAME(r1, regs[1]),
514         REG_OFFSET_NAME(r2, regs[2]),
515         REG_OFFSET_NAME(r3, regs[3]),
516         REG_OFFSET_NAME(r4, regs[4]),
517         REG_OFFSET_NAME(r5, regs[5]),
518         REG_OFFSET_NAME(r6, regs[6]),
519         REG_OFFSET_NAME(r7, regs[7]),
520         REG_OFFSET_NAME(r8, regs[8]),
521         REG_OFFSET_NAME(r9, regs[9]),
522         REG_OFFSET_NAME(r10, regs[10]),
523         REG_OFFSET_NAME(r11, regs[11]),
524         REG_OFFSET_NAME(r12, regs[12]),
525         REG_OFFSET_NAME(r13, regs[13]),
526         REG_OFFSET_NAME(r14, regs[14]),
527         REG_OFFSET_NAME(r15, regs[15]),
528         REG_OFFSET_NAME(r16, regs[16]),
529         REG_OFFSET_NAME(r17, regs[17]),
530         REG_OFFSET_NAME(r18, regs[18]),
531         REG_OFFSET_NAME(r19, regs[19]),
532         REG_OFFSET_NAME(r20, regs[20]),
533         REG_OFFSET_NAME(r21, regs[21]),
534         REG_OFFSET_NAME(r22, regs[22]),
535         REG_OFFSET_NAME(r23, regs[23]),
536         REG_OFFSET_NAME(r24, regs[24]),
537         REG_OFFSET_NAME(r25, regs[25]),
538         REG_OFFSET_NAME(r26, regs[26]),
539         REG_OFFSET_NAME(r27, regs[27]),
540         REG_OFFSET_NAME(r28, regs[28]),
541         REG_OFFSET_NAME(r29, regs[29]),
542         REG_OFFSET_NAME(r30, regs[30]),
543         REG_OFFSET_NAME(r31, regs[31]),
544         REG_OFFSET_NAME(c0_status, cp0_status),
545         REG_OFFSET_NAME(hi, hi),
546         REG_OFFSET_NAME(lo, lo),
547 #ifdef CONFIG_CPU_HAS_SMARTMIPS
548         REG_OFFSET_NAME(acx, acx),
549 #endif
550         REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr),
551         REG_OFFSET_NAME(c0_cause, cp0_cause),
552         REG_OFFSET_NAME(c0_epc, cp0_epc),
553 #ifdef CONFIG_CPU_CAVIUM_OCTEON
554         REG_OFFSET_NAME(mpl0, mpl[0]),
555         REG_OFFSET_NAME(mpl1, mpl[1]),
556         REG_OFFSET_NAME(mpl2, mpl[2]),
557         REG_OFFSET_NAME(mtp0, mtp[0]),
558         REG_OFFSET_NAME(mtp1, mtp[1]),
559         REG_OFFSET_NAME(mtp2, mtp[2]),
560 #endif
561         REG_OFFSET_END,
562 };
563
564 /**
565  * regs_query_register_offset() - query register offset from its name
566  * @name:       the name of a register
567  *
568  * regs_query_register_offset() returns the offset of a register in struct
569  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
570  */
571 int regs_query_register_offset(const char *name)
572 {
573         const struct pt_regs_offset *roff;
574         for (roff = regoffset_table; roff->name != NULL; roff++)
575                 if (!strcmp(roff->name, name))
576                         return roff->offset;
577         return -EINVAL;
578 }
579
580 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
581
582 static const struct user_regset mips_regsets[] = {
583         [REGSET_GPR] = {
584                 .core_note_type = NT_PRSTATUS,
585                 .n              = ELF_NGREG,
586                 .size           = sizeof(unsigned int),
587                 .align          = sizeof(unsigned int),
588                 .get            = gpr32_get,
589                 .set            = gpr32_set,
590         },
591         [REGSET_FPR] = {
592                 .core_note_type = NT_PRFPREG,
593                 .n              = ELF_NFPREG,
594                 .size           = sizeof(elf_fpreg_t),
595                 .align          = sizeof(elf_fpreg_t),
596                 .get            = fpr_get,
597                 .set            = fpr_set,
598         },
599 };
600
601 static const struct user_regset_view user_mips_view = {
602         .name           = "mips",
603         .e_machine      = ELF_ARCH,
604         .ei_osabi       = ELF_OSABI,
605         .regsets        = mips_regsets,
606         .n              = ARRAY_SIZE(mips_regsets),
607 };
608
609 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
610
611 #ifdef CONFIG_64BIT
612
613 static const struct user_regset mips64_regsets[] = {
614         [REGSET_GPR] = {
615                 .core_note_type = NT_PRSTATUS,
616                 .n              = ELF_NGREG,
617                 .size           = sizeof(unsigned long),
618                 .align          = sizeof(unsigned long),
619                 .get            = gpr64_get,
620                 .set            = gpr64_set,
621         },
622         [REGSET_FPR] = {
623                 .core_note_type = NT_PRFPREG,
624                 .n              = ELF_NFPREG,
625                 .size           = sizeof(elf_fpreg_t),
626                 .align          = sizeof(elf_fpreg_t),
627                 .get            = fpr_get,
628                 .set            = fpr_set,
629         },
630 };
631
632 static const struct user_regset_view user_mips64_view = {
633         .name           = "mips64",
634         .e_machine      = ELF_ARCH,
635         .ei_osabi       = ELF_OSABI,
636         .regsets        = mips64_regsets,
637         .n              = ARRAY_SIZE(mips64_regsets),
638 };
639
640 #endif /* CONFIG_64BIT */
641
642 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
643 {
644 #ifdef CONFIG_32BIT
645         return &user_mips_view;
646 #else
647 #ifdef CONFIG_MIPS32_O32
648         if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
649                 return &user_mips_view;
650 #endif
651         return &user_mips64_view;
652 #endif
653 }
654
655 long arch_ptrace(struct task_struct *child, long request,
656                  unsigned long addr, unsigned long data)
657 {
658         int ret;
659         void __user *addrp = (void __user *) addr;
660         void __user *datavp = (void __user *) data;
661         unsigned long __user *datalp = (void __user *) data;
662
663         switch (request) {
664         /* when I and D space are separate, these will need to be fixed. */
665         case PTRACE_PEEKTEXT: /* read word at location addr. */
666         case PTRACE_PEEKDATA:
667                 ret = generic_ptrace_peekdata(child, addr, data);
668                 break;
669
670         /* Read the word at location addr in the USER area. */
671         case PTRACE_PEEKUSR: {
672                 struct pt_regs *regs;
673                 union fpureg *fregs;
674                 unsigned long tmp = 0;
675
676                 regs = task_pt_regs(child);
677                 ret = 0;  /* Default return value. */
678
679                 switch (addr) {
680                 case 0 ... 31:
681                         tmp = regs->regs[addr];
682                         break;
683                 case FPR_BASE ... FPR_BASE + 31:
684                         if (!tsk_used_math(child)) {
685                                 /* FP not yet used */
686                                 tmp = -1;
687                                 break;
688                         }
689                         fregs = get_fpu_regs(child);
690
691 #ifdef CONFIG_32BIT
692                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
693                                 /*
694                                  * The odd registers are actually the high
695                                  * order bits of the values stored in the even
696                                  * registers - unless we're using r2k_switch.S.
697                                  */
698                                 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
699                                                 addr & 1);
700                                 break;
701                         }
702 #endif
703                         tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
704                         break;
705                 case PC:
706                         tmp = regs->cp0_epc;
707                         break;
708                 case CAUSE:
709                         tmp = regs->cp0_cause;
710                         break;
711                 case BADVADDR:
712                         tmp = regs->cp0_badvaddr;
713                         break;
714                 case MMHI:
715                         tmp = regs->hi;
716                         break;
717                 case MMLO:
718                         tmp = regs->lo;
719                         break;
720 #ifdef CONFIG_CPU_HAS_SMARTMIPS
721                 case ACX:
722                         tmp = regs->acx;
723                         break;
724 #endif
725                 case FPC_CSR:
726                         tmp = child->thread.fpu.fcr31;
727                         break;
728                 case FPC_EIR:
729                         /* implementation / version register */
730                         tmp = boot_cpu_data.fpu_id;
731                         break;
732                 case DSP_BASE ... DSP_BASE + 5: {
733                         dspreg_t *dregs;
734
735                         if (!cpu_has_dsp) {
736                                 tmp = 0;
737                                 ret = -EIO;
738                                 goto out;
739                         }
740                         dregs = __get_dsp_regs(child);
741                         tmp = (unsigned long) (dregs[addr - DSP_BASE]);
742                         break;
743                 }
744                 case DSP_CONTROL:
745                         if (!cpu_has_dsp) {
746                                 tmp = 0;
747                                 ret = -EIO;
748                                 goto out;
749                         }
750                         tmp = child->thread.dsp.dspcontrol;
751                         break;
752                 default:
753                         tmp = 0;
754                         ret = -EIO;
755                         goto out;
756                 }
757                 ret = put_user(tmp, datalp);
758                 break;
759         }
760
761         /* when I and D space are separate, this will have to be fixed. */
762         case PTRACE_POKETEXT: /* write the word at location addr. */
763         case PTRACE_POKEDATA:
764                 ret = generic_ptrace_pokedata(child, addr, data);
765                 break;
766
767         case PTRACE_POKEUSR: {
768                 struct pt_regs *regs;
769                 ret = 0;
770                 regs = task_pt_regs(child);
771
772                 switch (addr) {
773                 case 0 ... 31:
774                         regs->regs[addr] = data;
775                         break;
776                 case FPR_BASE ... FPR_BASE + 31: {
777                         union fpureg *fregs = get_fpu_regs(child);
778
779                         init_fp_ctx(child);
780 #ifdef CONFIG_32BIT
781                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
782                                 /*
783                                  * The odd registers are actually the high
784                                  * order bits of the values stored in the even
785                                  * registers - unless we're using r2k_switch.S.
786                                  */
787                                 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
788                                           addr & 1, data);
789                                 break;
790                         }
791 #endif
792                         set_fpr64(&fregs[addr - FPR_BASE], 0, data);
793                         break;
794                 }
795                 case PC:
796                         regs->cp0_epc = data;
797                         break;
798                 case MMHI:
799                         regs->hi = data;
800                         break;
801                 case MMLO:
802                         regs->lo = data;
803                         break;
804 #ifdef CONFIG_CPU_HAS_SMARTMIPS
805                 case ACX:
806                         regs->acx = data;
807                         break;
808 #endif
809                 case FPC_CSR:
810                         child->thread.fpu.fcr31 = data & ~FPU_CSR_ALL_X;
811                         break;
812                 case DSP_BASE ... DSP_BASE + 5: {
813                         dspreg_t *dregs;
814
815                         if (!cpu_has_dsp) {
816                                 ret = -EIO;
817                                 break;
818                         }
819
820                         dregs = __get_dsp_regs(child);
821                         dregs[addr - DSP_BASE] = data;
822                         break;
823                 }
824                 case DSP_CONTROL:
825                         if (!cpu_has_dsp) {
826                                 ret = -EIO;
827                                 break;
828                         }
829                         child->thread.dsp.dspcontrol = data;
830                         break;
831                 default:
832                         /* The rest are not allowed. */
833                         ret = -EIO;
834                         break;
835                 }
836                 break;
837                 }
838
839         case PTRACE_GETREGS:
840                 ret = ptrace_getregs(child, datavp);
841                 break;
842
843         case PTRACE_SETREGS:
844                 ret = ptrace_setregs(child, datavp);
845                 break;
846
847         case PTRACE_GETFPREGS:
848                 ret = ptrace_getfpregs(child, datavp);
849                 break;
850
851         case PTRACE_SETFPREGS:
852                 ret = ptrace_setfpregs(child, datavp);
853                 break;
854
855         case PTRACE_GET_THREAD_AREA:
856                 ret = put_user(task_thread_info(child)->tp_value, datalp);
857                 break;
858
859         case PTRACE_GET_WATCH_REGS:
860                 ret = ptrace_get_watch_regs(child, addrp);
861                 break;
862
863         case PTRACE_SET_WATCH_REGS:
864                 ret = ptrace_set_watch_regs(child, addrp);
865                 break;
866
867         default:
868                 ret = ptrace_request(child, request, addr, data);
869                 break;
870         }
871  out:
872         return ret;
873 }
874
875 /*
876  * Notification of system call entry/exit
877  * - triggered by current->work.syscall_trace
878  */
879 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
880 {
881         long ret = 0;
882         user_exit();
883
884         current_thread_info()->syscall = syscall;
885
886         if (secure_computing() == -1)
887                 return -1;
888
889         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
890             tracehook_report_syscall_entry(regs))
891                 ret = -1;
892
893         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
894                 trace_sys_enter(regs, regs->regs[2]);
895
896         audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
897                             regs->regs[6], regs->regs[7]);
898         return syscall;
899 }
900
901 /*
902  * Notification of system call entry/exit
903  * - triggered by current->work.syscall_trace
904  */
905 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
906 {
907         /*
908          * We may come here right after calling schedule_user()
909          * or do_notify_resume(), in which case we can be in RCU
910          * user mode.
911          */
912         user_exit();
913
914         audit_syscall_exit(regs);
915
916         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
917                 trace_sys_exit(regs, regs->regs[2]);
918
919         if (test_thread_flag(TIF_SYSCALL_TRACE))
920                 tracehook_report_syscall_exit(regs, 0);
921
922         user_enter();
923 }