arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi

   1 /*
   2  * Copyright 2013 Boundary Devices, Inc.
   3  * Copyright 2011 Freescale Semiconductor, Inc.
   4  * Copyright 2011 Linaro Ltd.
   5  *
   6  * The code contained herein is licensed under the GNU General Public
   7  * License. You may obtain a copy of the GNU General Public License
   8  * Version 2 or later at the following locations:
   9  *
  10  * http://www.opensource.org/licenses/gpl-license.html
  11  * http://www.gnu.org/copyleft/gpl.html
  12  */
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/input/input.h>
  15
  16 / {
  17         chosen {
  18                 stdout-path = &uart2;
  19         };
  20
  21         memory {
  22                 reg = <0x10000000 0x40000000>;
  23         };
  24
  25         regulators {
  26                 compatible = "simple-bus";
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 reg_2p5v: regulator@0 {
  31                         compatible = "regulator-fixed";
  32                         reg = <0>;
  33                         regulator-name = "2P5V";
  34                         regulator-min-microvolt = <2500000>;
  35                         regulator-max-microvolt = <2500000>;
  36                         regulator-always-on;
  37                 };
  38
  39                 reg_3p3v: regulator@1 {
  40                         compatible = "regulator-fixed";
  41                         reg = <1>;
  42                         regulator-name = "3P3V";
  43                         regulator-min-microvolt = <3300000>;
  44                         regulator-max-microvolt = <3300000>;
  45                         regulator-always-on;
  46                 };
  47
  48                 reg_usb_otg_vbus: regulator@2 {
  49                         compatible = "regulator-fixed";
  50                         reg = <2>;
  51                         regulator-name = "usb_otg_vbus";
  52                         regulator-min-microvolt = <5000000>;
  53                         regulator-max-microvolt = <5000000>;
  54                         gpio = <&gpio3 22 0>;
  55                         enable-active-high;
  56                 };
  57         };
  58
  59         gpio-keys {
  60                 compatible = "gpio-keys";
  61                 pinctrl-names = "default";
  62                 pinctrl-0 = <&pinctrl_gpio_keys>;
  63
  64                 power {
  65                         label = "Power Button";
  66                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  67                         linux,code = <KEY_POWER>;
  68                         gpio-key,wakeup;
  69                 };
  70
  71                 menu {
  72                         label = "Menu";
  73                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  74                         linux,code = <KEY_MENU>;
  75                 };
  76
  77                 home {
  78                         label = "Home";
  79                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  80                         linux,code = <KEY_HOME>;
  81                 };
  82
  83                 back {
  84                         label = "Back";
  85                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  86                         linux,code = <KEY_BACK>;
  87                 };
  88
  89                 volume-up {
  90                         label = "Volume Up";
  91                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
  92                         linux,code = <KEY_VOLUMEUP>;
  93                 };
  94
  95                 volume-down {
  96                         label = "Volume Down";
  97                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
  98                         linux,code = <KEY_VOLUMEDOWN>;
  99                 };
 100         };
 101
 102         sound {
 103                 compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
 104                              "fsl,imx-audio-sgtl5000";
 105                 model = "imx6q-nitrogen6x-sgtl5000";
 106                 ssi-controller = <&ssi1>;
 107                 audio-codec = <&codec>;
 108                 audio-routing =
 109                         "MIC_IN", "Mic Jack",
 110                         "Mic Jack", "Mic Bias",
 111                         "Headphone Jack", "HP_OUT";
 112                 mux-int-port = <1>;
 113                 mux-ext-port = <3>;
 114         };
 115
 116         backlight_lcd {
 117                 compatible = "pwm-backlight";
 118                 pwms = <&pwm1 0 5000000>;
 119                 brightness-levels = <0 4 8 16 32 64 128 255>;
 120                 default-brightness-level = <7>;
 121                 power-supply = <&reg_3p3v>;
 122                 status = "okay";
 123         };
 124
 125         backlight_lvds: backlight_lvds {
 126                 compatible = "pwm-backlight";
 127                 pwms = <&pwm4 0 5000000>;
 128                 brightness-levels = <0 4 8 16 32 64 128 255>;
 129                 default-brightness-level = <7>;
 130                 power-supply = <&reg_3p3v>;
 131                 status = "okay";
 132         };
 133
 134         panel {
 135                 compatible = "hannstar,hsd100pxn1";
 136                 backlight = <&backlight_lvds>;
 137
 138                 port {
 139                         panel_in: endpoint {
 140                                 remote-endpoint = <&lvds0_out>;
 141                         };
 142                 };
 143         };
 144 };
 145
 146 &audmux {
 147         pinctrl-names = "default";
 148         pinctrl-0 = <&pinctrl_audmux>;
 149         status = "okay";
 150 };
 151
 152 &ecspi1 {
 153         fsl,spi-num-chipselects = <1>;
 154         cs-gpios = <&gpio3 19 0>;
 155         pinctrl-names = "default";
 156         pinctrl-0 = <&pinctrl_ecspi1>;
 157         status = "okay";
 158
 159         flash: m25p80@0 {
 160                 compatible = "sst,sst25vf016b";
 161                 spi-max-frequency = <20000000>;
 162                 reg = <0>;
 163         };
 164 };
 165
 166 &fec {
 167         pinctrl-names = "default";
 168         pinctrl-0 = <&pinctrl_enet>;
 169         phy-mode = "rgmii";
 170         phy-reset-gpios = <&gpio1 27 0>;
 171         txen-skew-ps = <0>;
 172         txc-skew-ps = <3000>;
 173         rxdv-skew-ps = <0>;
 174         rxc-skew-ps = <3000>;
 175         rxd0-skew-ps = <0>;
 176         rxd1-skew-ps = <0>;
 177         rxd2-skew-ps = <0>;
 178         rxd3-skew-ps = <0>;
 179         txd0-skew-ps = <0>;
 180         txd1-skew-ps = <0>;
 181         txd2-skew-ps = <0>;
 182         txd3-skew-ps = <0>;
 183         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 184                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 185         status = "okay";
 186 };
 187
 188 &hdmi {
 189         ddc-i2c-bus = <&i2c2>;
 190         status = "okay";
 191 };
 192
 193 &i2c1 {
 194         clock-frequency = <100000>;
 195         pinctrl-names = "default";
 196         pinctrl-0 = <&pinctrl_i2c1>;
 197         status = "okay";
 198
 199         codec: sgtl5000@0a {
 200                 compatible = "fsl,sgtl5000";
 201                 reg = <0x0a>;
 202                 clocks = <&clks 201>;
 203                 VDDA-supply = <&reg_2p5v>;
 204                 VDDIO-supply = <&reg_3p3v>;
 205         };
 206
 207         rtc: rtc@6f {
 208                 compatible = "isil,isl1208";
 209                 reg = <0x6f>;
 210         };
 211 };
 212
 213 &i2c2 {
 214         clock-frequency = <100000>;
 215         pinctrl-names = "default";
 216         pinctrl-0 = <&pinctrl_i2c2>;
 217         status = "okay";
 218 };
 219
 220 &i2c3 {
 221         clock-frequency = <100000>;
 222         pinctrl-names = "default";
 223         pinctrl-0 = <&pinctrl_i2c3>;
 224         status = "okay";
 225 };
 226
 227 &iomuxc {
 228         pinctrl-names = "default";
 229         pinctrl-0 = <&pinctrl_hog>;
 230
 231         imx6q-nitrogen6x {
 232                 pinctrl_hog: hoggrp {
 233                         fsl,pins = <
 234                                 /* SGTL5000 sys_mclk */
 235                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
 236                         >;
 237                 };
 238
 239                 pinctrl_audmux: audmuxgrp {
 240                         fsl,pins = <
 241                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 242                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 243                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 244                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 245                         >;
 246                 };
 247
 248                 pinctrl_ecspi1: ecspi1grp {
 249                         fsl,pins = <
 250                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 251                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 252                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 253                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
 254                         >;
 255                 };
 256
 257                 pinctrl_enet: enetgrp {
 258                         fsl,pins = <
 259                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 260                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 261                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
 262                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
 263                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
 264                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
 265                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
 266                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
 267                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 268                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 269                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 270                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 271                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 272                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 273                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 274                                 /* Phy reset */
 275                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x000b0
 276                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 277                         >;
 278                 };
 279
 280                 pinctrl_gpio_keys: gpio_keysgrp {
 281                         fsl,pins = <
 282                                 /* Power Button */
 283                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 284                                 /* Menu Button */
 285                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 286                                 /* Home Button */
 287                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 288                                 /* Back Button */
 289                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
 290                                 /* Volume Up Button */
 291                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 292                                 /* Volume Down Button */
 293                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 294                         >;
 295                 };
 296
 297                 pinctrl_i2c1: i2c1grp {
 298                         fsl,pins = <
 299                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 300                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 301                         >;
 302                 };
 303
 304                 pinctrl_i2c2: i2c2grp {
 305                         fsl,pins = <
 306                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 307                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 308                         >;
 309                 };
 310
 311                 pinctrl_i2c3: i2c3grp {
 312                         fsl,pins = <
 313                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 314                                 MX6QDL_PAD_GPIO_16__I2C3_SDA            0x4001b8b1
 315                         >;
 316                 };
 317
 318                 pinctrl_pwm1: pwm1grp {
 319                         fsl,pins = <
 320                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
 321                         >;
 322                 };
 323
 324                 pinctrl_pwm3: pwm3grp {
 325                         fsl,pins = <
 326                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
 327                         >;
 328                 };
 329
 330                 pinctrl_pwm4: pwm4grp {
 331                         fsl,pins = <
 332                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
 333                         >;
 334                 };
 335
 336                 pinctrl_uart1: uart1grp {
 337                         fsl,pins = <
 338                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 339                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 340                         >;
 341                 };
 342
 343                 pinctrl_uart2: uart2grp {
 344                         fsl,pins = <
 345                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 346                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 347                         >;
 348                 };
 349
 350                 pinctrl_usbotg: usbotggrp {
 351                         fsl,pins = <
 352                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID   0x17059
 353                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
 354                                 /* power enable, high active */
 355                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
 356                         >;
 357                 };
 358
 359                 pinctrl_usdhc3: usdhc3grp {
 360                         fsl,pins = <
 361                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 362                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 363                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 364                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 365                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 366                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 367                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
 368                         >;
 369                 };
 370
 371                 pinctrl_usdhc4: usdhc4grp {
 372                         fsl,pins = <
 373                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 374                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 375                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 376                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 377                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 378                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 379                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
 380                         >;
 381                 };
 382         };
 383 };
 384
 385 &ldb {
 386         status = "okay";
 387
 388         lvds-channel@0 {
 389                 fsl,data-mapping = "spwg";
 390                 fsl,data-width = <18>;
 391                 status = "okay";
 392
 393                 port@4 {
 394                         reg = <4>;
 395
 396                         lvds0_out: endpoint {
 397                                 remote-endpoint = <&panel_in>;
 398                         };
 399                 };
 400         };
 401 };
 402
 403 &pcie {
 404         status = "okay";
 405 };
 406
 407 &pwm1 {
 408         pinctrl-names = "default";
 409         pinctrl-0 = <&pinctrl_pwm1>;
 410         status = "okay";
 411 };
 412
 413 &pwm3 {
 414         pinctrl-names = "default";
 415         pinctrl-0 = <&pinctrl_pwm3>;
 416         status = "okay";
 417 };
 418
 419 &pwm4 {
 420         pinctrl-names = "default";
 421         pinctrl-0 = <&pinctrl_pwm4>;
 422         status = "okay";
 423 };
 424
 425 &ssi1 {
 426         status = "okay";
 427 };
 428
 429 &uart1 {
 430         pinctrl-names = "default";
 431         pinctrl-0 = <&pinctrl_uart1>;
 432         status = "okay";
 433 };
 434
 435 &uart2 {
 436         pinctrl-names = "default";
 437         pinctrl-0 = <&pinctrl_uart2>;
 438         status = "okay";
 439 };
 440
 441 &usbh1 {
 442         status = "okay";
 443 };
 444
 445 &usbotg {
 446         vbus-supply = <&reg_usb_otg_vbus>;
 447         pinctrl-names = "default";
 448         pinctrl-0 = <&pinctrl_usbotg>;
 449         disable-over-current;
 450         status = "okay";
 451 };
 452
 453 &usdhc3 {
 454         pinctrl-names = "default";
 455         pinctrl-0 = <&pinctrl_usdhc3>;
 456         cd-gpios = <&gpio7 0 0>;
 457         vmmc-supply = <&reg_3p3v>;
 458         status = "okay";
 459 };
 460
 461 &usdhc4 {
 462         pinctrl-names = "default";
 463         pinctrl-0 = <&pinctrl_usdhc4>;
 464         cd-gpios = <&gpio2 6 0>;
 465         vmmc-supply = <&reg_3p3v>;
 466         status = "okay";
 467 };