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af3c7dfe PM |
1 | /* |
2 | * include/asm-sh/processor.h | |
3 | * | |
4 | * Copyright (C) 1999, 2000 Niibe Yutaka | |
5 | * Copyright (C) 2002, 2003 Paul Mundt | |
6 | */ | |
7 | ||
8 | #ifndef __ASM_SH_PROCESSOR_32_H | |
9 | #define __ASM_SH_PROCESSOR_32_H | |
10 | #ifdef __KERNEL__ | |
11 | ||
12 | #include <linux/compiler.h> | |
fa43972f | 13 | #include <linux/linkage.h> |
af3c7dfe PM |
14 | #include <asm/page.h> |
15 | #include <asm/types.h> | |
af3c7dfe | 16 | #include <asm/ptrace.h> |
4352fc1b | 17 | #include <asm/hw_breakpoint.h> |
af3c7dfe PM |
18 | |
19 | /* | |
20 | * Default implementation of macro that returns current | |
21 | * instruction pointer ("program counter"). | |
22 | */ | |
103340cc | 23 | #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; }) |
af3c7dfe PM |
24 | |
25 | /* Core Processor Version Register */ | |
26 | #define CCN_PVR 0xff000030 | |
27 | #define CCN_CVR 0xff000040 | |
28 | #define CCN_PRR 0xff000044 | |
29 | ||
af3c7dfe PM |
30 | /* |
31 | * User space process size: 2GB. | |
32 | * | |
33 | * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff | |
34 | */ | |
35 | #define TASK_SIZE 0x7c000000UL | |
36 | ||
922a70d3 DH |
37 | #define STACK_TOP TASK_SIZE |
38 | #define STACK_TOP_MAX STACK_TOP | |
39 | ||
af3c7dfe PM |
40 | /* This decides where the kernel will search for a free chunk of vm |
41 | * space during mmap's. | |
42 | */ | |
43 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) | |
44 | ||
45 | /* | |
46 | * Bit of SR register | |
47 | * | |
48 | * FD-bit: | |
49 | * When it's set, it means the processor doesn't have right to use FPU, | |
50 | * and it results exception when the floating operation is executed. | |
51 | * | |
52 | * IMASK-bit: | |
53 | * Interrupt level mask | |
54 | */ | |
af3c7dfe PM |
55 | #define SR_DSP 0x00001000 |
56 | #define SR_IMASK 0x000000f0 | |
9bbafce2 | 57 | #define SR_FD 0x00008000 |
d3ea9fa0 | 58 | #define SR_MD 0x40000000 |
af3c7dfe | 59 | |
01ab1039 MT |
60 | /* |
61 | * DSP structure and data | |
62 | */ | |
63 | struct sh_dsp_struct { | |
64 | unsigned long dsp_regs[14]; | |
65 | long status; | |
66 | }; | |
67 | ||
af3c7dfe PM |
68 | /* |
69 | * FPU structure and data | |
70 | */ | |
71 | ||
72 | struct sh_fpu_hard_struct { | |
73 | unsigned long fp_regs[16]; | |
74 | unsigned long xfp_regs[16]; | |
75 | unsigned long fpscr; | |
76 | unsigned long fpul; | |
77 | ||
78 | long status; /* software status information */ | |
79 | }; | |
80 | ||
81 | /* Dummy fpu emulator */ | |
82 | struct sh_fpu_soft_struct { | |
83 | unsigned long fp_regs[16]; | |
84 | unsigned long xfp_regs[16]; | |
85 | unsigned long fpscr; | |
86 | unsigned long fpul; | |
87 | ||
88 | unsigned char lookahead; | |
89 | unsigned long entry_pc; | |
90 | }; | |
91 | ||
0ea820cf PM |
92 | union thread_xstate { |
93 | struct sh_fpu_hard_struct hardfpu; | |
94 | struct sh_fpu_soft_struct softfpu; | |
af3c7dfe PM |
95 | }; |
96 | ||
97 | struct thread_struct { | |
98 | /* Saved registers when thread is descheduled */ | |
99 | unsigned long sp; | |
100 | unsigned long pc; | |
101 | ||
94ea5e44 PM |
102 | /* Various thread flags, see SH_THREAD_xxx */ |
103 | unsigned long flags; | |
104 | ||
09a07294 | 105 | /* Save middle states of ptrace breakpoints */ |
94ea5e44 | 106 | struct perf_event *ptrace_bps[HBP_NUM]; |
01ab1039 MT |
107 | |
108 | #ifdef CONFIG_SH_DSP | |
109 | /* Dsp status information */ | |
110 | struct sh_dsp_struct dsp_status; | |
111 | #endif | |
af3c7dfe | 112 | |
0ea820cf PM |
113 | /* Extended processor state */ |
114 | union thread_xstate *xstate; | |
af3c7dfe | 115 | }; |
af3c7dfe PM |
116 | |
117 | #define INIT_THREAD { \ | |
118 | .sp = sizeof(init_stack) + (long) &init_stack, \ | |
94ea5e44 | 119 | .flags = 0, \ |
af3c7dfe PM |
120 | } |
121 | ||
af3c7dfe PM |
122 | /* Forward declaration, a strange C thing */ |
123 | struct task_struct; | |
70e068ee PM |
124 | |
125 | extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp); | |
af3c7dfe PM |
126 | |
127 | /* Free all resources held by a thread. */ | |
128 | extern void release_thread(struct task_struct *); | |
129 | ||
130 | /* Prepare to copy thread state - unlazy all lazy status */ | |
d3ea9fa0 | 131 | void prepare_to_copy(struct task_struct *tsk); |
af3c7dfe PM |
132 | |
133 | /* | |
134 | * create a kernel thread without removing it from tasklists | |
135 | */ | |
136 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | |
137 | ||
138 | /* Copy and release all segment info associated with a VM */ | |
139 | #define copy_segments(p, mm) do { } while(0) | |
140 | #define release_segments(mm) do { } while(0) | |
141 | ||
142 | /* | |
143 | * FPU lazy state save handling. | |
144 | */ | |
145 | ||
146 | static __inline__ void disable_fpu(void) | |
147 | { | |
148 | unsigned long __dummy; | |
149 | ||
150 | /* Set FD flag in SR */ | |
151 | __asm__ __volatile__("stc sr, %0\n\t" | |
152 | "or %1, %0\n\t" | |
153 | "ldc %0, sr" | |
154 | : "=&r" (__dummy) | |
155 | : "r" (SR_FD)); | |
156 | } | |
157 | ||
158 | static __inline__ void enable_fpu(void) | |
159 | { | |
160 | unsigned long __dummy; | |
161 | ||
162 | /* Clear out FD flag in SR */ | |
163 | __asm__ __volatile__("stc sr, %0\n\t" | |
164 | "and %1, %0\n\t" | |
165 | "ldc %0, sr" | |
166 | : "=&r" (__dummy) | |
167 | : "r" (~SR_FD)); | |
168 | } | |
169 | ||
af3c7dfe PM |
170 | /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ |
171 | #define FPSCR_INIT 0x00080000 | |
172 | ||
173 | #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ | |
174 | #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ | |
175 | ||
176 | /* | |
177 | * Return saved PC of a blocked thread. | |
178 | */ | |
179 | #define thread_saved_pc(tsk) (tsk->thread.pc) | |
180 | ||
181 | void show_trace(struct task_struct *tsk, unsigned long *sp, | |
182 | struct pt_regs *regs); | |
5d2685d0 PM |
183 | |
184 | #ifdef CONFIG_DUMP_CODE | |
9cfc9a9b | 185 | void show_code(struct pt_regs *regs); |
5d2685d0 PM |
186 | #else |
187 | static inline void show_code(struct pt_regs *regs) | |
188 | { | |
189 | } | |
190 | #endif | |
191 | ||
af3c7dfe PM |
192 | extern unsigned long get_wchan(struct task_struct *p); |
193 | ||
194 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) | |
195 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) | |
196 | ||
dc66ff62 | 197 | #define user_stack_pointer(_regs) ((_regs)->regs[15]) |
9996b42a | 198 | |
a73090ff | 199 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) |
af3c7dfe PM |
200 | #define PREFETCH_STRIDE L1_CACHE_BYTES |
201 | #define ARCH_HAS_PREFETCH | |
202 | #define ARCH_HAS_PREFETCHW | |
203 | static inline void prefetch(void *x) | |
204 | { | |
205 | __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); | |
206 | } | |
207 | ||
208 | #define prefetchw(x) prefetch(x) | |
209 | #endif | |
210 | ||
af3c7dfe PM |
211 | #endif /* __KERNEL__ */ |
212 | #endif /* __ASM_SH_PROCESSOR_32_H */ |