sh: prefetch early exception data on sh4/sh4a.
[linux-2.6-block.git] / arch / sh / include / asm / processor_32.h
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1/*
2 * include/asm-sh/processor.h
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 */
7
8#ifndef __ASM_SH_PROCESSOR_32_H
9#define __ASM_SH_PROCESSOR_32_H
10#ifdef __KERNEL__
11
12#include <linux/compiler.h>
fa43972f 13#include <linux/linkage.h>
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14#include <asm/page.h>
15#include <asm/types.h>
af3c7dfe 16#include <asm/ptrace.h>
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17
18/*
19 * Default implementation of macro that returns current
20 * instruction pointer ("program counter").
21 */
103340cc 22#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; })
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23
24/* Core Processor Version Register */
25#define CCN_PVR 0xff000030
26#define CCN_CVR 0xff000040
27#define CCN_PRR 0xff000044
28
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29asmlinkage void __init sh_cpu_init(void);
30
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31/*
32 * User space process size: 2GB.
33 *
34 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
35 */
36#define TASK_SIZE 0x7c000000UL
37
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38#define STACK_TOP TASK_SIZE
39#define STACK_TOP_MAX STACK_TOP
40
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41/* This decides where the kernel will search for a free chunk of vm
42 * space during mmap's.
43 */
44#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
45
46/*
47 * Bit of SR register
48 *
49 * FD-bit:
50 * When it's set, it means the processor doesn't have right to use FPU,
51 * and it results exception when the floating operation is executed.
52 *
53 * IMASK-bit:
54 * Interrupt level mask
55 */
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56#define SR_DSP 0x00001000
57#define SR_IMASK 0x000000f0
9bbafce2 58#define SR_FD 0x00008000
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59
60/*
61 * FPU structure and data
62 */
63
64struct sh_fpu_hard_struct {
65 unsigned long fp_regs[16];
66 unsigned long xfp_regs[16];
67 unsigned long fpscr;
68 unsigned long fpul;
69
70 long status; /* software status information */
71};
72
73/* Dummy fpu emulator */
74struct sh_fpu_soft_struct {
75 unsigned long fp_regs[16];
76 unsigned long xfp_regs[16];
77 unsigned long fpscr;
78 unsigned long fpul;
79
80 unsigned char lookahead;
81 unsigned long entry_pc;
82};
83
84union sh_fpu_union {
85 struct sh_fpu_hard_struct hard;
86 struct sh_fpu_soft_struct soft;
87};
88
89struct thread_struct {
90 /* Saved registers when thread is descheduled */
91 unsigned long sp;
92 unsigned long pc;
93
94 /* Hardware debugging registers */
95 unsigned long ubc_pc;
96
97 /* floating point info */
98 union sh_fpu_union fpu;
99};
100
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101/* Count of active tasks with UBC settings */
102extern int ubc_usercnt;
103
104#define INIT_THREAD { \
105 .sp = sizeof(init_stack) + (long) &init_stack, \
106}
107
108/*
109 * Do necessary setup to start up a newly executed thread.
110 */
dc66ff62 111#define start_thread(_regs, new_pc, new_sp) \
af3c7dfe 112 set_fs(USER_DS); \
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113 _regs->pr = 0; \
114 _regs->sr = SR_FD; /* User mode. */ \
115 _regs->pc = new_pc; \
116 _regs->regs[15] = new_sp
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117
118/* Forward declaration, a strange C thing */
119struct task_struct;
120struct mm_struct;
121
122/* Free all resources held by a thread. */
123extern void release_thread(struct task_struct *);
124
125/* Prepare to copy thread state - unlazy all lazy status */
126#define prepare_to_copy(tsk) do { } while (0)
127
128/*
129 * create a kernel thread without removing it from tasklists
130 */
131extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
132
133/* Copy and release all segment info associated with a VM */
134#define copy_segments(p, mm) do { } while(0)
135#define release_segments(mm) do { } while(0)
136
137/*
138 * FPU lazy state save handling.
139 */
140
141static __inline__ void disable_fpu(void)
142{
143 unsigned long __dummy;
144
145 /* Set FD flag in SR */
146 __asm__ __volatile__("stc sr, %0\n\t"
147 "or %1, %0\n\t"
148 "ldc %0, sr"
149 : "=&r" (__dummy)
150 : "r" (SR_FD));
151}
152
153static __inline__ void enable_fpu(void)
154{
155 unsigned long __dummy;
156
157 /* Clear out FD flag in SR */
158 __asm__ __volatile__("stc sr, %0\n\t"
159 "and %1, %0\n\t"
160 "ldc %0, sr"
161 : "=&r" (__dummy)
162 : "r" (~SR_FD));
163}
164
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165/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
166#define FPSCR_INIT 0x00080000
167
168#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
169#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
170
171/*
172 * Return saved PC of a blocked thread.
173 */
174#define thread_saved_pc(tsk) (tsk->thread.pc)
175
176void show_trace(struct task_struct *tsk, unsigned long *sp,
177 struct pt_regs *regs);
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178
179#ifdef CONFIG_DUMP_CODE
9cfc9a9b 180void show_code(struct pt_regs *regs);
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181#else
182static inline void show_code(struct pt_regs *regs)
183{
184}
185#endif
186
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187extern unsigned long get_wchan(struct task_struct *p);
188
189#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
190#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
191
dc66ff62 192#define user_stack_pointer(_regs) ((_regs)->regs[15])
9996b42a 193
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194#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
195 defined(CONFIG_CPU_SH4)
196#define PREFETCH_STRIDE L1_CACHE_BYTES
197#define ARCH_HAS_PREFETCH
198#define ARCH_HAS_PREFETCHW
199static inline void prefetch(void *x)
200{
201 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
202}
203
204#define prefetchw(x) prefetch(x)
205#endif
206
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207#endif /* __KERNEL__ */
208#endif /* __ASM_SH_PROCESSOR_32_H */