4 static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
5 unsigned int *ecx, unsigned int *edx)
8 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
9 : "0" (*eax), "2" (*ecx)
13 #include "arch-x86-common.h" /* IWYU pragma: export */
15 #define FIO_ARCH (arch_x86_64)
17 #define FIO_HUGE_PAGE 2097152
19 #define nop __asm__ __volatile__("rep;nop": : :"memory")
20 #define read_barrier() __asm__ __volatile__("lfence":::"memory")
21 #define write_barrier() __asm__ __volatile__("sfence":::"memory")
23 static inline unsigned long arch_ffz(unsigned long bitmask)
25 __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask));
29 static inline unsigned long long get_cpu_clock(void)
33 __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));
34 return ((unsigned long long) hi << 32ULL) | lo;
38 #define ARCH_HAVE_SSE4_2
39 #define ARCH_HAVE_CPU_CLOCK
41 #define RDRAND_LONG ".byte 0x48,0x0f,0xc7,0xf0"
42 #define RDSEED_LONG ".byte 0x48,0x0f,0xc7,0xf8"
43 #define RDRAND_RETRY 100
45 static inline int arch_rand_long(unsigned long *val)
49 asm volatile("1: " RDRAND_LONG "\n\t"
54 : "=r" (ok), "=a" (*val)
55 : "0" (RDRAND_RETRY));
60 static inline int arch_rand_seed(unsigned long *seed)
64 asm volatile(RDSEED_LONG "\n\t"
66 : "=qm" (ok), "=a" (*seed));