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[media] rc-core: document the protocol type
[linux-2.6-block.git] / drivers / media / usb / dvb-usb / dib0700_devices.c
CommitLineData
b7f54910
PB		 1/* Linux driver for devices based on the DiBcom DiB0700 USB bridge
2 *
3 * This program is free software; you can redistribute it and/or modify it
4 * under the terms of the GNU General Public License as published by the Free
5 * Software Foundation, version 2.
6 *
ba3fe3a9 7 * Copyright (C) 2005-9 DiBcom, SA et al
b7f54910
PB		 8 */
9#include "dib0700.h"
10
11#include "dib3000mc.h"
91bb9be6 12#include "dib7000m.h"
a75763ff 13#include "dib7000p.h"
ba3fe3a9 14#include "dib8000.h"
be9bae10 15#include "dib9000.h"
b7f54910 16#include "mt2060.h"
54d75eba 17#include "mt2266.h"
6ca8f0b9 18#include "tuner-xc2028.h"
cb22cb52 19#include "xc5000.h"
8d009a0c 20#include "xc4000.h"
cb22cb52 21#include "s5h1411.h"
01373a5c 22#include "dib0070.h"
03245a5e 23#include "dib0090.h"
ce904bcb
MK		 24#include "lgdt3305.h"
25#include "mxl5007t.h"
b7f54910 26
7fb3fc0c
PB		 27static int force_lna_activation;
28module_param(force_lna_activation, int, 0644);
29MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), "
30 "if applicable for the device (default: 0=automatic/off).");
31
01373a5c 32struct dib0700_adapter_state {
14d24d14 33 int (*set_param_save) (struct dvb_frontend *);
be9bae10 34 const struct firmware *frontend_firmware;
8abe4a0a 35 struct dib7000p_ops dib7000p_ops;
d44913c1 36 struct dib8000_ops dib8000_ops;
01373a5c
PB		 37};
38
39/* Hauppauge Nova-T 500 (aka Bristol)
b7f54910
PB		 40 * has a LNA on GPIO0 which is enabled by setting 1 */
41static struct mt2060_config bristol_mt2060_config[2] = {
42 {
43 .i2c_address = 0x60,
303cbeaa 44 .clock_out = 3,
b7f54910
PB		 45 }, {
46 .i2c_address = 0x61,
47 }
48};
49
99afb989 50
b7f54910
PB		 51static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
52 .band_caps = BAND_VHF | BAND_UHF,
01b4bf31 53 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
b7f54910 54
6958effe
PB		 55 .agc1_max = 42598,
56 .agc1_min = 17694,
57 .agc2_max = 45875,
58 .agc2_min = 0,
b7f54910 59
6958effe
PB		 60 .agc1_pt1 = 0,
61 .agc1_pt2 = 59,
b7f54910 62
6958effe
PB		 63 .agc1_slope1 = 0,
64 .agc1_slope2 = 69,
b7f54910
PB		 65
66 .agc2_pt1 = 0,
6958effe 67 .agc2_pt2 = 59,
b7f54910 68
6958effe
PB		 69 .agc2_slope1 = 111,
70 .agc2_slope2 = 28,
b7f54910
PB		 71};
72
73static struct dib3000mc_config bristol_dib3000mc_config[2] = {
74 { .agc = &bristol_dib3000p_mt2060_agc_config,
75 .max_time = 0x196,
76 .ln_adc_level = 0x1cc7,
77 .output_mpeg2_in_188_bytes = 1,
78 },
79 { .agc = &bristol_dib3000p_mt2060_agc_config,
80 .max_time = 0x196,
81 .ln_adc_level = 0x1cc7,
82 .output_mpeg2_in_188_bytes = 1,
83 }
84};
85
86static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
87{
6958effe 88 struct dib0700_state *st = adap->dev->priv;
b7f54910
PB		 89 if (adap->id == 0) {
90 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
91 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
92 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
93 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
94
7fb3fc0c
PB		 95 if (force_lna_activation)
96 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
97 else
98 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
6958effe 99
b7f54910
PB		 100 if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
101 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
102 return -ENODEV;
103 }
104 }
6958effe 105 st->mt2060_if1[adap->id] = 1220;
77eed219 106 return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
6958effe 107 (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
b7f54910
PB		 108}
109
4a2b1083 110static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
c52344fd
OD		 111{
112 struct i2c_msg msg[2] = {
113 { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
114 { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
115 };
116 if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
117 return 0;
118}
119
b7f54910
PB		 120static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
121{
c52344fd 122 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
77eed219 123 struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
c52344fd
OD		 124 s8 a;
125 int if1=1220;
da5ee486
AV		 126 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
127 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
c52344fd
OD		 128 if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
129 }
9a9677af
MK		 130 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
131 &bristol_mt2060_config[adap->id], if1) == NULL ?
132 -ENODEV : 0;
b7f54910
PB		 133}
134
01373a5c 135/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
54d75eba 136
b6884a17
PB		 137/* MT226x */
138static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
139 {
9c783036 140 BAND_UHF,
b6884a17
PB		 141
142 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
143 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 144 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
145 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
146
147 1130,
148 21,
149
150 0,
151 118,
152
153 0,
154 3530,
155 1,
156 0,
157
158 65535,
159 33770,
160 65535,
161 23592,
162
163 0,
164 62,
165 255,
166 64,
167 64,
168 132,
169 192,
170 80,
171 80,
172
173 17,
174 27,
175 23,
176 51,
177
178 1,
b6884a17 179 }, {
9c783036 180 BAND_VHF | BAND_LBAND,
b6884a17
PB		 181
182 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
183 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 184 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
185 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
186
187 2372,
188 21,
189
190 0,
191 118,
192
193 0,
194 3530,
195 1,
196 0,
197
198 65535,
199 0,
200 65535,
201 23592,
202
203 0,
204 128,
205 128,
206 128,
207 0,
208 128,
209 253,
210 81,
211 0,
212
213 17,
214 27,
215 23,
216 51,
217
218 1,
b6884a17 219 }
54d75eba
OD		 220};
221
222static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
9c783036
OG		 223 60000, 30000,
224 1, 8, 3, 1, 0,
225 0, 0, 1, 1, 2,
226 (3 << 14) | (1 << 12) | (524 << 0),
227 0,
228 20452225,
54d75eba
OD		 229};
230
231static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
232 { .output_mpeg2_in_188_bytes = 1,
233 .hostbus_diversity = 1,
234 .tuner_is_baseband = 1,
235
b6884a17
PB		 236 .agc_config_count = 2,
237 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 238 .bw = &stk7700d_mt2266_pll_config,
239
b6884a17
PB		 240 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
241 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
242 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 243 },
244 { .output_mpeg2_in_188_bytes = 1,
245 .hostbus_diversity = 1,
246 .tuner_is_baseband = 1,
247
b6884a17
PB		 248 .agc_config_count = 2,
249 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 250 .bw = &stk7700d_mt2266_pll_config,
251
b6884a17
PB		 252 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
253 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
254 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 255 }
256};
257
258static struct mt2266_config stk7700d_mt2266_config[2] = {
259 { .i2c_address = 0x60
260 },
261 { .i2c_address = 0x60
262 }
263};
264
132c3188
DG		 265static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
266{
8abe4a0a
MCC		 267 struct dib0700_adapter_state *state = adap->priv;
268
269 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
270 return -ENODEV;
271
132c3188
DG		 272 if (adap->id == 0) {
273 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
274 msleep(10);
275 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
276 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
277 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
278 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
279 msleep(10);
280 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
281 msleep(10);
8abe4a0a 282 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7
DH		 283 stk7700d_dib7000p_mt2266_config)
284 != 0) {
8abe4a0a
MCC		 285 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
286 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 287 return -ENODEV;
288 }
132c3188
DG		 289 }
290
8abe4a0a 291 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 292 0x80 + (adap->id << 1),
293 &stk7700d_dib7000p_mt2266_config[adap->id]);
132c3188 294
77eed219 295 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
132c3188
DG		 296}
297
54d75eba
OD		 298static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
299{
8abe4a0a
MCC		 300 struct dib0700_adapter_state *state = adap->priv;
301
302 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
303 return -ENODEV;
304
54d75eba
OD		 305 if (adap->id == 0) {
306 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
307 msleep(10);
308 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
309 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
310 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
311 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
312 msleep(10);
313 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
314 msleep(10);
315 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
8abe4a0a 316 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7
DH		 317 stk7700d_dib7000p_mt2266_config)
318 != 0) {
8abe4a0a
MCC		 319 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
320 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 321 return -ENODEV;
322 }
54d75eba
OD		 323 }
324
8abe4a0a 325 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 326 0x80 + (adap->id << 1),
327 &stk7700d_dib7000p_mt2266_config[adap->id]);
54d75eba 328
77eed219 329 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
54d75eba
OD		 330}
331
332static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
333{
334 struct i2c_adapter *tun_i2c;
8abe4a0a
MCC		 335 struct dib0700_adapter_state *state = adap->priv;
336
337 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
338 DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 339 return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
1ebcad77 340 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
54d75eba
OD		 341}
342
6ca8f0b9 343/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
b1721d0d 344static struct dibx000_agc_config xc3028_agc_config = {
6ca8f0b9
AC		 345 BAND_VHF | BAND_UHF, /* band_caps */
346
347 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
348 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
349 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
350 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
351 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
352
353 712, /* inv_gain */
354 21, /* time_stabiliz */
355
356 0, /* alpha_level */
357 118, /* thlock */
358
359 0, /* wbd_inv */
360 2867, /* wbd_ref */
361 0, /* wbd_sel */
362 2, /* wbd_alpha */
363
364 0, /* agc1_max */
365 0, /* agc1_min */
366 39718, /* agc2_max */
367 9930, /* agc2_min */
368 0, /* agc1_pt1 */
369 0, /* agc1_pt2 */
370 0, /* agc1_pt3 */
371 0, /* agc1_slope1 */
372 0, /* agc1_slope2 */
373 0, /* agc2_pt1 */
374 128, /* agc2_pt2 */
375 29, /* agc2_slope1 */
376 29, /* agc2_slope2 */
377
378 17, /* alpha_mant */
379 27, /* alpha_exp */
380 23, /* beta_mant */
381 51, /* beta_exp */
382
383 1, /* perform_agc_softsplit */
384};
385
386/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
b1721d0d 387static struct dibx000_bandwidth_config xc3028_bw_config = {
6ca8f0b9
AC		 388 60000, 30000, /* internal, sampling */
389 1, 8, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass */
390 0, 0, 1, 1, 0, /* misc: refdiv, bypclk_div, IO_CLK_en_core, ADClkSrc,
391 modulo */
392 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
393 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
394 20452225, /* timf */
395 30000000, /* xtal_hz */
396};
397
398static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
399 .output_mpeg2_in_188_bytes = 1,
400 .tuner_is_baseband = 1,
401
402 .agc_config_count = 1,
403 .agc = &xc3028_agc_config,
404 .bw = &xc3028_bw_config,
405
406 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
407 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
408 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
409};
410
d7cba043
MK		 411static int stk7700ph_xc3028_callback(void *ptr, int component,
412 int command, int arg)
6ca8f0b9
AC		 413{
414 struct dvb_usb_adapter *adap = ptr;
8abe4a0a 415 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9
AC		 416
417 switch (command) {
418 case XC2028_TUNER_RESET:
419 /* Send the tuner in then out of reset */
8abe4a0a
MCC		 420 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
421 msleep(10);
422 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6ca8f0b9
AC		 423 break;
424 case XC2028_RESET_CLK:
425 break;
426 default:
427 err("%s: unknown command %d, arg %d\n", __func__,
428 command, arg);
429 return -EINVAL;
430 }
431 return 0;
432}
433
434static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
435 .fname = XC2028_DEFAULT_FIRMWARE,
436 .max_len = 64,
437 .demod = XC3028_FE_DIBCOM52,
438};
439
440static struct xc2028_config stk7700ph_xc3028_config = {
441 .i2c_addr = 0x61,
6ca8f0b9
AC		 442 .ctrl = &stk7700ph_xc3028_ctrl,
443};
444
445static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
446{
447 struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 448 struct dib0700_adapter_state *state = adap->priv;
449
450 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
451 return -ENODEV;
6ca8f0b9 452
da5ee486
AV		 453 if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
454 desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
8abe4a0a 455 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 456 else
8abe4a0a 457 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
6ca8f0b9
AC		 458 msleep(20);
459 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
460 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
461 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
462 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
463 msleep(10);
464 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
465 msleep(20);
466 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
467 msleep(10);
468
8abe4a0a 469 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 470 &stk7700ph_dib7700_xc3028_config) != 0) {
8abe4a0a 471 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 472 __func__);
8abe4a0a 473 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 474 return -ENODEV;
475 }
6ca8f0b9 476
8abe4a0a 477 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9
AC		 478 &stk7700ph_dib7700_xc3028_config);
479
77eed219 480 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
6ca8f0b9
AC		 481}
482
483static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
484{
485 struct i2c_adapter *tun_i2c;
8abe4a0a 486 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9 487
8abe4a0a 488 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
6ca8f0b9
AC		 489 DIBX000_I2C_INTERFACE_TUNER, 1);
490
491 stk7700ph_xc3028_config.i2c_adap = tun_i2c;
d7cba043
MK		 492
493 /* FIXME: generalize & move to common area */
77eed219 494 adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
6ca8f0b9 495
77eed219 496 return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
6ca8f0b9
AC		 497 == NULL ? -ENODEV : 0;
498}
499
4b330bee 500#define DEFAULT_RC_INTERVAL 50
54d75eba
OD		 501
502static u8 rc_request[] = { REQUEST_POLL_RC, 0 };
503
58e6f95e 504/* Number of keypresses to ignore before start repeating */
4b330bee 505#define RC_REPEAT_DELAY 6
58e6f95e 506
72b39310
MCC		 507/*
508 * This function is used only when firmware is < 1.20 version. Newer
509 * firmwares use bulk mode, with functions implemented at dib0700_core,
510 * at dib0700_rc_urb_completion()
511 */
512static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
54d75eba
OD		 513{
514 u8 key[4];
120703f9
DH		 515 enum rc_type protocol;
516 u32 scancode;
72b39310 517 u8 toggle;
54d75eba 518 int i;
54d75eba 519 struct dib0700_state *st = d->priv;
6a207100 520
6a207100
DH		 521 if (st->fw_version >= 0x10200) {
522 /* For 1.20 firmware , We need to keep the RC polling
523 callback so we can reuse the input device setup in
524 dvb-usb-remote.c. However, the actual work is being done
525 in the bulk URB completion handler. */
526 return 0;
527 }
528
72b39310
MCC		 529 i = dib0700_ctrl_rd(d, rc_request, 2, key, 4);
530 if (i <= 0) {
034d65ed 531 err("RC Query Failed");
89f4267d 532 return -1;
54d75eba 533 }
58e6f95e
PB		 534
535 /* losing half of KEY_0 events from Philipps rc5 remotes.. */
72b39310
MCC		 536 if (key[0] == 0 && key[1] == 0 && key[2] == 0 && key[3] == 0)
537 return 0;
58e6f95e
PB		 538
539 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)key[3-2],(int)key[3-3],(int)key[3-1],(int)key[3]); */
540
c4018fa2 541 dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
58e6f95e 542
0ffd1ab3 543 switch (d->props.rc.core.protocol) {
c003ab1b 544 case RC_BIT_NEC:
58e6f95e
PB		 545 /* NEC protocol sends repeat code as 0 0 0 FF */
546 if ((key[3-2] == 0x00) && (key[3-3] == 0x00) &&
120703f9
DH		 547 (key[3] == 0xff)) {
548 rc_repeat(d->rc_dev);
549 return 0;
58e6f95e 550 }
72b39310 551
120703f9
DH		 552 protocol = RC_TYPE_NEC;
553 scancode = RC_SCANCODE_NEC(key[3-2], key[3-3]);
554 toggle = 0;
58e6f95e 555 break;
120703f9 556
72b39310 557 default:
58e6f95e 558 /* RC-5 protocol changes toggle bit on new keypress */
120703f9
DH		 559 protocol = RC_TYPE_RC5;
560 scancode = RC_SCANCODE_RC5(key[3-2], key[3-3]);
72b39310 561 toggle = key[3-1];
58e6f95e
PB		 562 break;
563 }
120703f9
DH		 564
565 rc_keydown(d->rc_dev, protocol, scancode, toggle);
54d75eba
OD		 566 return 0;
567}
568
b7f54910 569/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
a75763ff 570static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
9c783036 571 BAND_UHF | BAND_VHF,
69ea31e7
PB		 572
573 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
574 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 575 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
576 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
577
578 712,
579 41,
580
581 0,
582 118,
583
584 0,
585 4095,
586 0,
587 0,
588
589 42598,
590 17694,
591 45875,
592 2621,
593 0,
594 76,
595 139,
596 52,
597 59,
598 107,
599 172,
600 57,
601 70,
602
603 21,
604 25,
605 28,
606 48,
607
608 1,
609 { 0,
610 107,
611 51800,
612 24700
69ea31e7
PB		 613 },
614};
615
a75763ff
PB		 616static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
617 BAND_UHF | BAND_VHF,
618
619 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
620 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 621 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
622 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
a75763ff 623
9c783036
OG		 624 712,
625 41,
a75763ff 626
9c783036
OG		 627 0,
628 118,
a75763ff 629
9c783036
OG		 630 0,
631 4095,
632 0,
633 0,
a75763ff 634
9c783036
OG		 635 42598,
636 16384,
637 42598,
638 0,
a75763ff 639
9c783036
OG		 640 0,
641 137,
642 255,
a75763ff 643
9c783036
OG		 644 0,
645 255,
a75763ff 646
9c783036
OG		 647 0,
648 0,
a75763ff 649
9c783036
OG		 650 0,
651 41,
a75763ff 652
9c783036
OG		 653 15,
654 25,
a75763ff 655
9c783036
OG		 656 28,
657 48,
a75763ff 658
9c783036 659 0,
a75763ff
PB		 660};
661
662static struct dibx000_bandwidth_config stk7700p_pll_config = {
9c783036
OG		 663 60000, 30000,
664 1, 8, 3, 1, 0,
665 0, 0, 1, 1, 0,
666 (3 << 14) | (1 << 12) | (524 << 0),
667 60258167,
668 20452225,
669 30000000,
69ea31e7
PB		 670};
671
672static struct dib7000m_config stk7700p_dib7000m_config = {
673 .dvbt_mode = 1,
674 .output_mpeg2_in_188_bytes = 1,
675 .quartz_direct = 1,
676
677 .agc_config_count = 1,
a75763ff
PB		 678 .agc = &stk7700p_7000m_mt2060_agc_config,
679 .bw = &stk7700p_pll_config,
680
681 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
682 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
683 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
684};
685
686static struct dib7000p_config stk7700p_dib7000p_config = {
687 .output_mpeg2_in_188_bytes = 1,
688
b6884a17 689 .agc_config_count = 1,
a75763ff
PB		 690 .agc = &stk7700p_7000p_mt2060_agc_config,
691 .bw = &stk7700p_pll_config,
69ea31e7
PB		 692
693 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
694 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
695 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
b7f54910
PB		 696};
697
698static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
699{
69ea31e7 700 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 701 struct dib0700_adapter_state *state = adap->priv;
702
703 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
704 return -ENODEV;
705
b7f54910 706 /* unless there is no real power management in DVB - we leave the device on GPIO6 */
a75763ff
PB		 707
708 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
709 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
710
69ea31e7 711 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
a75763ff
PB		 712 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
713
b7f54910 714 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
a75763ff
PB		 715 dib0700_ctrl_clock(adap->dev, 72, 1);
716 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
717
718 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
b7f54910 719
69ea31e7 720 st->mt2060_if1[0] = 1220;
a75763ff 721
8abe4a0a
MCC		 722 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
723 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
a75763ff 724 st->is_dib7000pc = 1;
8abe4a0a
MCC		 725 } else {
726 dvb_detach(&state->dib7000p_ops);
727 memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
77eed219 728 adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
8abe4a0a 729 }
a75763ff 730
77eed219 731 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
b7f54910
PB		 732}
733
69ea31e7
PB		 734static struct mt2060_config stk7700p_mt2060_config = {
735 0x60
736};
737
b7f54910
PB		 738static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
739{
c52344fd 740 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
69ea31e7 741 struct dib0700_state *st = adap->dev->priv;
a75763ff 742 struct i2c_adapter *tun_i2c;
8abe4a0a 743 struct dib0700_adapter_state *state = adap->priv;
c52344fd
OD		 744 s8 a;
745 int if1=1220;
8abe4a0a 746
da5ee486
AV		 747 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
748 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
c52344fd
OD		 749 if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
750 }
a75763ff 751 if (st->is_dib7000pc)
8abe4a0a 752 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 753 else
77eed219 754 tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 755
77eed219 756 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
c52344fd 757 if1) == NULL ? -ENODEV : 0;
b7f54910
PB		 758}
759
01373a5c
PB		 760/* DIB7070 generic */
761static struct dibx000_agc_config dib7070_agc_config = {
762 BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
763 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
764 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
9c783036
OG		 765 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
766 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
767
768 600,
769 10,
770
771 0,
772 118,
773
774 0,
775 3530,
776 1,
777 5,
778
779 65535,
780 0,
781
782 65535,
783 0,
784
785 0,
786 40,
787 183,
788 206,
789 255,
790 72,
791 152,
792 88,
793 90,
794
795 17,
796 27,
797 23,
798 51,
799
800 0,
01373a5c
PB		 801};
802
803static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
804{
8abe4a0a
MCC		 805 struct dvb_usb_adapter *adap = fe->dvb->priv;
806 struct dib0700_adapter_state *state = adap->priv;
807
7e5ce651 808 deb_info("reset: %d", onoff);
8abe4a0a 809 return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
01373a5c
PB		 810}
811
812static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
813{
8abe4a0a
MCC		 814 struct dvb_usb_adapter *adap = fe->dvb->priv;
815 struct dib0700_adapter_state *state = adap->priv;
816
7e5ce651 817 deb_info("sleep: %d", onoff);
8abe4a0a 818 return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
01373a5c
PB		 819}
820
821static struct dib0070_config dib7070p_dib0070_config[2] = {
822 {
823 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
824 .reset = dib7070_tuner_reset,
825 .sleep = dib7070_tuner_sleep,
826 .clock_khz = 12000,
7e5ce651
PB		 827 .clock_pad_drive = 4,
828 .charge_pump = 2,
01373a5c
PB		 829 }, {
830 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
831 .reset = dib7070_tuner_reset,
832 .sleep = dib7070_tuner_sleep,
833 .clock_khz = 12000,
7e5ce651 834 .charge_pump = 2,
01373a5c
PB		 835 }
836};
837
d300bd69
OG		 838static struct dib0070_config dib7770p_dib0070_config = {
839 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
840 .reset = dib7070_tuner_reset,
841 .sleep = dib7070_tuner_sleep,
842 .clock_khz = 12000,
843 .clock_pad_drive = 0,
844 .flip_chip = 1,
eac1fe10 845 .charge_pump = 2,
d300bd69
OG		 846};
847
14d24d14 848static int dib7070_set_param_override(struct dvb_frontend *fe)
01373a5c 849{
47b163af 850 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
01373a5c
PB		 851 struct dvb_usb_adapter *adap = fe->dvb->priv;
852 struct dib0700_adapter_state *state = adap->priv;
853
854 u16 offset;
47b163af 855 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
01373a5c
PB		 856 switch (band) {
857 case BAND_VHF: offset = 950; break;
858 case BAND_UHF:
859 default: offset = 550; break;
860 }
861 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
8abe4a0a 862 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
14d24d14 863 return state->set_param_save(fe);
01373a5c
PB		 864}
865
14d24d14 866static int dib7770_set_param_override(struct dvb_frontend *fe)
d300bd69 867{
47b163af
MCC		 868 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
869 struct dvb_usb_adapter *adap = fe->dvb->priv;
870 struct dib0700_adapter_state *state = adap->priv;
d300bd69
OG		 871
872 u16 offset;
47b163af 873 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
d300bd69
OG		 874 switch (band) {
875 case BAND_VHF:
8abe4a0a 876 state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
d300bd69
OG		 877 offset = 850;
878 break;
879 case BAND_UHF:
880 default:
8abe4a0a 881 state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
d300bd69
OG		 882 offset = 250;
883 break;
884 }
885 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
8abe4a0a 886 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
14d24d14 887 return state->set_param_save(fe);
d300bd69
OG		 888}
889
890static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
891{
8abe4a0a
MCC		 892 struct dib0700_adapter_state *st = adap->priv;
893 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
d300bd69
OG		 894 DIBX000_I2C_INTERFACE_TUNER, 1);
895
8abe4a0a
MCC		 896 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
897 &dib7770p_dib0070_config) == NULL)
898 return -ENODEV;
d300bd69 899
8abe4a0a
MCC		 900 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
901 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
902 return 0;
d300bd69
OG		 903}
904
01373a5c
PB		 905static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
906{
907 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a 908 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
01373a5c
PB		 909
910 if (adap->id == 0) {
77eed219 911 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
01373a5c
PB		 912 return -ENODEV;
913 } else {
77eed219 914 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
01373a5c
PB		 915 return -ENODEV;
916 }
917
77eed219
MK		 918 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
919 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
01373a5c
PB		 920 return 0;
921}
922
e192a7cf
OG		 923static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
924 u16 pid, int onoff)
925{
8abe4a0a 926 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 927 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 928
e192a7cf 929 if (st->is_dib7000pc)
8abe4a0a 930 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
77eed219 931 return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
e192a7cf
OG		 932}
933
934static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
935{
936 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 937 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 938 if (st->is_dib7000pc)
8abe4a0a 939 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
77eed219 940 return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
e192a7cf
OG		 941}
942
f8731f4d
OG		 943static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
944{
8abe4a0a
MCC		 945 struct dib0700_adapter_state *state = adapter->priv;
946 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 947}
948
949static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
950{
8abe4a0a
MCC		 951 struct dib0700_adapter_state *state = adapter->priv;
952 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d
OG		 953}
954
01373a5c 955static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
9c783036
OG		 956 60000, 15000,
957 1, 20, 3, 1, 0,
958 0, 0, 1, 1, 2,
959 (3 << 14) | (1 << 12) | (524 << 0),
960 (0 << 25) | 0,
961 20452225,
962 12000000,
01373a5c
PB		 963};
964
965static struct dib7000p_config dib7070p_dib7000p_config = {
966 .output_mpeg2_in_188_bytes = 1,
967
968 .agc_config_count = 1,
969 .agc = &dib7070_agc_config,
970 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 971 .tuner_is_baseband = 1,
972 .spur_protect = 1,
01373a5c
PB		 973
974 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
975 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
976 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
977
978 .hostbus_diversity = 1,
979};
980
981/* STK7070P */
982static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
983{
da5ee486 984 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 985 struct dib0700_adapter_state *state = adap->priv;
986
987 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
988 return -ENODEV;
989
da5ee486
AV		 990 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
991 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
992 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 993 else
da5ee486 994 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
01373a5c
PB		 995 msleep(10);
996 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
997 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
998 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
999 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1000
1001 dib0700_ctrl_clock(adap->dev, 72, 1);
1002
1003 msleep(10);
1004 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1005 msleep(10);
1006 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1007
8abe4a0a 1008 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 1009 &dib7070p_dib7000p_config) != 0) {
8abe4a0a 1010 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 1011 __func__);
8abe4a0a 1012 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 1013 return -ENODEV;
1014 }
01373a5c 1015
8abe4a0a 1016 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9 1017 &dib7070p_dib7000p_config);
77eed219 1018 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 1019}
1020
90e12cec
OG		 1021/* STK7770P */
1022static struct dib7000p_config dib7770p_dib7000p_config = {
1023 .output_mpeg2_in_188_bytes = 1,
1024
1025 .agc_config_count = 1,
1026 .agc = &dib7070_agc_config,
1027 .bw = &dib7070_bw_config_12_mhz,
1028 .tuner_is_baseband = 1,
1029 .spur_protect = 1,
1030
1031 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
1032 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
1033 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1034
1035 .hostbus_diversity = 1,
1036 .enable_current_mirror = 1,
970d14c6 1037 .disable_sample_and_hold = 0,
90e12cec
OG		 1038};
1039
1040static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
1041{
1042 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 1043 struct dib0700_adapter_state *state = adap->priv;
1044
1045 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
1046 return -ENODEV;
1047
90e12cec
OG		 1048 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
1049 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
1050 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1051 else
1052 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1053 msleep(10);
1054 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1055 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1056 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1057 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1058
1059 dib0700_ctrl_clock(adap->dev, 72, 1);
1060
1061 msleep(10);
1062 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1063 msleep(10);
1064 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1065
8abe4a0a 1066 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
90e12cec 1067 &dib7770p_dib7000p_config) != 0) {
8abe4a0a 1068 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
90e12cec 1069 __func__);
8abe4a0a 1070 dvb_detach(&state->dib7000p_ops);
90e12cec
OG		 1071 return -ENODEV;
1072 }
1073
8abe4a0a 1074 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
90e12cec 1075 &dib7770p_dib7000p_config);
77eed219 1076 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
90e12cec
OG		 1077}
1078
ba3fe3a9
PB		 1079/* DIB807x generic */
1080static struct dibx000_agc_config dib807x_agc_config[2] = {
1081 {
1082 BAND_VHF,
1083 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1084 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1085 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
1086 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1087 * P_agc_write=0 */
1088 (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
1089 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1090 (0 << 0), /* setup*/
1091
1092 600, /* inv_gain*/
1093 10, /* time_stabiliz*/
1094
1095 0, /* alpha_level*/
1096 118, /* thlock*/
1097
1098 0, /* wbd_inv*/
1099 3530, /* wbd_ref*/
1100 1, /* wbd_sel*/
1101 5, /* wbd_alpha*/
1102
1103 65535, /* agc1_max*/
1104 0, /* agc1_min*/
1105
1106 65535, /* agc2_max*/
1107 0, /* agc2_min*/
1108
1109 0, /* agc1_pt1*/
1110 40, /* agc1_pt2*/
1111 183, /* agc1_pt3*/
1112 206, /* agc1_slope1*/
1113 255, /* agc1_slope2*/
1114 72, /* agc2_pt1*/
1115 152, /* agc2_pt2*/
1116 88, /* agc2_slope1*/
1117 90, /* agc2_slope2*/
1118
1119 17, /* alpha_mant*/
1120 27, /* alpha_exp*/
1121 23, /* beta_mant*/
1122 51, /* beta_exp*/
1123
1124 0, /* perform_agc_softsplit*/
1125 }, {
1126 BAND_UHF,
1127 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1128 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1129 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1130 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1131 * P_agc_write=0 */
1132 (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
1133 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1134 (0 << 0), /* setup */
1135
1136 600, /* inv_gain*/
1137 10, /* time_stabiliz*/
1138
1139 0, /* alpha_level*/
1140 118, /* thlock*/
1141
1142 0, /* wbd_inv*/
1143 3530, /* wbd_ref*/
1144 1, /* wbd_sel*/
1145 5, /* wbd_alpha*/
1146
1147 65535, /* agc1_max*/
1148 0, /* agc1_min*/
1149
1150 65535, /* agc2_max*/
1151 0, /* agc2_min*/
1152
1153 0, /* agc1_pt1*/
1154 40, /* agc1_pt2*/
1155 183, /* agc1_pt3*/
1156 206, /* agc1_slope1*/
1157 255, /* agc1_slope2*/
1158 72, /* agc2_pt1*/
1159 152, /* agc2_pt2*/
1160 88, /* agc2_slope1*/
1161 90, /* agc2_slope2*/
1162
1163 17, /* alpha_mant*/
1164 27, /* alpha_exp*/
1165 23, /* beta_mant*/
1166 51, /* beta_exp*/
1167
1168 0, /* perform_agc_softsplit*/
1169 }
1170};
1171
1172static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
1173 60000, 15000, /* internal, sampling*/
1174 1, 20, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass*/
1175 0, 0, 1, 1, 2, /* misc: refdiv, bypclk_div, IO_CLK_en_core,
1176 ADClkSrc, modulo */
1177 (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
1178 (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
1179 18179755, /* timf*/
1180 12000000, /* xtal_hz*/
1181};
1182
1183static struct dib8000_config dib807x_dib8000_config[2] = {
1184 {
1185 .output_mpeg2_in_188_bytes = 1,
1186
1187 .agc_config_count = 2,
1188 .agc = dib807x_agc_config,
1189 .pll = &dib807x_bw_config_12_mhz,
1190 .tuner_is_baseband = 1,
1191
1192 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1193 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1194 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1195
1196 .hostbus_diversity = 1,
1197 .div_cfg = 1,
1198 .agc_control = &dib0070_ctrl_agc_filter,
1199 .output_mode = OUTMODE_MPEG2_FIFO,
1200 .drives = 0x2d98,
1201 }, {
1202 .output_mpeg2_in_188_bytes = 1,
1203
1204 .agc_config_count = 2,
1205 .agc = dib807x_agc_config,
1206 .pll = &dib807x_bw_config_12_mhz,
1207 .tuner_is_baseband = 1,
1208
1209 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1210 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1211 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1212
1213 .hostbus_diversity = 1,
1214 .agc_control = &dib0070_ctrl_agc_filter,
1215 .output_mode = OUTMODE_MPEG2_FIFO,
1216 .drives = 0x2d98,
1217 }
1218};
1219
03245a5e 1220static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1221{
d44913c1
MCC		 1222 struct dvb_usb_adapter *adap = fe->dvb->priv;
1223 struct dib0700_adapter_state *state = adap->priv;
1224
1225 return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
ba3fe3a9
PB		 1226}
1227
03245a5e 1228static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1229{
d44913c1
MCC		 1230 struct dvb_usb_adapter *adap = fe->dvb->priv;
1231 struct dib0700_adapter_state *state = adap->priv;
1232
1233 return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
ba3fe3a9
PB		 1234}
1235
1236static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
1237 { 240, 7},
1238 { 0xffff, 6},
1239};
1240
1241static struct dib0070_config dib807x_dib0070_config[2] = {
1242 {
1243 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1244 .reset = dib80xx_tuner_reset,
1245 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1246 .clock_khz = 12000,
1247 .clock_pad_drive = 4,
1248 .vga_filter = 1,
1249 .force_crystal_mode = 1,
1250 .enable_third_order_filter = 1,
1251 .charge_pump = 0,
1252 .wbd_gain = dib8070_wbd_gain_cfg,
1253 .osc_buffer_state = 0,
1254 .freq_offset_khz_uhf = -100,
1255 .freq_offset_khz_vhf = -100,
1256 }, {
1257 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1258 .reset = dib80xx_tuner_reset,
1259 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1260 .clock_khz = 12000,
1261 .clock_pad_drive = 2,
1262 .vga_filter = 1,
1263 .force_crystal_mode = 1,
1264 .enable_third_order_filter = 1,
1265 .charge_pump = 0,
1266 .wbd_gain = dib8070_wbd_gain_cfg,
1267 .osc_buffer_state = 0,
1268 .freq_offset_khz_uhf = -25,
1269 .freq_offset_khz_vhf = -25,
1270 }
1271};
1272
14d24d14 1273static int dib807x_set_param_override(struct dvb_frontend *fe)
ba3fe3a9 1274{
47b163af 1275 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
ba3fe3a9
PB		 1276 struct dvb_usb_adapter *adap = fe->dvb->priv;
1277 struct dib0700_adapter_state *state = adap->priv;
1278
1279 u16 offset = dib0070_wbd_offset(fe);
47b163af 1280 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
ba3fe3a9
PB		 1281 switch (band) {
1282 case BAND_VHF:
1283 offset += 750;
1284 break;
1285 case BAND_UHF: /* fall-thru wanted */
1286 default:
1287 offset += 250; break;
1288 }
1289 deb_info("WBD for DiB8000: %d\n", offset);
d44913c1 1290 state->dib8000_ops.set_wbd_ref(fe, offset);
ba3fe3a9 1291
14d24d14 1292 return state->set_param_save(fe);
ba3fe3a9
PB		 1293}
1294
1295static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
1296{
1297 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1298 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
ba3fe3a9
PB		 1299 DIBX000_I2C_INTERFACE_TUNER, 1);
1300
1301 if (adap->id == 0) {
77eed219 1302 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1303 &dib807x_dib0070_config[0]) == NULL)
1304 return -ENODEV;
1305 } else {
77eed219 1306 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1307 &dib807x_dib0070_config[1]) == NULL)
1308 return -ENODEV;
1309 }
1310
77eed219
MK		 1311 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1312 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
ba3fe3a9
PB		 1313 return 0;
1314}
1315
9c783036
OG		 1316static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
1317 u16 pid, int onoff)
f8731f4d 1318{
d44913c1
MCC		 1319 struct dib0700_adapter_state *state = adapter->priv;
1320
1321 return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 1322}
1323
9c783036 1324static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
be9bae10 1325 int onoff)
f8731f4d 1326{
d44913c1
MCC		 1327 struct dib0700_adapter_state *state = adapter->priv;
1328
1329 return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d 1330}
ba3fe3a9
PB		 1331
1332/* STK807x */
1333static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
1334{
d44913c1
MCC		 1335 struct dib0700_adapter_state *state = adap->priv;
1336
1337 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1338 return -ENODEV;
1339
ba3fe3a9
PB		 1340 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1341 msleep(10);
1342 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1343 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1344 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1345
1346 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1347
1348 dib0700_ctrl_clock(adap->dev, 72, 1);
1349
1350 msleep(10);
1351 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1352 msleep(10);
1353 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1354
d44913c1 1355 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
0c32dbd7 1356 0x80, 0);
ba3fe3a9 1357
d44913c1 1358 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1359 &dib807x_dib8000_config[0]);
1360
77eed219 1361 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1362}
1363
1364/* STK807xPVR */
1365static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
1366{
d44913c1
MCC		 1367 struct dib0700_adapter_state *state = adap->priv;
1368
1369 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1370 return -ENODEV;
1371
ba3fe3a9
PB		 1372 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1373 msleep(30);
1374 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1375 msleep(500);
1376 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1377 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1378 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1379
1380 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1381
1382 dib0700_ctrl_clock(adap->dev, 72, 1);
1383
1384 msleep(10);
1385 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1386 msleep(10);
1387 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1388
1389 /* initialize IC 0 */
d44913c1 1390 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
ba3fe3a9 1391
d44913c1 1392 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1393 &dib807x_dib8000_config[0]);
1394
77eed219 1395 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1396}
1397
1398static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
1399{
d44913c1
MCC		 1400 struct dib0700_adapter_state *state = adap->priv;
1401
1402 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1403 return -ENODEV;
1404
ba3fe3a9 1405 /* initialize IC 1 */
d44913c1 1406 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
ba3fe3a9 1407
d44913c1 1408 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
ba3fe3a9
PB		 1409 &dib807x_dib8000_config[1]);
1410
77eed219 1411 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1412}
1413
03245a5e 1414/* STK8096GP */
a685dbbc 1415static struct dibx000_agc_config dib8090_agc_config[2] = {
be9bae10 1416 {
40d1a7c3 1417 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
9c783036 1418 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1419 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1420 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1421 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1422 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1423
40d1a7c3
MCC		 1424 .inv_gain = 787,
1425 .time_stabiliz = 10,
9c783036 1426
40d1a7c3
MCC		 1427 .alpha_level = 0,
1428 .thlock = 118,
9c783036 1429
40d1a7c3
MCC		 1430 .wbd_inv = 0,
1431 .wbd_ref = 3530,
1432 .wbd_sel = 1,
1433 .wbd_alpha = 5,
9c783036 1434
40d1a7c3
MCC		 1435 .agc1_max = 65535,
1436 .agc1_min = 0,
9c783036 1437
40d1a7c3
MCC		 1438 .agc2_max = 65535,
1439 .agc2_min = 0,
9c783036 1440
40d1a7c3
MCC		 1441 .agc1_pt1 = 0,
1442 .agc1_pt2 = 32,
1443 .agc1_pt3 = 114,
1444 .agc1_slope1 = 143,
1445 .agc1_slope2 = 144,
1446 .agc2_pt1 = 114,
1447 .agc2_pt2 = 227,
1448 .agc2_slope1 = 116,
1449 .agc2_slope2 = 117,
1450
1451 .alpha_mant = 28,
1452 .alpha_exp = 26,
1453 .beta_mant = 31,
1454 .beta_exp = 51,
1455
1456 .perform_agc_softsplit = 0,
be9bae10
OG		 1457 },
1458 {
40d1a7c3 1459 .band_caps = BAND_CBAND,
9c783036 1460 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1461 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1462 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1463 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1464 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1465
40d1a7c3
MCC		 1466 .inv_gain = 787,
1467 .time_stabiliz = 10,
9c783036 1468
40d1a7c3
MCC		 1469 .alpha_level = 0,
1470 .thlock = 118,
9c783036 1471
40d1a7c3
MCC		 1472 .wbd_inv = 0,
1473 .wbd_ref = 3530,
1474 .wbd_sel = 1,
1475 .wbd_alpha = 5,
9c783036 1476
40d1a7c3
MCC		 1477 .agc1_max = 0,
1478 .agc1_min = 0,
9c783036 1479
40d1a7c3
MCC		 1480 .agc2_max = 65535,
1481 .agc2_min = 0,
9c783036 1482
40d1a7c3
MCC		 1483 .agc1_pt1 = 0,
1484 .agc1_pt2 = 32,
1485 .agc1_pt3 = 114,
1486 .agc1_slope1 = 143,
1487 .agc1_slope2 = 144,
1488 .agc2_pt1 = 114,
1489 .agc2_pt2 = 227,
1490 .agc2_slope1 = 116,
1491 .agc2_slope2 = 117,
1492
1493 .alpha_mant = 28,
1494 .alpha_exp = 26,
1495 .beta_mant = 31,
1496 .beta_exp = 51,
1497
1498 .perform_agc_softsplit = 0,
be9bae10 1499 }
03245a5e
OG		 1500};
1501
1502static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
40d1a7c3
MCC		 1503 .internal = 54000,
1504 .sampling = 13500,
1505
1506 .pll_prediv = 1,
1507 .pll_ratio = 18,
1508 .pll_range = 3,
1509 .pll_reset = 1,
1510 .pll_bypass = 0,
1511
1512 .enable_refdiv = 0,
1513 .bypclk_div = 0,
1514 .IO_CLK_en_core = 1,
1515 .ADClkSrc = 1,
1516 .modulo = 2,
1517
1518 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
1519
1520 .ifreq = (0 << 25) | 0,
1521 .timf = 20199727,
1522
1523 .xtal_hz = 12000000,
03245a5e
OG		 1524};
1525
1526static int dib8090_get_adc_power(struct dvb_frontend *fe)
1527{
d44913c1
MCC		 1528 struct dvb_usb_adapter *adap = fe->dvb->priv;
1529 struct dib0700_adapter_state *state = adap->priv;
1530
1531 return state->dib8000_ops.get_adc_power(fe, 1);
be9bae10
OG		 1532}
1533
5e9c85d9
OG		 1534static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
1535{
1536 deb_info("AGC control callback: %i\n", restart);
1537 dib0090_dcc_freq(fe, restart);
1538
1539 if (restart == 0) /* before AGC startup */
1540 dib0090_set_dc_servo(fe, 1);
1541}
1542
be9bae10
OG		 1543static struct dib8000_config dib809x_dib8000_config[2] = {
1544 {
1545 .output_mpeg2_in_188_bytes = 1,
1546
1547 .agc_config_count = 2,
1548 .agc = dib8090_agc_config,
5e9c85d9 1549 .agc_control = dib8090_agc_control,
be9bae10
OG		 1550 .pll = &dib8090_pll_config_12mhz,
1551 .tuner_is_baseband = 1,
1552
1553 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1554 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1555 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1556
1557 .hostbus_diversity = 1,
1558 .div_cfg = 0x31,
1559 .output_mode = OUTMODE_MPEG2_FIFO,
1560 .drives = 0x2d98,
1561 .diversity_delay = 48,
1562 .refclksel = 3,
b4d6046e 1563 }, {
be9bae10
OG		 1564 .output_mpeg2_in_188_bytes = 1,
1565
1566 .agc_config_count = 2,
1567 .agc = dib8090_agc_config,
5e9c85d9 1568 .agc_control = dib8090_agc_control,
be9bae10
OG		 1569 .pll = &dib8090_pll_config_12mhz,
1570 .tuner_is_baseband = 1,
1571
1572 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1573 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1574 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1575
1576 .hostbus_diversity = 1,
1577 .div_cfg = 0x31,
1578 .output_mode = OUTMODE_DIVERSITY,
1579 .drives = 0x2d08,
1580 .diversity_delay = 1,
1581 .refclksel = 3,
1582 }
1583};
1584
1585static struct dib0090_wbd_slope dib8090_wbd_table[] = {
1586 /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
1587 { 120, 0, 500, 0, 500, 4 }, /* CBAND */
1588 { 170, 0, 450, 0, 450, 4 }, /* CBAND */
1589 { 380, 48, 373, 28, 259, 6 }, /* VHF */
1590 { 860, 34, 700, 36, 616, 6 }, /* high UHF */
1591 { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
1592};
1593
1594static struct dib0090_config dib809x_dib0090_config = {
1595 .io.pll_bypass = 1,
1596 .io.pll_range = 1,
1597 .io.pll_prediv = 1,
1598 .io.pll_loopdiv = 20,
1599 .io.adc_clock_ratio = 8,
1600 .io.pll_int_loop_filt = 0,
1601 .io.clock_khz = 12000,
1602 .reset = dib80xx_tuner_reset,
1603 .sleep = dib80xx_tuner_sleep,
1604 .clkouttobamse = 1,
1605 .analog_output = 1,
1606 .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
1607 .use_pwm_agc = 1,
1608 .clkoutdrive = 1,
1609 .get_adc_power = dib8090_get_adc_power,
1610 .freq_offset_khz_uhf = -63,
1611 .freq_offset_khz_vhf = -143,
1612 .wbd = dib8090_wbd_table,
1613 .fref_clock_ratio = 6,
1614};
1615
5e9c85d9
OG		 1616static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
1617{
1618 u8 optimal_pll_ratio = 20;
1619 u32 freq_adc, ratio, rest, max = 0;
1620 u8 pll_ratio;
1621
1622 for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
1623 freq_adc = 12 * pll_ratio * (1 << 8) / 16;
1624 ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
1625 rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
1626
1627 if (rest > freq_adc / 2)
1628 rest = freq_adc - rest;
1629 deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
1630 if ((rest > max) && (rest > 717)) {
1631 optimal_pll_ratio = pll_ratio;
1632 max = rest;
1633 }
1634 }
1635 deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
1636
1637 return optimal_pll_ratio;
1638}
1639
14d24d14 1640static int dib8096_set_param_override(struct dvb_frontend *fe)
be9bae10
OG		 1641{
1642 struct dvb_usb_adapter *adap = fe->dvb->priv;
1643 struct dib0700_adapter_state *state = adap->priv;
5e9c85d9
OG		 1644 u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
1645 u16 target, ltgain, rf_gain_limit;
1646 u32 timf;
be9bae10
OG		 1647 int ret = 0;
1648 enum frontend_tune_state tune_state = CT_SHUTDOWN;
5e9c85d9
OG		 1649
1650 switch (band) {
1651 default:
1652 deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
1653 case BAND_VHF:
d44913c1 1654 state->dib8000_ops.set_gpio(fe, 3, 0, 1);
5e9c85d9
OG		 1655 break;
1656 case BAND_UHF:
d44913c1 1657 state->dib8000_ops.set_gpio(fe, 3, 0, 0);
5e9c85d9
OG		 1658 break;
1659 }
be9bae10 1660
14d24d14 1661 ret = state->set_param_save(fe);
be9bae10
OG		 1662 if (ret < 0)
1663 return ret;
1664
5e9c85d9
OG		 1665 if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
1666 deb_info("only 6MHz bandwidth is supported\n");
1667 return -EINVAL;
1668 }
1669
1670 /** Update PLL if needed ratio **/
d44913c1 1671 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
5e9c85d9
OG		 1672
1673 /** Get optimize PLL ratio to remove spurious **/
1674 pll_ratio = dib8090_compute_pll_parameters(fe);
1675 if (pll_ratio == 17)
1676 timf = 21387946;
1677 else if (pll_ratio == 18)
1678 timf = 20199727;
1679 else if (pll_ratio == 19)
1680 timf = 19136583;
1681 else
1682 timf = 18179756;
be9bae10 1683
5e9c85d9 1684 /** Update ratio **/
d44913c1 1685 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
5e9c85d9 1686
d44913c1 1687 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
5e9c85d9
OG		 1688
1689 if (band != BAND_CBAND) {
1690 /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
1691 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
d44913c1 1692 state->dib8000_ops.set_wbd_ref(fe, target);
5e9c85d9 1693 }
be9bae10
OG		 1694
1695 if (band == BAND_CBAND) {
b4d6046e
OG		 1696 deb_info("tuning in CBAND - soft-AGC startup\n");
1697 dib0090_set_tune_state(fe, CT_AGC_START);
5e9c85d9 1698
b4d6046e
OG		 1699 do {
1700 ret = dib0090_gain_control(fe);
1701 msleep(ret);
1702 tune_state = dib0090_get_tune_state(fe);
1703 if (tune_state == CT_AGC_STEP_0)
d44913c1 1704 state->dib8000_ops.set_gpio(fe, 6, 0, 1);
b4d6046e
OG		 1705 else if (tune_state == CT_AGC_STEP_1) {
1706 dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
5e9c85d9 1707 if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
d44913c1 1708 state->dib8000_ops.set_gpio(fe, 6, 0, 0);
b4d6046e
OG		 1709 }
1710 } while (tune_state < CT_AGC_STOP);
5e9c85d9
OG		 1711
1712 deb_info("switching to PWM AGC\n");
b4d6046e 1713 dib0090_pwm_gain_reset(fe);
d44913c1
MCC		 1714 state->dib8000_ops.pwm_agc_reset(fe);
1715 state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
be9bae10 1716 } else {
5e9c85d9 1717 /* for everything else than CBAND we are using standard AGC */
b4d6046e
OG		 1718 deb_info("not tuning in CBAND - standard AGC startup\n");
1719 dib0090_pwm_gain_reset(fe);
be9bae10
OG		 1720 }
1721
1722 return 0;
1723}
1724
1725static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
1726{
1727 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1728 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10 1729
77eed219 1730 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
be9bae10
OG		 1731 return -ENODEV;
1732
77eed219
MK		 1733 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1734 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1735 return 0;
1736}
1737
1738static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
1739{
d44913c1
MCC		 1740 struct dib0700_adapter_state *state = adap->priv;
1741
1742 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1743 return -ENODEV;
1744
be9bae10
OG		 1745 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1746 msleep(10);
1747 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1748 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1749 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1750
1751 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1752
1753 dib0700_ctrl_clock(adap->dev, 72, 1);
1754
1755 msleep(10);
1756 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1757 msleep(10);
1758 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1759
d44913c1 1760 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
be9bae10 1761
d44913c1 1762 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
be9bae10 1763
77eed219 1764 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 1765}
1766
1767static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
1768{
1769 struct dib0700_adapter_state *st = adap->priv;
1770 struct i2c_adapter *tun_i2c;
d44913c1 1771 struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10
OG		 1772
1773 if (fe_slave) {
d44913c1 1774 tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10
OG		 1775 if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
1776 return -ENODEV;
77eed219 1777 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
be9bae10
OG		 1778 fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
1779 }
d44913c1 1780 tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 1781 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
be9bae10
OG		 1782 return -ENODEV;
1783
77eed219
MK		 1784 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1785 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1786
1787 return 0;
1788}
1789
1790static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
1791{
1792 struct dvb_frontend *fe_slave;
d44913c1
MCC		 1793 struct dib0700_adapter_state *state = adap->priv;
1794
1795 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1796 return -ENODEV;
be9bae10
OG		 1797
1798 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
b4d6046e 1799 msleep(20);
be9bae10
OG		 1800 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1801 msleep(1000);
1802 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1803 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1804 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1805
1806 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1807
1808 dib0700_ctrl_clock(adap->dev, 72, 1);
1809
b4d6046e 1810 msleep(20);
be9bae10 1811 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 1812 msleep(20);
be9bae10
OG		 1813 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1814
d44913c1 1815 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
be9bae10 1816
d44913c1 1817 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
77eed219 1818 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 1819 return -ENODEV;
1820
d44913c1
MCC		 1821 /* Needed to increment refcount */
1822 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1823 return -ENODEV;
1824
1825 fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1826 state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 1827
1828 return fe_slave == NULL ? -ENODEV : 0;
1829}
1830
88f3a358
OG		 1831/* TFE8096P */
1832static struct dibx000_agc_config dib8096p_agc_config[2] = {
1833 {
1834 .band_caps = BAND_UHF,
1835 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1836 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1837 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1838 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1839 P_agc_write=0 */
1840 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1841 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1842 | (0 << 4) | (5 << 1) | (0 << 0),
1843
1844 .inv_gain = 684,
1845 .time_stabiliz = 10,
1846
1847 .alpha_level = 0,
1848 .thlock = 118,
1849
1850 .wbd_inv = 0,
1851 .wbd_ref = 1200,
1852 .wbd_sel = 3,
1853 .wbd_alpha = 5,
1854
1855 .agc1_max = 65535,
1856 .agc1_min = 0,
1857
1858 .agc2_max = 32767,
1859 .agc2_min = 0,
1860
1861 .agc1_pt1 = 0,
1862 .agc1_pt2 = 0,
1863 .agc1_pt3 = 105,
1864 .agc1_slope1 = 0,
1865 .agc1_slope2 = 156,
1866 .agc2_pt1 = 105,
1867 .agc2_pt2 = 255,
1868 .agc2_slope1 = 54,
1869 .agc2_slope2 = 0,
1870
1871 .alpha_mant = 28,
1872 .alpha_exp = 26,
1873 .beta_mant = 31,
1874 .beta_exp = 51,
1875
1876 .perform_agc_softsplit = 0,
1877 } , {
1878 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
1879 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1880 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1881 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1882 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1883 P_agc_write=0 */
1884 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1885 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1886 | (0 << 4) | (5 << 1) | (0 << 0),
1887
1888 .inv_gain = 732,
1889 .time_stabiliz = 10,
1890
1891 .alpha_level = 0,
1892 .thlock = 118,
1893
1894 .wbd_inv = 0,
1895 .wbd_ref = 1200,
1896 .wbd_sel = 3,
1897 .wbd_alpha = 5,
1898
1899 .agc1_max = 65535,
1900 .agc1_min = 0,
1901
1902 .agc2_max = 32767,
1903 .agc2_min = 0,
1904
1905 .agc1_pt1 = 0,
1906 .agc1_pt2 = 0,
1907 .agc1_pt3 = 98,
1908 .agc1_slope1 = 0,
1909 .agc1_slope2 = 167,
1910 .agc2_pt1 = 98,
1911 .agc2_pt2 = 255,
1912 .agc2_slope1 = 52,
1913 .agc2_slope2 = 0,
1914
1915 .alpha_mant = 28,
1916 .alpha_exp = 26,
1917 .beta_mant = 31,
1918 .beta_exp = 51,
1919
1920 .perform_agc_softsplit = 0,
1921 }
1922};
1923
1924static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
1925 108000, 13500,
1926 1, 9, 1, 0, 0,
1927 0, 0, 0, 0, 2,
1928 (3 << 14) | (1 << 12) | (524 << 0),
1929 (0 << 25) | 0,
1930 20199729,
1931 12000000,
1932};
1933
1934static struct dib8000_config tfe8096p_dib8000_config = {
1935 .output_mpeg2_in_188_bytes = 1,
1936 .hostbus_diversity = 1,
1937 .update_lna = NULL,
1938
1939 .agc_config_count = 2,
1940 .agc = dib8096p_agc_config,
1941 .pll = &dib8096p_clock_config_12_mhz,
1942
1943 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1944 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1945 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1946
1947 .agc_control = NULL,
1948 .diversity_delay = 48,
1949 .output_mode = OUTMODE_MPEG2_FIFO,
1950 .enMpegOutput = 1,
1951};
1952
1953static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
1954 { 380, 81, 850, 64, 540, 4},
1955 { 860, 51, 866, 21, 375, 4},
1956 {1700, 0, 250, 0, 100, 6},
1957 {2600, 0, 250, 0, 100, 6},
1958 { 0xFFFF, 0, 0, 0, 0, 0},
1959};
1960
d44913c1 1961static struct dib0090_config tfe8096p_dib0090_config = {
88f3a358
OG		 1962 .io.clock_khz = 12000,
1963 .io.pll_bypass = 0,
1964 .io.pll_range = 0,
1965 .io.pll_prediv = 3,
1966 .io.pll_loopdiv = 6,
1967 .io.adc_clock_ratio = 0,
1968 .io.pll_int_loop_filt = 0,
88f3a358
OG		 1969
1970 .freq_offset_khz_uhf = -143,
1971 .freq_offset_khz_vhf = -143,
1972
1973 .get_adc_power = dib8090_get_adc_power,
1974
1975 .clkouttobamse = 1,
1976 .analog_output = 0,
1977
1978 .wbd_vhf_offset = 0,
1979 .wbd_cband_offset = 0,
1980 .use_pwm_agc = 1,
1981 .clkoutdrive = 0,
1982
1983 .fref_clock_ratio = 1,
1984
88f3a358
OG		 1985 .ls_cfg_pad_drv = 0,
1986 .data_tx_drv = 0,
1987 .low_if = NULL,
1988 .in_soc = 1,
1989 .force_cband_input = 0,
1990};
1991
1992struct dibx090p_adc {
1993 u32 freq; /* RF freq MHz */
1994 u32 timf; /* New Timf */
1995 u32 pll_loopdiv; /* New prediv */
1996 u32 pll_prediv; /* New loopdiv */
1997};
1998
5e9c85d9
OG		 1999struct dibx090p_best_adc {
2000 u32 timf;
2001 u32 pll_loopdiv;
2002 u32 pll_prediv;
88f3a358
OG		 2003};
2004
5e9c85d9
OG		 2005static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
2006{
2007 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2008 u16 xtal = 12000;
2009 u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
2010 u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
2011 u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
2012 u32 fdem_min = 66000;
2013 u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
2014 u32 harmonic_id = 0;
2015
2016 adc->timf = 0;
2017 adc->pll_loopdiv = loopdiv;
2018 adc->pll_prediv = prediv;
2019
2020 deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
2021
2022 /* Find Min and Max prediv */
2023 while ((xtal / max_prediv) >= fcp_min)
2024 max_prediv++;
2025
2026 max_prediv--;
2027 min_prediv = max_prediv;
2028 while ((xtal / min_prediv) <= fcp_max) {
2029 min_prediv--;
2030 if (min_prediv == 1)
2031 break;
2032 }
2033 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2034
2035 min_prediv = 1;
2036
2037 for (prediv = min_prediv; prediv < max_prediv; prediv++) {
2038 fcp = xtal / prediv;
2039 if (fcp > fcp_min && fcp < fcp_max) {
2040 for (loopdiv = 1; loopdiv < 64; loopdiv++) {
2041 fmem = ((xtal/prediv) * loopdiv);
2042 fdem = fmem / 2;
2043 fs = fdem / 4;
2044
2045 /* test min/max system restrictions */
2046 if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
2047 spur = 0;
2048 /* test fs harmonics positions */
2049 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
2050 if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
2051 spur = 1;
2052 break;
2053 }
2054 }
2055
2056 if (!spur) {
2057 adc->pll_loopdiv = loopdiv;
2058 adc->pll_prediv = prediv;
2059 adc->timf = (4260880253U / fdem) * (1 << 8);
2060 adc->timf += ((4260880253U % fdem) << 8) / fdem;
2061
2062 deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
2063 break;
2064 }
2065 }
2066 }
2067 }
2068 if (!spur)
2069 break;
2070 }
2071
2072 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
2073 return -EINVAL;
2074 return 0;
2075}
2076
14d24d14 2077static int dib8096p_agc_startup(struct dvb_frontend *fe)
88f3a358
OG		 2078{
2079 struct dvb_usb_adapter *adap = fe->dvb->priv;
2080 struct dib0700_adapter_state *state = adap->priv;
2081 struct dibx000_bandwidth_config pll;
5e9c85d9 2082 struct dibx090p_best_adc adc;
88f3a358 2083 u16 target;
5e9c85d9 2084 int ret;
88f3a358 2085
14d24d14 2086 ret = state->set_param_save(fe);
88f3a358
OG		 2087 if (ret < 0)
2088 return ret;
2089 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2090
2091 dib0090_pwm_gain_reset(fe);
2092 /* dib0090_get_wbd_target is returning any possible
2093 temperature compensated wbd-target */
2094 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
d44913c1 2095 state->dib8000_ops.set_wbd_ref(fe, target);
88f3a358 2096
5e9c85d9
OG		 2097 if (dib8096p_get_best_sampling(fe, &adc) == 0) {
2098 pll.pll_ratio = adc.pll_loopdiv;
2099 pll.pll_prediv = adc.pll_prediv;
88f3a358 2100
5e9c85d9 2101 dib0700_set_i2c_speed(adap->dev, 200);
d44913c1
MCC		 2102 state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
2103 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
5e9c85d9 2104 dib0700_set_i2c_speed(adap->dev, 1000);
88f3a358
OG		 2105 }
2106 return 0;
2107}
2108
2109static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
2110{
5e9c85d9
OG		 2111 struct dib0700_state *st = adap->dev->priv;
2112 u32 fw_version;
d44913c1
MCC		 2113 struct dib0700_adapter_state *state = adap->priv;
2114
2115 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
2116 return -ENODEV;
5e9c85d9
OG		 2117
2118 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2119 if (fw_version >= 0x10200)
2120 st->fw_use_new_i2c_api = 1;
2121
88f3a358
OG		 2122 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
2123 msleep(20);
2124 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2125 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2126 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2127
2128 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2129
2130 dib0700_ctrl_clock(adap->dev, 72, 1);
2131
2132 msleep(20);
2133 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
2134 msleep(20);
2135 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2136
d44913c1 2137 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
88f3a358 2138
d44913c1
MCC		 2139 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
2140 0x80, &tfe8096p_dib8000_config);
88f3a358
OG		 2141
2142 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
2143}
2144
2145static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
2146{
2147 struct dib0700_adapter_state *st = adap->priv;
d44913c1
MCC		 2148 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
2149
2150 tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
2151 tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
2152 tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
88f3a358
OG		 2153
2154 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
2155 &tfe8096p_dib0090_config) == NULL)
2156 return -ENODEV;
2157
d44913c1 2158 st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
88f3a358
OG		 2159
2160 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
2161 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
2162 return 0;
2163}
2164
be9bae10
OG		 2165/* STK9090M */
2166static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
2167{
77eed219 2168 return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
be9bae10
OG		 2169}
2170
2171static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
2172{
77eed219 2173 return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
be9bae10
OG		 2174}
2175
2176static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
2177{
2178 return dib9000_set_gpio(fe, 5, 0, !onoff);
2179}
2180
2181static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
2182{
2183 return dib9000_set_gpio(fe, 0, 0, onoff);
2184}
2185
2186static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
2187{
2188 u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
2189 u8 rb[2];
2190 struct i2c_msg msg[2] = {
b4d6046e
OG		 2191 {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
2192 {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
be9bae10
OG		 2193 };
2194 u8 index_data;
2195
2196 dibx000_i2c_set_speed(i2c, 250);
2197
2198 if (i2c_transfer(i2c, msg, 2) != 2)
2199 return -EIO;
2200
2201 switch (rb[0] << 8 | rb[1]) {
b4d6046e 2202 case 0:
be9bae10
OG		 2203 deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
2204 return -EIO;
b4d6046e 2205 case 1:
be9bae10
OG		 2206 deb_info("Found DiB0170 rev2");
2207 break;
b4d6046e 2208 case 2:
be9bae10
OG		 2209 deb_info("Found DiB0190 rev2");
2210 break;
b4d6046e 2211 default:
be9bae10
OG		 2212 deb_info("DiB01x0 not found");
2213 return -EIO;
b4d6046e 2214 }
be9bae10
OG		 2215
2216 for (index_data = 0; index_data < len; index_data += 2) {
2217 wb[2] = (data[index_data + 1] >> 8) & 0xff;
2218 wb[3] = (data[index_data + 1]) & 0xff;
2219
2220 if (data[index_data] == 0) {
2221 wb[0] = (data[index_data] >> 8) & 0xff;
2222 wb[1] = (data[index_data]) & 0xff;
2223 msg[0].len = 2;
2224 if (i2c_transfer(i2c, msg, 2) != 2)
2225 return -EIO;
2226 wb[2] |= rb[0];
2227 wb[3] |= rb[1] & ~(3 << 4);
2228 }
2229
b4d6046e
OG		 2230 wb[0] = (data[index_data] >> 8)&0xff;
2231 wb[1] = (data[index_data])&0xff;
be9bae10
OG		 2232 msg[0].len = 4;
2233 if (i2c_transfer(i2c, &msg[0], 1) != 1)
2234 return -EIO;
2235 }
2236 return 0;
2237}
2238
2239static struct dib9000_config stk9090m_config = {
2240 .output_mpeg2_in_188_bytes = 1,
2241 .output_mode = OUTMODE_MPEG2_FIFO,
2242 .vcxo_timer = 279620,
2243 .timing_frequency = 20452225,
2244 .demod_clock_khz = 60000,
2245 .xtal_clock_khz = 30000,
2246 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2247 .subband = {
2248 2,
2249 {
2250 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
2251 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
2252 { 0 },
2253 },
2254 },
2255 .gpio_function = {
2256 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2257 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2258 },
2259};
2260
2261static struct dib9000_config nim9090md_config[2] = {
2262 {
2263 .output_mpeg2_in_188_bytes = 1,
2264 .output_mode = OUTMODE_MPEG2_FIFO,
2265 .vcxo_timer = 279620,
2266 .timing_frequency = 20452225,
2267 .demod_clock_khz = 60000,
2268 .xtal_clock_khz = 30000,
2269 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2270 }, {
2271 .output_mpeg2_in_188_bytes = 1,
2272 .output_mode = OUTMODE_DIVERSITY,
2273 .vcxo_timer = 279620,
2274 .timing_frequency = 20452225,
2275 .demod_clock_khz = 60000,
2276 .xtal_clock_khz = 30000,
2277 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2278 .subband = {
2279 2,
2280 {
2281 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
2282 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
2283 { 0 },
2284 },
2285 },
2286 .gpio_function = {
2287 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2288 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2289 },
2290 }
2291};
2292
2293static struct dib0090_config dib9090_dib0090_config = {
2294 .io.pll_bypass = 0,
2295 .io.pll_range = 1,
2296 .io.pll_prediv = 1,
2297 .io.pll_loopdiv = 8,
2298 .io.adc_clock_ratio = 8,
2299 .io.pll_int_loop_filt = 0,
2300 .io.clock_khz = 30000,
2301 .reset = dib90x0_tuner_reset,
2302 .sleep = dib90x0_tuner_sleep,
2303 .clkouttobamse = 0,
2304 .analog_output = 0,
2305 .use_pwm_agc = 0,
2306 .clkoutdrive = 0,
2307 .freq_offset_khz_uhf = 0,
2308 .freq_offset_khz_vhf = 0,
2309};
2310
2311static struct dib0090_config nim9090md_dib0090_config[2] = {
2312 {
2313 .io.pll_bypass = 0,
2314 .io.pll_range = 1,
2315 .io.pll_prediv = 1,
2316 .io.pll_loopdiv = 8,
2317 .io.adc_clock_ratio = 8,
2318 .io.pll_int_loop_filt = 0,
2319 .io.clock_khz = 30000,
2320 .reset = dib90x0_tuner_reset,
2321 .sleep = dib90x0_tuner_sleep,
2322 .clkouttobamse = 1,
2323 .analog_output = 0,
2324 .use_pwm_agc = 0,
2325 .clkoutdrive = 0,
2326 .freq_offset_khz_uhf = 0,
2327 .freq_offset_khz_vhf = 0,
b4d6046e 2328 }, {
be9bae10
OG		 2329 .io.pll_bypass = 0,
2330 .io.pll_range = 1,
2331 .io.pll_prediv = 1,
2332 .io.pll_loopdiv = 8,
2333 .io.adc_clock_ratio = 8,
2334 .io.pll_int_loop_filt = 0,
2335 .io.clock_khz = 30000,
2336 .reset = dib90x0_tuner_reset,
2337 .sleep = dib90x0_tuner_sleep,
2338 .clkouttobamse = 0,
2339 .analog_output = 0,
2340 .use_pwm_agc = 0,
2341 .clkoutdrive = 0,
2342 .freq_offset_khz_uhf = 0,
2343 .freq_offset_khz_vhf = 0,
2344 }
2345};
2346
2347
2348static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
2349{
2350 struct dib0700_adapter_state *state = adap->priv;
2351 struct dib0700_state *st = adap->dev->priv;
2352 u32 fw_version;
2353
2354 /* Make use of the new i2c functions from FW 1.20 */
2355 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2356 if (fw_version >= 0x10200)
2357 st->fw_use_new_i2c_api = 1;
2358 dib0700_set_i2c_speed(adap->dev, 340);
2359
2360 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2361 msleep(20);
be9bae10
OG		 2362 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2363 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2364 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2365 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2366
2367 dib0700_ctrl_clock(adap->dev, 72, 1);
2368
b4d6046e 2369 msleep(20);
be9bae10 2370 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2371 msleep(20);
be9bae10
OG		 2372 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2373
2374 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
2375
2376 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2377 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2378 return -ENODEV;
2379 } else {
2380 deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size);
2381 }
2382 stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
2383 stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
2384
77eed219 2385 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
be9bae10 2386
77eed219 2387 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 2388}
2389
2390static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
2391{
2392 struct dib0700_adapter_state *state = adap->priv;
77eed219 2393 struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2394 u16 data_dib190[10] = {
2395 1, 0x1374,
2396 2, 0x01a2,
2397 7, 0x0020,
2398 0, 0x00ef,
2399 8, 0x0486,
2400 };
2401
77eed219 2402 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
be9bae10 2403 return -ENODEV;
77eed219 2404 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2405 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
2406 return -ENODEV;
d1190024 2407 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2408 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10 2409 return -ENODEV;
b4d6046e 2410 release_firmware(state->frontend_firmware);
be9bae10
OG		 2411 return 0;
2412}
2413
2414static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
2415{
2416 struct dib0700_adapter_state *state = adap->priv;
2417 struct dib0700_state *st = adap->dev->priv;
2418 struct i2c_adapter *i2c;
2419 struct dvb_frontend *fe_slave;
2420 u32 fw_version;
2421
2422 /* Make use of the new i2c functions from FW 1.20 */
2423 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2424 if (fw_version >= 0x10200)
2425 st->fw_use_new_i2c_api = 1;
2426 dib0700_set_i2c_speed(adap->dev, 340);
2427
2428 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2429 msleep(20);
be9bae10
OG		 2430 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2431 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2432 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2433 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2434
2435 dib0700_ctrl_clock(adap->dev, 72, 1);
2436
b4d6046e 2437 msleep(20);
be9bae10 2438 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2439 msleep(20);
be9bae10
OG		 2440 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2441
2442 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2443 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2444 return -EIO;
2445 } else {
2446 deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size);
2447 }
2448 nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
2449 nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
2450 nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
2451 nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
2452
2453 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
77eed219 2454 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
be9bae10 2455
77eed219 2456 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 2457 return -ENODEV;
2458
77eed219 2459 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
be9bae10
OG		 2460 dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
2461
2462 fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
77eed219 2463 dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 2464
2465 return fe_slave == NULL ? -ENODEV : 0;
03245a5e
OG		 2466}
2467
be9bae10
OG		 2468static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
2469{
2470 struct dib0700_adapter_state *state = adap->priv;
2471 struct i2c_adapter *i2c;
2472 struct dvb_frontend *fe_slave;
2473 u16 data_dib190[10] = {
2474 1, 0x5374,
2475 2, 0x01ae,
2476 7, 0x0020,
2477 0, 0x00ef,
2478 8, 0x0406,
2479 };
77eed219
MK		 2480 i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
2481 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
be9bae10 2482 return -ENODEV;
77eed219 2483 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2484 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
2485 return -ENODEV;
d1190024
OG		 2486
2487 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2488 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10
OG		 2489 return -ENODEV;
2490
77eed219 2491 fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10 2492 if (fe_slave != NULL) {
77eed219 2493 i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2494 dib9000_set_i2c_adapter(fe_slave, i2c);
2495
2496 i2c = dib9000_get_tuner_interface(fe_slave);
2497 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
2498 return -ENODEV;
77eed219 2499 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
d1190024 2500 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
be9bae10
OG		 2501 if (dib9000_firmware_post_pll_init(fe_slave) < 0)
2502 return -ENODEV;
2503 }
b4d6046e 2504 release_firmware(state->frontend_firmware);
be9bae10
OG		 2505
2506 return 0;
2507}
2508
2509/* NIM7090 */
5e9c85d9 2510static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
be9bae10
OG		 2511{
2512 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2513
2514 u16 xtal = 12000;
2515 u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
2516 u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
2517 u32 fdem_max = 76000;
2518 u32 fdem_min = 69500;
2519 u32 fcp = 0, fs = 0, fdem = 0;
2520 u32 harmonic_id = 0;
2521
2522 adc->pll_loopdiv = loopdiv;
2523 adc->pll_prediv = prediv;
2524 adc->timf = 0;
2525
2526 deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
2527
2528 /* Find Min and Max prediv */
b4d6046e 2529 while ((xtal/max_prediv) >= fcp_min)
be9bae10
OG		 2530 max_prediv++;
2531
2532 max_prediv--;
2533 min_prediv = max_prediv;
b4d6046e 2534 while ((xtal/min_prediv) <= fcp_max) {
be9bae10 2535 min_prediv--;
b4d6046e 2536 if (min_prediv == 1)
be9bae10
OG		 2537 break;
2538 }
2539 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2540
2541 min_prediv = 2;
2542
b4d6046e 2543 for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
be9bae10 2544 fcp = xtal / prediv;
b4d6046e
OG		 2545 if (fcp > fcp_min && fcp < fcp_max) {
2546 for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
be9bae10
OG		 2547 fdem = ((xtal/prediv) * loopdiv);
2548 fs = fdem / 4;
2549 /* test min/max system restrictions */
2550
b4d6046e 2551 if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
be9bae10
OG		 2552 spur = 0;
2553 /* test fs harmonics positions */
b4d6046e
OG		 2554 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
2555 if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
be9bae10
OG		 2556 spur = 1;
2557 break;
2558 }
2559 }
2560
b4d6046e 2561 if (!spur) {
be9bae10
OG		 2562 adc->pll_loopdiv = loopdiv;
2563 adc->pll_prediv = prediv;
b4d6046e
OG		 2564 adc->timf = 2396745143UL/fdem*(1 << 9);
2565 adc->timf += ((2396745143UL%fdem) << 9)/fdem;
be9bae10
OG		 2566 deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
2567 break;
2568 }
2569 }
2570 }
2571 }
2572 if (!spur)
2573 break;
2574 }
2575
2576
b4d6046e 2577 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
be9bae10 2578 return -EINVAL;
b4d6046e 2579 else
be9bae10
OG		 2580 return 0;
2581}
2582
14d24d14 2583static int dib7090_agc_startup(struct dvb_frontend *fe)
be9bae10
OG		 2584{
2585 struct dvb_usb_adapter *adap = fe->dvb->priv;
2586 struct dib0700_adapter_state *state = adap->priv;
2587 struct dibx000_bandwidth_config pll;
2588 u16 target;
5e9c85d9 2589 struct dibx090p_best_adc adc;
be9bae10
OG		 2590 int ret;
2591
14d24d14 2592 ret = state->set_param_save(fe);
be9bae10
OG		 2593 if (ret < 0)
2594 return ret;
2595
2596 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2597 dib0090_pwm_gain_reset(fe);
6724a2f4 2598 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
8abe4a0a 2599 state->dib7000p_ops.set_wbd_ref(fe, target);
be9bae10 2600
b4d6046e 2601 if (dib7090p_get_best_sampling(fe, &adc) == 0) {
be9bae10
OG		 2602 pll.pll_ratio = adc.pll_loopdiv;
2603 pll.pll_prediv = adc.pll_prediv;
2604
8abe4a0a
MCC		 2605 state->dib7000p_ops.update_pll(fe, &pll);
2606 state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
be9bae10
OG		 2607 }
2608 return 0;
2609}
2610
2e802861
OG		 2611static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
2612{
2613 deb_info("AGC restart callback: %d", restart);
2614 if (restart == 0) /* before AGC startup */
2615 dib0090_set_dc_servo(fe, 1);
2616 return 0;
2617}
2618
f45f513a 2619static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
6724a2f4 2620{
8abe4a0a
MCC		 2621 struct dvb_usb_adapter *adap = fe->dvb->priv;
2622 struct dib0700_adapter_state *state = adap->priv;
2623
f45f513a 2624 deb_info("update LNA: agc global=%i", agc_global);
6724a2f4 2625
f45f513a 2626 if (agc_global < 25000) {
8abe4a0a
MCC		 2627 state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
2628 state->dib7000p_ops.set_agc1_min(fe, 0);
6724a2f4 2629 } else {
8abe4a0a
MCC		 2630 state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
2631 state->dib7000p_ops.set_agc1_min(fe, 32768);
6724a2f4
OG		 2632 }
2633
2634 return 0;
2635}
2636
be9bae10 2637static struct dib0090_wbd_slope dib7090_wbd_table[] = {
b4d6046e
OG		 2638 { 380, 81, 850, 64, 540, 4},
2639 { 860, 51, 866, 21, 375, 4},
2640 {1700, 0, 250, 0, 100, 6},
2641 {2600, 0, 250, 0, 100, 6},
2642 { 0xFFFF, 0, 0, 0, 0, 0},
03245a5e
OG		 2643};
2644
a685dbbc 2645static struct dibx000_agc_config dib7090_agc_config[2] = {
be9bae10
OG		 2646 {
2647 .band_caps = BAND_UHF,
2648 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2649 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2650 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2651
b4d6046e
OG		 2652 .inv_gain = 687,
2653 .time_stabiliz = 10,
be9bae10 2654
b4d6046e
OG		 2655 .alpha_level = 0,
2656 .thlock = 118,
be9bae10 2657
b4d6046e
OG		 2658 .wbd_inv = 0,
2659 .wbd_ref = 1200,
2660 .wbd_sel = 3,
2661 .wbd_alpha = 5,
be9bae10 2662
b4d6046e 2663 .agc1_max = 65535,
59501bb7 2664 .agc1_min = 32768,
be9bae10 2665
b4d6046e
OG		 2666 .agc2_max = 65535,
2667 .agc2_min = 0,
be9bae10 2668
b4d6046e
OG		 2669 .agc1_pt1 = 0,
2670 .agc1_pt2 = 32,
2671 .agc1_pt3 = 114,
2672 .agc1_slope1 = 143,
2673 .agc1_slope2 = 144,
2674 .agc2_pt1 = 114,
2675 .agc2_pt2 = 227,
2676 .agc2_slope1 = 116,
2677 .agc2_slope2 = 117,
be9bae10 2678
b4d6046e
OG		 2679 .alpha_mant = 18,
2680 .alpha_exp = 0,
2681 .beta_mant = 20,
2682 .beta_exp = 59,
be9bae10 2683
b4d6046e 2684 .perform_agc_softsplit = 0,
be9bae10
OG		 2685 } , {
2686 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
2687 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2688 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2689 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2690
b4d6046e
OG		 2691 .inv_gain = 732,
2692 .time_stabiliz = 10,
be9bae10 2693
b4d6046e
OG		 2694 .alpha_level = 0,
2695 .thlock = 118,
be9bae10 2696
b4d6046e
OG		 2697 .wbd_inv = 0,
2698 .wbd_ref = 1200,
2699 .wbd_sel = 3,
2700 .wbd_alpha = 5,
be9bae10 2701
b4d6046e
OG		 2702 .agc1_max = 65535,
2703 .agc1_min = 0,
be9bae10 2704
b4d6046e
OG		 2705 .agc2_max = 65535,
2706 .agc2_min = 0,
be9bae10 2707
b4d6046e
OG		 2708 .agc1_pt1 = 0,
2709 .agc1_pt2 = 0,
2710 .agc1_pt3 = 98,
2711 .agc1_slope1 = 0,
2712 .agc1_slope2 = 167,
7f4d527f 2713 .agc2_pt1 = 98,
b4d6046e
OG		 2714 .agc2_pt2 = 255,
2715 .agc2_slope1 = 104,
2716 .agc2_slope2 = 0,
be9bae10 2717
b4d6046e
OG		 2718 .alpha_mant = 18,
2719 .alpha_exp = 0,
2720 .beta_mant = 20,
2721 .beta_exp = 59,
be9bae10 2722
b4d6046e 2723 .perform_agc_softsplit = 0,
be9bae10
OG		 2724 }
2725};
2726
2727static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
b4d6046e
OG		 2728 60000, 15000,
2729 1, 5, 0, 0, 0,
2730 0, 0, 1, 1, 2,
2731 (3 << 14) | (1 << 12) | (524 << 0),
2732 (0 << 25) | 0,
2733 20452225,
2734 15000000,
be9bae10
OG		 2735};
2736
2737static struct dib7000p_config nim7090_dib7000p_config = {
2738 .output_mpeg2_in_188_bytes = 1,
2739 .hostbus_diversity = 1,
2740 .tuner_is_baseband = 1,
59501bb7 2741 .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
be9bae10
OG		 2742
2743 .agc_config_count = 2,
2744 .agc = dib7090_agc_config,
2745
2746 .bw = &dib7090_clock_config_12_mhz,
2747
2748 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2749 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2750 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2751
2752 .pwm_freq_div = 0,
2753
2754 .agc_control = dib7090_agc_restart,
2755
2756 .spur_protect = 0,
2757 .disable_sample_and_hold = 0,
2758 .enable_current_mirror = 0,
2759 .diversity_delay = 0,
2760
2761 .output_mode = OUTMODE_MPEG2_FIFO,
2762 .enMpegOutput = 1,
2763};
2764
59501bb7
OG		 2765static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
2766{
8abe4a0a
MCC		 2767 struct dvb_usb_adapter *adap = fe->dvb->priv;
2768 struct dib0700_adapter_state *state = adap->priv;
2769
59501bb7
OG		 2770 deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
2771 if (agc_global < 25000) {
8abe4a0a
MCC		 2772 state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
2773 state->dib7000p_ops.set_agc1_min(fe, 0);
59501bb7 2774 } else {
8abe4a0a
MCC		 2775 state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
2776 state->dib7000p_ops.set_agc1_min(fe, 32768);
59501bb7
OG		 2777 }
2778
2779 return 0;
2780}
2781
be9bae10
OG		 2782static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
2783 {
2784 .output_mpeg2_in_188_bytes = 1,
2785 .hostbus_diversity = 1,
2786 .tuner_is_baseband = 1,
59501bb7 2787 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2788
2789 .agc_config_count = 2,
2790 .agc = dib7090_agc_config,
2791
2792 .bw = &dib7090_clock_config_12_mhz,
2793
2794 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2795 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2796 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2797
2798 .pwm_freq_div = 0,
2799
2800 .agc_control = dib7090_agc_restart,
2801
2802 .spur_protect = 0,
2803 .disable_sample_and_hold = 0,
2804 .enable_current_mirror = 0,
2805 .diversity_delay = 0,
2806
2807 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2808 .default_i2c_addr = 0x90,
2809 .enMpegOutput = 1,
b4d6046e 2810 }, {
be9bae10
OG		 2811 .output_mpeg2_in_188_bytes = 1,
2812 .hostbus_diversity = 1,
2813 .tuner_is_baseband = 1,
59501bb7 2814 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2815
2816 .agc_config_count = 2,
2817 .agc = dib7090_agc_config,
2818
2819 .bw = &dib7090_clock_config_12_mhz,
2820
2821 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2822 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2823 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2824
2825 .pwm_freq_div = 0,
2826
2827 .agc_control = dib7090_agc_restart,
2828
2829 .spur_protect = 0,
2830 .disable_sample_and_hold = 0,
2831 .enable_current_mirror = 0,
2832 .diversity_delay = 0,
2833
2834 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2835 .default_i2c_addr = 0x92,
2836 .enMpegOutput = 0,
2837 }
2838};
2839
8abe4a0a 2840static struct dib0090_config nim7090_dib0090_config = {
be9bae10
OG		 2841 .io.clock_khz = 12000,
2842 .io.pll_bypass = 0,
2843 .io.pll_range = 0,
2844 .io.pll_prediv = 3,
2845 .io.pll_loopdiv = 6,
2846 .io.adc_clock_ratio = 0,
2847 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2848
2849 .freq_offset_khz_uhf = 0,
2850 .freq_offset_khz_vhf = 0,
2851
be9bae10
OG		 2852 .clkouttobamse = 1,
2853 .analog_output = 0,
2854
2855 .wbd_vhf_offset = 0,
2856 .wbd_cband_offset = 0,
2857 .use_pwm_agc = 1,
2858 .clkoutdrive = 0,
2859
2860 .fref_clock_ratio = 0,
2861
2862 .wbd = dib7090_wbd_table,
2863
2864 .ls_cfg_pad_drv = 0,
2865 .data_tx_drv = 0,
2866 .low_if = NULL,
2867 .in_soc = 1,
2868};
2869
f45f513a 2870static struct dib7000p_config tfe7790p_dib7000p_config = {
b293f304
OG		 2871 .output_mpeg2_in_188_bytes = 1,
2872 .hostbus_diversity = 1,
2873 .tuner_is_baseband = 1,
f45f513a 2874 .update_lna = tfe7790p_update_lna,
b293f304
OG		 2875
2876 .agc_config_count = 2,
2877 .agc = dib7090_agc_config,
2878
2879 .bw = &dib7090_clock_config_12_mhz,
2880
2881 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2882 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2883 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2884
2885 .pwm_freq_div = 0,
2886
2887 .agc_control = dib7090_agc_restart,
2888
2889 .spur_protect = 0,
2890 .disable_sample_and_hold = 0,
2891 .enable_current_mirror = 0,
2892 .diversity_delay = 0,
2893
2894 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2895 .enMpegOutput = 1,
2896};
2897
8abe4a0a 2898static struct dib0090_config tfe7790p_dib0090_config = {
b293f304
OG		 2899 .io.clock_khz = 12000,
2900 .io.pll_bypass = 0,
2901 .io.pll_range = 0,
2902 .io.pll_prediv = 3,
2903 .io.pll_loopdiv = 6,
2904 .io.adc_clock_ratio = 0,
2905 .io.pll_int_loop_filt = 0,
b293f304
OG		 2906
2907 .freq_offset_khz_uhf = 0,
2908 .freq_offset_khz_vhf = 0,
2909
b293f304
OG		 2910 .clkouttobamse = 1,
2911 .analog_output = 0,
2912
2913 .wbd_vhf_offset = 0,
2914 .wbd_cband_offset = 0,
2915 .use_pwm_agc = 1,
2916 .clkoutdrive = 0,
2917
2918 .fref_clock_ratio = 0,
2919
f45f513a 2920 .wbd = dib7090_wbd_table,
b293f304
OG		 2921
2922 .ls_cfg_pad_drv = 0,
2923 .data_tx_drv = 0,
2924 .low_if = NULL,
2925 .in_soc = 1,
f45f513a
OG		 2926 .force_cband_input = 0,
2927 .is_dib7090e = 0,
b293f304
OG		 2928 .force_crystal_mode = 1,
2929};
2930
8abe4a0a 2931static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
be9bae10
OG		 2932 {
2933 .io.clock_khz = 12000,
2934 .io.pll_bypass = 0,
2935 .io.pll_range = 0,
2936 .io.pll_prediv = 3,
2937 .io.pll_loopdiv = 6,
2938 .io.adc_clock_ratio = 0,
2939 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2940
2941 .freq_offset_khz_uhf = 50,
2942 .freq_offset_khz_vhf = 70,
2943
be9bae10
OG		 2944 .clkouttobamse = 1,
2945 .analog_output = 0,
2946
2947 .wbd_vhf_offset = 0,
2948 .wbd_cband_offset = 0,
2949 .use_pwm_agc = 1,
2950 .clkoutdrive = 0,
2951
2952 .fref_clock_ratio = 0,
2953
2954 .wbd = dib7090_wbd_table,
2955
2956 .ls_cfg_pad_drv = 0,
2957 .data_tx_drv = 0,
2958 .low_if = NULL,
2959 .in_soc = 1,
b4d6046e 2960 }, {
be9bae10
OG		 2961 .io.clock_khz = 12000,
2962 .io.pll_bypass = 0,
2963 .io.pll_range = 0,
2964 .io.pll_prediv = 3,
2965 .io.pll_loopdiv = 6,
2966 .io.adc_clock_ratio = 0,
2967 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2968
2969 .freq_offset_khz_uhf = -50,
2970 .freq_offset_khz_vhf = -70,
2971
be9bae10
OG		 2972 .clkouttobamse = 1,
2973 .analog_output = 0,
2974
2975 .wbd_vhf_offset = 0,
2976 .wbd_cband_offset = 0,
2977 .use_pwm_agc = 1,
2978 .clkoutdrive = 0,
2979
2980 .fref_clock_ratio = 0,
2981
2982 .wbd = dib7090_wbd_table,
2983
2984 .ls_cfg_pad_drv = 0,
2985 .data_tx_drv = 0,
2986 .low_if = NULL,
2987 .in_soc = 1,
2988 }
2989};
2990
2991static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
2992{
8abe4a0a
MCC		 2993 struct dib0700_adapter_state *state = adap->priv;
2994
2995 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
2996 return -ENODEV;
2997
be9bae10 2998 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2999 msleep(20);
be9bae10
OG		 3000 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3001 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3002 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3003 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3004
b4d6046e 3005 msleep(20);
be9bae10 3006 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3007 msleep(20);
be9bae10 3008 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
03245a5e 3009
8abe4a0a
MCC		 3010 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
3011 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
3012 dvb_detach(&state->dib7000p_ops);
be9bae10
OG		 3013 return -ENODEV;
3014 }
8abe4a0a 3015 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
03245a5e 3016
77eed219 3017 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
03245a5e
OG		 3018}
3019
be9bae10 3020static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
03245a5e 3021{
be9bae10 3022 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3023 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3024
3025 nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep,
3026 nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep,
3027 nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3028
77eed219 3029 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
be9bae10 3030 return -ENODEV;
03245a5e 3031
8abe4a0a 3032 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
03245a5e 3033
77eed219
MK		 3034 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3035 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3036 return 0;
03245a5e
OG		 3037}
3038
be9bae10 3039static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
03245a5e 3040{
be9bae10 3041 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3042 struct dib0700_adapter_state *state = adap->priv;
3043
3044 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3045 return -ENODEV;
be9bae10
OG		 3046
3047 /* The TFE7090 requires the dib0700 to not be in master mode */
3048 st->disable_streaming_master_mode = 1;
3049
03245a5e 3050 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3051 msleep(20);
03245a5e
OG		 3052 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3053 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3054 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
03245a5e
OG		 3055 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3056
b4d6046e 3057 msleep(20);
03245a5e 3058 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3059 msleep(20);
03245a5e
OG		 3060 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3061
be9bae10 3062 /* initialize IC 0 */
8abe4a0a
MCC		 3063 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
3064 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
3065 dvb_detach(&state->dib7000p_ops);
be9bae10
OG		 3066 return -ENODEV;
3067 }
03245a5e 3068
be9bae10 3069 dib0700_set_i2c_speed(adap->dev, 340);
8abe4a0a 3070 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
77eed219 3071 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 3072 return -ENODEV;
3073
8abe4a0a 3074 state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
71682520 3075
be9bae10
OG		 3076 return 0;
3077}
3078
3079static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
3080{
3081 struct i2c_adapter *i2c;
8abe4a0a 3082 struct dib0700_adapter_state *state = adap->priv;
be9bae10 3083
77eed219 3084 if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
be9bae10
OG		 3085 err("the master dib7090 has to be initialized first");
3086 return -ENODEV; /* the master device has not been initialized */
3087 }
3088
8abe4a0a
MCC		 3089 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3090 return -ENODEV;
3091
3092 i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
3093 if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
3094 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
3095 dvb_detach(&state->dib7000p_ops);
be9bae10
OG		 3096 return -ENODEV;
3097 }
3098
8abe4a0a 3099 adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
be9bae10
OG		 3100 dib0700_set_i2c_speed(adap->dev, 200);
3101
77eed219 3102 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 3103}
3104
3105static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
3106{
3107 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3108 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3109
3110 tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
3111 tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
3112 tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3113
77eed219 3114 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
be9bae10
OG		 3115 return -ENODEV;
3116
8abe4a0a 3117 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3118
77eed219
MK		 3119 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3120 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10
OG		 3121 return 0;
3122}
3123
3124static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
3125{
3126 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3127 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3128
3129 tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
3130 tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
3131 tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3132
77eed219 3133 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
be9bae10
OG		 3134 return -ENODEV;
3135
8abe4a0a 3136 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3137
77eed219
MK		 3138 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3139 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3140 return 0;
03245a5e 3141}
ba3fe3a9 3142
f45f513a 3143static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
b293f304
OG		 3144{
3145 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3146 struct dib0700_adapter_state *state = adap->priv;
3147
3148 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3149 return -ENODEV;
b293f304 3150
f45f513a 3151 /* The TFE7790P requires the dib0700 to not be in master mode */
b293f304
OG		 3152 st->disable_streaming_master_mode = 1;
3153
3154 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3155 msleep(20);
3156 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3157 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3158 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3159 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3160 msleep(20);
3161 dib0700_ctrl_clock(adap->dev, 72, 1);
3162 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3163 msleep(20);
3164 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3165
8abe4a0a 3166 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
f45f513a 3167 1, 0x10, &tfe7790p_dib7000p_config) != 0) {
8abe4a0a 3168 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
b293f304 3169 __func__);
8abe4a0a 3170 dvb_detach(&state->dib7000p_ops);
b293f304
OG		 3171 return -ENODEV;
3172 }
8abe4a0a 3173 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
f45f513a 3174 0x80, &tfe7790p_dib7000p_config);
b293f304
OG		 3175
3176 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
3177}
3178
f45f513a 3179static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
6724a2f4
OG		 3180{
3181 struct dib0700_adapter_state *st = adap->priv;
3182 struct i2c_adapter *tun_i2c =
8abe4a0a
MCC		 3183 st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3184
3185
3186 tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
3187 tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
3188 tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
6724a2f4
OG		 3189
3190 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
f45f513a 3191 &tfe7790p_dib0090_config) == NULL)
6724a2f4
OG		 3192 return -ENODEV;
3193
8abe4a0a 3194 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6724a2f4
OG		 3195
3196 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3197 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
3198 return 0;
3199}
3200
01373a5c
PB		 3201/* STK7070PD */
3202static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
3203 {
3204 .output_mpeg2_in_188_bytes = 1,
3205
3206 .agc_config_count = 1,
3207 .agc = &dib7070_agc_config,
3208 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3209 .tuner_is_baseband = 1,
3210 .spur_protect = 1,
01373a5c
PB		 3211
3212 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3213 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3214 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3215
3216 .hostbus_diversity = 1,
3217 }, {
3218 .output_mpeg2_in_188_bytes = 1,
3219
3220 .agc_config_count = 1,
3221 .agc = &dib7070_agc_config,
3222 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3223 .tuner_is_baseband = 1,
3224 .spur_protect = 1,
01373a5c
PB		 3225
3226 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3227 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3228 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3229
3230 .hostbus_diversity = 1,
3231 }
3232};
3233
52fd5b2e 3234static void stk7070pd_init(struct dvb_usb_device *dev)
01373a5c 3235{
52fd5b2e 3236 dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
01373a5c 3237 msleep(10);
52fd5b2e
JS		 3238 dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
3239 dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
3240 dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
3241 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
01373a5c 3242
52fd5b2e 3243 dib0700_ctrl_clock(dev, 72, 1);
01373a5c
PB		 3244
3245 msleep(10);
52fd5b2e
JS		 3246 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
3247}
3248
3249static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
3250{
8abe4a0a
MCC		 3251 struct dib0700_adapter_state *state = adap->priv;
3252
3253 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3254 return -ENODEV;
3255
52fd5b2e
JS		 3256 stk7070pd_init(adap->dev);
3257
01373a5c
PB		 3258 msleep(10);
3259 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3260
8abe4a0a 3261 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7 3262 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3263 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 3264 __func__);
8abe4a0a 3265 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 3266 return -ENODEV;
3267 }
01373a5c 3268
8abe4a0a 3269 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
77eed219 3270 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3271}
3272
3273static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
3274{
8abe4a0a
MCC		 3275 struct dib0700_adapter_state *state = adap->priv;
3276
3277 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3278 return -ENODEV;
3279
3280 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
77eed219 3281 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3282}
3283
d43272a4
JS		 3284static int novatd_read_status_override(struct dvb_frontend *fe,
3285 fe_status_t *stat)
3286{
3287 struct dvb_usb_adapter *adap = fe->dvb->priv;
3288 struct dvb_usb_device *dev = adap->dev;
3289 struct dib0700_state *state = dev->priv;
3290 int ret;
3291
3292 ret = state->read_status(fe, stat);
3293
3294 if (!ret)
3295 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
3296 !!(*stat & FE_HAS_LOCK));
3297
3298 return ret;
3299}
3300
3301static int novatd_sleep_override(struct dvb_frontend* fe)
3302{
3303 struct dvb_usb_adapter *adap = fe->dvb->priv;
3304 struct dvb_usb_device *dev = adap->dev;
3305 struct dib0700_state *state = dev->priv;
3306
3307 /* turn off LED */
3308 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
3309
3310 return state->sleep(fe);
3311}
3312
2b05b881
JS		 3313/**
3314 * novatd_frontend_attach - Nova-TD specific attach
3315 *
3316 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
3317 * information purposes.
3318 */
3319static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
3320{
3321 struct dvb_usb_device *dev = adap->dev;
d43272a4 3322 struct dib0700_state *st = dev->priv;
8abe4a0a
MCC		 3323 struct dib0700_adapter_state *state = adap->priv;
3324
3325 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3326 return -ENODEV;
2b05b881
JS		 3327
3328 if (adap->id == 0) {
3329 stk7070pd_init(dev);
3330
3331 /* turn the power LED on, the other two off (just in case) */
3332 dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
3333 dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
3334 dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
3335
8abe4a0a 3336 if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
2b05b881 3337 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3338 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
2b05b881 3339 __func__);
8abe4a0a 3340 dvb_detach(&state->dib7000p_ops);
2b05b881
JS		 3341 return -ENODEV;
3342 }
3343 }
3344
8abe4a0a 3345 adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
2b05b881
JS		 3346 adap->id == 0 ? 0x80 : 0x82,
3347 &stk7070pd_dib7000p_config[adap->id]);
d43272a4
JS		 3348
3349 if (adap->fe_adap[0].fe == NULL)
3350 return -ENODEV;
3351
3352 st->read_status = adap->fe_adap[0].fe->ops.read_status;
3353 adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
3354 st->sleep = adap->fe_adap[0].fe->ops.sleep;
3355 adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
3356
3357 return 0;
2b05b881
JS		 3358}
3359
cb22cb52
DH		 3360/* S5H1411 */
3361static struct s5h1411_config pinnacle_801e_config = {
3362 .output_mode = S5H1411_PARALLEL_OUTPUT,
3363 .gpio = S5H1411_GPIO_OFF,
3364 .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
3365 .qam_if = S5H1411_IF_44000,
3366 .vsb_if = S5H1411_IF_44000,
3367 .inversion = S5H1411_INVERSION_OFF,
3368 .status_mode = S5H1411_DEMODLOCKING
3369};
3370
3371/* Pinnacle PCTV HD Pro 801e GPIOs map:
3372 GPIO0 - currently unknown
3373 GPIO1 - xc5000 tuner reset
3374 GPIO2 - CX25843 sleep
3375 GPIO3 - currently unknown
3376 GPIO4 - currently unknown
3377 GPIO6 - currently unknown
3378 GPIO7 - currently unknown
3379 GPIO9 - currently unknown
3380 GPIO10 - CX25843 reset
3381 */
3382static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
3383{
3384 struct dib0700_state *st = adap->dev->priv;
3385
3386 /* Make use of the new i2c functions from FW 1.20 */
3387 st->fw_use_new_i2c_api = 1;
3388
3389 /* The s5h1411 requires the dib0700 to not be in master mode */
3390 st->disable_streaming_master_mode = 1;
3391
3392 /* All msleep values taken from Windows USB trace */
3393 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
3394 dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
3395 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3396 msleep(400);
3397 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3398 msleep(60);
3399 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3400 msleep(30);
3401 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3402 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3403 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3404 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3405 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
3406 msleep(30);
3407
3408 /* Put the CX25843 to sleep for now since we're in digital mode */
3409 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3410
3411 /* GPIOs are initialized, do the attach */
77eed219 3412 adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
cb22cb52 3413 &adap->dev->i2c_adap);
77eed219 3414 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
cb22cb52
DH		 3415}
3416
767f3b3b
MK		 3417static int dib0700_xc5000_tuner_callback(void *priv, int component,
3418 int command, int arg)
cb22cb52
DH		 3419{
3420 struct dvb_usb_adapter *adap = priv;
3421
79025a9e
DH		 3422 if (command == XC5000_TUNER_RESET) {
3423 /* Reset the tuner */
3424 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
f0f4633a 3425 msleep(10);
79025a9e 3426 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
f0f4633a 3427 msleep(10);
79025a9e
DH		 3428 } else {
3429 err("xc5000: unknown tuner callback command: %d\n", command);
3430 return -EINVAL;
3431 }
cb22cb52
DH		 3432
3433 return 0;
3434}
3435
3436static struct xc5000_config s5h1411_xc5000_tunerconfig = {
3437 .i2c_address = 0x64,
3438 .if_khz = 5380,
cb22cb52
DH		 3439};
3440
3441static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
3442{
79025a9e 3443 /* FIXME: generalize & move to common area */
77eed219 3444 adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
79025a9e 3445
77eed219 3446 return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
767f3b3b 3447 &s5h1411_xc5000_tunerconfig)
cb22cb52
DH		 3448 == NULL ? -ENODEV : 0;
3449}
3450
8d009a0c
DF		 3451static int dib0700_xc4000_tuner_callback(void *priv, int component,
3452 int command, int arg)
3453{
3454 struct dvb_usb_adapter *adap = priv;
8abe4a0a 3455 struct dib0700_adapter_state *state = adap->priv;
8d009a0c
DF		 3456
3457 if (command == XC4000_TUNER_RESET) {
3458 /* Reset the tuner */
8abe4a0a 3459 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
8d009a0c 3460 msleep(10);
8abe4a0a 3461 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
8d009a0c
DF		 3462 } else {
3463 err("xc4000: unknown tuner callback command: %d\n", command);
3464 return -EINVAL;
3465 }
3466
3467 return 0;
3468}
3469
8583fc83
DH		 3470static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
3471 .band_caps = BAND_UHF | BAND_VHF,
3472 .setup = 0x64,
3473 .inv_gain = 0x02c8,
3474 .time_stabiliz = 0x15,
3475 .alpha_level = 0x00,
3476 .thlock = 0x76,
3477 .wbd_inv = 0x01,
3478 .wbd_ref = 0x0b33,
3479 .wbd_sel = 0x00,
3480 .wbd_alpha = 0x02,
3481 .agc1_max = 0x00,
3482 .agc1_min = 0x00,
3483 .agc2_max = 0x9b26,
3484 .agc2_min = 0x26ca,
3485 .agc1_pt1 = 0x00,
3486 .agc1_pt2 = 0x00,
3487 .agc1_pt3 = 0x00,
3488 .agc1_slope1 = 0x00,
3489 .agc1_slope2 = 0x00,
3490 .agc2_pt1 = 0x00,
3491 .agc2_pt2 = 0x80,
3492 .agc2_slope1 = 0x1d,
3493 .agc2_slope2 = 0x1d,
2df12510 3494 .alpha_mant = 0x11,
8583fc83
DH		 3495 .alpha_exp = 0x1b,
3496 .beta_mant = 0x17,
3497 .beta_exp = 0x33,
3498 .perform_agc_softsplit = 0x00,
3499};
3500
f1c78d34 3501static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
341747be 3502 60000, 30000, /* internal, sampling */
3503 1, 8, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass */
3504 0, 0, 1, 1, 0, /* misc: refdiv, bypclk_div, IO_CLK_en_core, */
3505 /* ADClkSrc, modulo */
3506 (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
3507 39370534, /* ifreq */
3508 20452225, /* timf */
3509 30000000 /* xtal */
f1c78d34
DH		 3510};
3511
01f16263
DH		 3512/* FIXME: none of these inputs are validated yet */
3513static struct dib7000p_config pctv_340e_config = {
62956ced 3514 .output_mpeg2_in_188_bytes = 1,
01f16263
DH		 3515
3516 .agc_config_count = 1,
8583fc83 3517 .agc = &stk7700p_7000p_xc4000_agc_config,
f1c78d34 3518 .bw = &stk7700p_xc4000_pll_config,
01f16263 3519
01f16263
DH		 3520 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
3521 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
3522 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
3523};
3524
3525/* PCTV 340e GPIOs map:
3526 dib0700:
3527 GPIO2 - CX25843 sleep
3528 GPIO3 - CS5340 reset
3529 GPIO5 - IRD
3530 GPIO6 - Power Supply
3531 GPIO8 - LNA (1=off 0=on)
3532 GPIO10 - CX25843 reset
3533 dib7000:
3534 GPIO8 - xc4000 reset
3535 */
3536static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
3537{
3538 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3539 struct dib0700_adapter_state *state = adap->priv;
3540
3541 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3542 return -ENODEV;
01f16263
DH		 3543
3544 /* Power Supply on */
3545 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3546 msleep(50);
3547 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3548 msleep(100); /* Allow power supply to settle before probing */
3549
3550 /* cx25843 reset */
3551 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3552 msleep(1); /* cx25843 datasheet say 350us required */
3553 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3554
3555 /* LNA off for now */
3556 dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
3557
3558 /* Put the CX25843 to sleep for now since we're in digital mode */
3559 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3560
3561 /* FIXME: not verified yet */
3562 dib0700_ctrl_clock(adap->dev, 72, 1);
3563
2750d9c3
DH		 3564 msleep(500);
3565
8abe4a0a 3566 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
01f16263 3567 /* Demodulator not found for some reason? */
8abe4a0a 3568 dvb_detach(&state->dib7000p_ops);
01f16263
DH		 3569 return -ENODEV;
3570 }
3571
8abe4a0a 3572 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
01f16263
DH		 3573 &pctv_340e_config);
3574 st->is_dib7000pc = 1;
3575
77eed219 3576 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01f16263
DH		 3577}
3578
8583fc83 3579static struct xc4000_config dib7000p_xc4000_tunerconfig = {
8edeb6eb 3580 .i2c_address = 0x61,
3581 .default_pm = 1,
3582 .dvb_amplitude = 0,
3583 .set_smoothedcvbs = 0,
3584 .if_khz = 5400
8d009a0c
DF		 3585};
3586
3587static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
3588{
59d0c37b 3589 struct i2c_adapter *tun_i2c;
8abe4a0a 3590 struct dib0700_adapter_state *state = adap->priv;
59d0c37b
DH		 3591
3592 /* The xc4000 is not on the main i2c bus */
8abe4a0a 3593 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
59d0c37b
DH		 3594 DIBX000_I2C_INTERFACE_TUNER, 1);
3595 if (tun_i2c == NULL) {
941830c9 3596 printk(KERN_ERR "Could not reach tuner i2c bus\n");
59d0c37b
DH		 3597 return 0;
3598 }
3599
3600 /* Setup the reset callback */
77eed219 3601 adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
8d009a0c 3602
77eed219 3603 return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
8583fc83 3604 &dib7000p_xc4000_tunerconfig)
8d009a0c
DF		 3605 == NULL ? -ENODEV : 0;
3606}
3607
ce904bcb
MK		 3608static struct lgdt3305_config hcw_lgdt3305_config = {
3609 .i2c_addr = 0x0e,
3610 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
3611 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
3612 .tpvalid_polarity = LGDT3305_TP_VALID_LOW,
3613 .deny_i2c_rptr = 0,
3614 .spectral_inversion = 1,
3615 .qam_if_khz = 6000,
3616 .vsb_if_khz = 6000,
3617 .usref_8vsb = 0x0500,
3618};
3619
3620static struct mxl5007t_config hcw_mxl5007t_config = {
3621 .xtal_freq_hz = MxL_XTAL_25_MHZ,
3622 .if_freq_hz = MxL_IF_6_MHZ,
3623 .invert_if = 1,
3624};
3625
3626/* TIGER-ATSC map:
3627 GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
3628 GPIO1 - ANT_SEL (H: VPA, L: MCX)
3629 GPIO4 - SCL2
3630 GPIO6 - EN_TUNER
3631 GPIO7 - SDA2
3632 GPIO10 - DEM_RST
3633
3634 MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
3635 */
3636static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
3637{
3638 struct dib0700_state *st = adap->dev->priv;
3639
3640 /* Make use of the new i2c functions from FW 1.20 */
3641 st->fw_use_new_i2c_api = 1;
3642
3643 st->disable_streaming_master_mode = 1;
3644
3645 /* fe power enable */
3646 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3647 msleep(30);
3648 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3649 msleep(30);
3650
3651 /* demod reset */
3652 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3653 msleep(30);
3654 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3655 msleep(30);
3656 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3657 msleep(30);
3658
77eed219 3659 adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
ce904bcb
MK		 3660 &hcw_lgdt3305_config,
3661 &adap->dev->i2c_adap);
3662
77eed219 3663 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ce904bcb
MK		 3664}
3665
3666static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
3667{
77eed219 3668 return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
ce904bcb
MK		 3669 &adap->dev->i2c_adap, 0x60,
3670 &hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
3671}
3672
3673
01373a5c 3674/* DVB-USB and USB stuff follows */
b7f54910 3675struct usb_device_id dib0700_usb_id_table[] = {
01373a5c 3676/* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) },
6ca8f0b9
AC		 3677 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) },
3678 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) },
3679 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) },
3680 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) },
01373a5c 3681/* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) },
6ca8f0b9
AC		 3682 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) },
3683 { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) },
3684 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) },
3685 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) },
01373a5c 3686/* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) },
6ca8f0b9
AC		 3687 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) },
3688 { USB_DEVICE(USB_VID_TERRATEC,
3689 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) },
3690 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) },
3691 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) },
01373a5c 3692/* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) },
6ca8f0b9
AC		 3693 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) },
3694 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) },
3695 { USB_DEVICE(USB_VID_PINNACLE,
3696 USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) },
3697 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) },
fa3b877e 3698/* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) },
6ca8f0b9
AC		 3699 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U7000) },
3700 { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ARTEC_T14BR) },
3701 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000) },
3702 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3100) },
3703/* 25 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_3) },
3704 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_MYTV_T) },
3705 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_USB_XE) },
3706 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_EXPRESSCARD_320CX) },
3707 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV72E) },
3708/* 30 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73E) },
3709 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_EC372S) },
3710 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) },
dc88807e 3711 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) },
5da4e2c6 3712 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) },
af2a887c 3713/* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
9a0c04a1 3714 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) },
17a370bc 3715 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U8000) },
8751aaa6 3716 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700PH) },
5769743a 3717 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000H) },
cb22cb52 3718/* 40 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E) },
d2fc3bfc 3719 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E_SE) },
bb1b082e 3720 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_EXPRESS) },
db4b2d19
NF		 3721 { USB_DEVICE(USB_VID_TERRATEC,
3722 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2) },
0a6e1ed2 3723 { USB_DEVICE(USB_VID_SONY, USB_PID_SONY_PLAYTV) },
9abb6e6f 3724/* 45 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_PD378S) },
ce904bcb
MK		 3725 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC) },
3726 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC_B210) },
16ba1ee5 3727 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_MC770) },
919a5488 3728 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT) },
513846ec 3729/* 50 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_Dlx) },
f0f4ae76 3730 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_H) },
a9b8fe30
PB		 3731 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T3) },
3732 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T5) },
c53d83cc 3733 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D) },
74b76f21
OG		 3734/* 55 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D_2) },
3735 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73A) },
e414753c
PB		 3736 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV73ESE) },
3737 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV282E) },
d300bd69 3738 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) },
db48138f 3739/* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) },
ba3fe3a9
PB		 3740 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) },
3741 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) },
3bfb317f 3742 { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) },
8a378e85 3743 { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) },
20232c47 3744/* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) },
e414753c 3745 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) },
03245a5e 3746 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096GP) },
84e2f037 3747 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DIVERSITY) },
be9bae10
OG		 3748 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090M) },
3749/* 70 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM8096MD) },
3750 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090MD) },
3751 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM7090) },
3752 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) },
498e677c 3753 { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) },
d1402307 3754/* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) },
8d009a0c 3755 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) },
33fb1681 3756 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
f45f513a
OG		 3757 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790P) },
3758 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
3759/* 80 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_2) },
c859e6ef
MK		 3760 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E) },
3761 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E_SE) },
6ca8f0b9 3762 { 0 } /* Terminating entry */
b7f54910
PB		 3763};
3764MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
3765
3766#define DIB0700_DEFAULT_DEVICE_PROPERTIES \
3767 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
3768 .usb_ctrl = DEVICE_SPECIFIC, \
bdc203e1 3769 .firmware = "dvb-usb-dib0700-1.20.fw", \
b7f54910 3770 .download_firmware = dib0700_download_firmware, \
6958effe 3771 .no_reconnect = 1, \
b7f54910 3772 .size_of_priv = sizeof(struct dib0700_state), \
6958effe
PB		 3773 .i2c_algo = &dib0700_i2c_algo, \
3774 .identify_state = dib0700_identify_state
b7f54910
PB		 3775
3776#define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
3777 .streaming_ctrl = dib0700_streaming_ctrl, \
3778 .stream = { \
3779 .type = USB_BULK, \
3780 .count = 4, \
3781 .endpoint = ep, \
3782 .u = { \
3783 .bulk = { \
3784 .buffersize = 39480, \
3785 } \
3786 } \
3787 }
3788
3789struct dvb_usb_device_properties dib0700_devices[] = {
3790 {
3791 DIB0700_DEFAULT_DEVICE_PROPERTIES,
3792
3793 .num_adapters = 1,
3794 .adapter = {
3795 {
77eed219
MK		 3796 .num_frontends = 1,
3797 .fe = {{
f8731f4d
OG		 3798 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3799 .pid_filter_count = 32,
e192a7cf
OG		 3800 .pid_filter = stk7700p_pid_filter,
3801 .pid_filter_ctrl = stk7700p_pid_filter_ctrl,
b7f54910
PB		 3802 .frontend_attach = stk7700p_frontend_attach,
3803 .tuner_attach = stk7700p_tuner_attach,
3804
3805 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3806 }},
b7f54910
PB		 3807 },
3808 },
3809
67053a40 3810 .num_device_descs = 8,
b7f54910
PB		 3811 .devices = {
3812 { "DiBcom STK7700P reference design",
49a1376c 3813 { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] },
b7f54910
PB		 3814 { NULL },
3815 },
3816 { "Hauppauge Nova-T Stick",
f9aeba45 3817 { &dib0700_usb_id_table[4], &dib0700_usb_id_table[9], NULL },
b7f54910
PB		 3818 { NULL },
3819 },
3820 { "AVerMedia AVerTV DVB-T Volar",
ced8feca 3821 { &dib0700_usb_id_table[5], &dib0700_usb_id_table[10] },
b7f54910
PB		 3822 { NULL },
3823 },
49a1376c 3824 { "Compro Videomate U500",
1f8ca4b3 3825 { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] },
49a1376c 3826 { NULL },
0ce215e1
HS		 3827 },
3828 { "Uniwill STK7700P based (Hama and others)",
3829 { &dib0700_usb_id_table[7], NULL },
3830 { NULL },
8637a875
MK		 3831 },
3832 { "Leadtek Winfast DTV Dongle (STK7700P based)",
1e13c8f0 3833 { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
8637a875 3834 { NULL },
fa3b877e
JS		 3835 },
3836 { "AVerMedia AVerTV DVB-T Express",
3837 { &dib0700_usb_id_table[20] },
3838 { NULL },
67053a40 3839 },
67053a40 3840 { "Gigabyte U7000",
3841 { &dib0700_usb_id_table[21], NULL },
3842 { NULL },
49a1376c 3843 }
b1139e35
DS		 3844 },
3845
72b39310 3846 .rc.core = {
f72a27b8 3847 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3848 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 3849 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 3850 .allowed_protos = RC_BIT_RC5 |
3851 RC_BIT_RC6_MCE |
3852 RC_BIT_NEC,
d8b4b582 3853 .change_protocol = dib0700_change_protocol,
f72a27b8 3854 },
b7f54910
PB		 3855 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
3856
3857 .num_adapters = 2,
3858 .adapter = {
3859 {
77eed219
MK		 3860 .num_frontends = 1,
3861 .fe = {{
b7f54910
PB		 3862 .frontend_attach = bristol_frontend_attach,
3863 .tuner_attach = bristol_tuner_attach,
3864
3865 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3866 }},
b7f54910 3867 }, {
77eed219
MK		 3868 .num_frontends = 1,
3869 .fe = {{
b7f54910
PB		 3870 .frontend_attach = bristol_frontend_attach,
3871 .tuner_attach = bristol_tuner_attach,
3872
3873 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 3874 }},
b7f54910
PB		 3875 }
3876 },
3877
3878 .num_device_descs = 1,
3879 .devices = {
3880 { "Hauppauge Nova-T 500 Dual DVB-T",
49a1376c 3881 { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL },
b7f54910
PB		 3882 { NULL },
3883 },
82f3d559
JG		 3884 },
3885
72b39310 3886 .rc.core = {
f72a27b8 3887 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3888 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 3889 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 3890 .allowed_protos = RC_BIT_RC5 |
3891 RC_BIT_RC6_MCE |
3892 RC_BIT_NEC,
d8b4b582 3893 .change_protocol = dib0700_change_protocol,
f72a27b8 3894 },
54d75eba
OD		 3895 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
3896
3897 .num_adapters = 2,
3898 .adapter = {
3899 {
77eed219
MK		 3900 .num_frontends = 1,
3901 .fe = {{
f8731f4d
OG		 3902 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3903 .pid_filter_count = 32,
3904 .pid_filter = stk70x0p_pid_filter,
3905 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 3906 .frontend_attach = stk7700d_frontend_attach,
3907 .tuner_attach = stk7700d_tuner_attach,
3908
3909 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3910 }},
54d75eba 3911 }, {
77eed219
MK		 3912 .num_frontends = 1,
3913 .fe = {{
f8731f4d
OG		 3914 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3915 .pid_filter_count = 32,
3916 .pid_filter = stk70x0p_pid_filter,
3917 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 3918 .frontend_attach = stk7700d_frontend_attach,
3919 .tuner_attach = stk7700d_tuner_attach,
3920
3921 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 3922 }},
54d75eba
OD		 3923 }
3924 },
3925
200e861c 3926 .num_device_descs = 5,
54d75eba
OD		 3927 .devices = {
3928 { "Pinnacle PCTV 2000e",
3929 { &dib0700_usb_id_table[11], NULL },
3930 { NULL },
3931 },
3932 { "Terratec Cinergy DT XS Diversity",
3933 { &dib0700_usb_id_table[12], NULL },
3934 { NULL },
3935 },
faebb914 3936 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
54d75eba
OD		 3937 { &dib0700_usb_id_table[13], NULL },
3938 { NULL },
3939 },
01373a5c 3940 { "DiBcom STK7700D reference design",
b6884a17
PB		 3941 { &dib0700_usb_id_table[14], NULL },
3942 { NULL },
bb1b082e 3943 },
200e861c
JW		 3944 { "YUAN High-Tech DiBcom STK7700D",
3945 { &dib0700_usb_id_table[55], NULL },
3946 { NULL },
3947 },
bb1b082e 3948
54d75eba 3949 },
82f3d559 3950
72b39310 3951 .rc.core = {
f72a27b8 3952 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3953 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 3954 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 3955 .allowed_protos = RC_BIT_RC5 |
3956 RC_BIT_RC6_MCE |
3957 RC_BIT_NEC,
d8b4b582 3958 .change_protocol = dib0700_change_protocol,
f72a27b8 3959 },
132c3188
DG		 3960 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
3961
3962 .num_adapters = 1,
3963 .adapter = {
3964 {
77eed219
MK		 3965 .num_frontends = 1,
3966 .fe = {{
f8731f4d
OG		 3967 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3968 .pid_filter_count = 32,
3969 .pid_filter = stk70x0p_pid_filter,
3970 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
132c3188
DG		 3971 .frontend_attach = stk7700P2_frontend_attach,
3972 .tuner_attach = stk7700d_tuner_attach,
3973
3974 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3975 }},
132c3188
DG		 3976 },
3977 },
3978
bb1b082e 3979 .num_device_descs = 3,
132c3188
DG		 3980 .devices = {
3981 { "ASUS My Cinema U3000 Mini DVBT Tuner",
3982 { &dib0700_usb_id_table[23], NULL },
3983 { NULL },
3984 },
6ca8f0b9
AC		 3985 { "Yuan EC372S",
3986 { &dib0700_usb_id_table[31], NULL },
3987 { NULL },
bb1b082e
YA		 3988 },
3989 { "Terratec Cinergy T Express",
3990 { &dib0700_usb_id_table[42], NULL },
3991 { NULL },
6ca8f0b9 3992 }
48aa7391
CR		 3993 },
3994
72b39310 3995 .rc.core = {
f72a27b8 3996 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3997 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 3998 .module_name = "dib0700",
0ffd1ab3 3999 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4000 .allowed_protos = RC_BIT_RC5 |
4001 RC_BIT_RC6_MCE |
4002 RC_BIT_NEC,
d8b4b582 4003 .change_protocol = dib0700_change_protocol,
f72a27b8 4004 },
01373a5c
PB		 4005 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4006
4007 .num_adapters = 1,
4008 .adapter = {
4009 {
77eed219
MK		 4010 .num_frontends = 1,
4011 .fe = {{
f8731f4d
OG		 4012 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4013 .pid_filter_count = 32,
4014 .pid_filter = stk70x0p_pid_filter,
4015 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
01373a5c
PB		 4016 .frontend_attach = stk7070p_frontend_attach,
4017 .tuner_attach = dib7070p_tuner_attach,
4018
4019 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4020 }},
01373a5c
PB		 4021 .size_of_priv = sizeof(struct dib0700_adapter_state),
4022 },
4023 },
4024
0bc9d39b 4025 .num_device_descs = 12,
01373a5c
PB		 4026 .devices = {
4027 { "DiBcom STK7070P reference design",
4028 { &dib0700_usb_id_table[15], NULL },
4029 { NULL },
4030 },
4031 { "Pinnacle PCTV DVB-T Flash Stick",
4032 { &dib0700_usb_id_table[16], NULL },
4033 { NULL },
4034 },
7999a816
YL		 4035 { "Artec T14BR DVB-T",
4036 { &dib0700_usb_id_table[22], NULL },
4037 { NULL },
132c3188
DG		 4038 },
4039 { "ASUS My Cinema U3100 Mini DVBT Tuner",
4040 { &dib0700_usb_id_table[24], NULL },
4041 { NULL },
4042 },
c7637b1a
TT		 4043 { "Hauppauge Nova-T Stick",
4044 { &dib0700_usb_id_table[25], NULL },
4045 { NULL },
4046 },
13b83b5d
DS		 4047 { "Hauppauge Nova-T MyTV.t",
4048 { &dib0700_usb_id_table[26], NULL },
4049 { NULL },
4050 },
6ca8f0b9
AC		 4051 { "Pinnacle PCTV 72e",
4052 { &dib0700_usb_id_table[29], NULL },
4053 { NULL },
4054 },
4055 { "Pinnacle PCTV 73e",
4056 { &dib0700_usb_id_table[30], NULL },
4057 { NULL },
4058 },
919a5488
KF		 4059 { "Elgato EyeTV DTT",
4060 { &dib0700_usb_id_table[49], NULL },
4061 { NULL },
4062 },
9abb6e6f
PT		 4063 { "Yuan PD378S",
4064 { &dib0700_usb_id_table[45], NULL },
4065 { NULL },
4066 },
513846ec
AS		 4067 { "Elgato EyeTV Dtt Dlx PD378S",
4068 { &dib0700_usb_id_table[50], NULL },
4069 { NULL },
4070 },
0bc9d39b 4071 { "Elgato EyeTV DTT rev. 2",
f45f513a 4072 { &dib0700_usb_id_table[80], NULL },
0bc9d39b
GG		 4073 { NULL },
4074 },
c7637b1a
TT		 4075 },
4076
72b39310 4077 .rc.core = {
f72a27b8 4078 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4079 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4080 .module_name = "dib0700",
0ffd1ab3 4081 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4082 .allowed_protos = RC_BIT_RC5 |
4083 RC_BIT_RC6_MCE |
4084 RC_BIT_NEC,
d8b4b582 4085 .change_protocol = dib0700_change_protocol,
f72a27b8 4086 },
74b76f21
OG		 4087 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4088
4089 .num_adapters = 1,
4090 .adapter = {
4091 {
77eed219
MK		 4092 .num_frontends = 1,
4093 .fe = {{
648732fc
MCC		 4094 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4095 .pid_filter_count = 32,
4096 .pid_filter = stk70x0p_pid_filter,
4097 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
74b76f21
OG		 4098 .frontend_attach = stk7070p_frontend_attach,
4099 .tuner_attach = dib7070p_tuner_attach,
4100
4101 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4102 }},
74b76f21
OG		 4103 .size_of_priv = sizeof(struct dib0700_adapter_state),
4104 },
4105 },
4106
20232c47 4107 .num_device_descs = 3,
74b76f21
OG		 4108 .devices = {
4109 { "Pinnacle PCTV 73A",
4110 { &dib0700_usb_id_table[56], NULL },
4111 { NULL },
4112 },
4113 { "Pinnacle PCTV 73e SE",
20232c47 4114 { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL },
74b76f21
OG		 4115 { NULL },
4116 },
4117 { "Pinnacle PCTV 282e",
20232c47 4118 { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL },
74b76f21
OG		 4119 { NULL },
4120 },
4121 },
4122
72b39310 4123 .rc.core = {
f72a27b8 4124 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4125 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4126 .module_name = "dib0700",
0ffd1ab3 4127 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4128 .allowed_protos = RC_BIT_RC5 |
4129 RC_BIT_RC6_MCE |
4130 RC_BIT_NEC,
d8b4b582 4131 .change_protocol = dib0700_change_protocol,
f72a27b8 4132 },
01373a5c
PB		 4133 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4134
4135 .num_adapters = 2,
4136 .adapter = {
4137 {
77eed219
MK		 4138 .num_frontends = 1,
4139 .fe = {{
f8731f4d
OG		 4140 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4141 .pid_filter_count = 32,
4142 .pid_filter = stk70x0p_pid_filter,
4143 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4144 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4145 .tuner_attach = dib7070p_tuner_attach,
4146
4147 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4148 }},
01373a5c
PB		 4149 .size_of_priv = sizeof(struct dib0700_adapter_state),
4150 }, {
77eed219
MK		 4151 .num_frontends = 1,
4152 .fe = {{
f8731f4d
OG		 4153 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4154 .pid_filter_count = 32,
4155 .pid_filter = stk70x0p_pid_filter,
4156 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4157 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4158 .tuner_attach = dib7070p_tuner_attach,
4159
4160 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4161 }},
01373a5c
PB		 4162 .size_of_priv = sizeof(struct dib0700_adapter_state),
4163 }
4164 },
4165
c859e6ef 4166 .num_device_descs = 3,
9b6ba57b
JS		 4167 .devices = {
4168 { "Hauppauge Nova-TD Stick (52009)",
4169 { &dib0700_usb_id_table[35], NULL },
4170 { NULL },
4171 },
c859e6ef
MK		 4172 { "PCTV 2002e",
4173 { &dib0700_usb_id_table[81], NULL },
4174 { NULL },
4175 },
4176 { "PCTV 2002e SE",
4177 { &dib0700_usb_id_table[82], NULL },
4178 { NULL },
4179 },
9b6ba57b
JS		 4180 },
4181
4182 .rc.core = {
4183 .rc_interval = DEFAULT_RC_INTERVAL,
4184 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4185 .module_name = "dib0700",
4186 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4187 .allowed_protos = RC_BIT_RC5 |
4188 RC_BIT_RC6_MCE |
4189 RC_BIT_NEC,
9b6ba57b
JS		 4190 .change_protocol = dib0700_change_protocol,
4191 },
4192 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4193
4194 .num_adapters = 2,
4195 .adapter = {
4196 {
4197 .num_frontends = 1,
4198 .fe = {{
4199 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4200 .pid_filter_count = 32,
4201 .pid_filter = stk70x0p_pid_filter,
4202 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4203 .frontend_attach = stk7070pd_frontend_attach0,
4204 .tuner_attach = dib7070p_tuner_attach,
4205
4206 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4207 }},
4208 .size_of_priv = sizeof(struct dib0700_adapter_state),
4209 }, {
4210 .num_frontends = 1,
4211 .fe = {{
4212 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4213 .pid_filter_count = 32,
4214 .pid_filter = stk70x0p_pid_filter,
4215 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4216 .frontend_attach = stk7070pd_frontend_attach1,
4217 .tuner_attach = dib7070p_tuner_attach,
4218
4219 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4220 }},
4221 .size_of_priv = sizeof(struct dib0700_adapter_state),
4222 }
4223 },
4224
4225 .num_device_descs = 5,
01373a5c
PB		 4226 .devices = {
4227 { "DiBcom STK7070PD reference design",
4228 { &dib0700_usb_id_table[17], NULL },
4229 { NULL },
4230 },
4231 { "Pinnacle PCTV Dual DVB-T Diversity Stick",
4232 { &dib0700_usb_id_table[18], NULL },
4233 { NULL },
d01eb2dc 4234 },
9a0c04a1
MK		 4235 { "Hauppauge Nova-TD-500 (84xxx)",
4236 { &dib0700_usb_id_table[36], NULL },
4237 { NULL },
db4b2d19 4238 },
a9b8fe30
PB		 4239 { "Terratec Cinergy DT USB XS Diversity/ T5",
4240 { &dib0700_usb_id_table[43],
4241 &dib0700_usb_id_table[53], NULL},
db4b2d19 4242 { NULL },
0a6e1ed2 4243 },
4244 { "Sony PlayTV",
4245 { &dib0700_usb_id_table[44], NULL },
4246 { NULL },
84e2f037 4247 },
5af935cc
MCC		 4248 },
4249
4250 .rc.core = {
4251 .rc_interval = DEFAULT_RC_INTERVAL,
4252 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4253 .module_name = "dib0700",
0ffd1ab3 4254 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4255 .allowed_protos = RC_BIT_RC5 |
4256 RC_BIT_RC6_MCE |
4257 RC_BIT_NEC,
d8b4b582 4258 .change_protocol = dib0700_change_protocol,
5af935cc
MCC		 4259 },
4260 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4261
4262 .num_adapters = 2,
4263 .adapter = {
4264 {
77eed219
MK		 4265 .num_frontends = 1,
4266 .fe = {{
5af935cc
MCC		 4267 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4268 .pid_filter_count = 32,
4269 .pid_filter = stk70x0p_pid_filter,
4270 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4271 .frontend_attach = stk7070pd_frontend_attach0,
4272 .tuner_attach = dib7070p_tuner_attach,
4273
4274 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4275 }},
5af935cc
MCC		 4276 .size_of_priv = sizeof(struct dib0700_adapter_state),
4277 }, {
77eed219
MK		 4278 .num_frontends = 1,
4279 .fe = {{
5af935cc
MCC		 4280 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4281 .pid_filter_count = 32,
4282 .pid_filter = stk70x0p_pid_filter,
4283 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4284 .frontend_attach = stk7070pd_frontend_attach1,
4285 .tuner_attach = dib7070p_tuner_attach,
4286
4287 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4288 }},
5af935cc
MCC		 4289 .size_of_priv = sizeof(struct dib0700_adapter_state),
4290 }
4291 },
4292
4293 .num_device_descs = 1,
4294 .devices = {
84e2f037
MM		 4295 { "Elgato EyeTV Diversity",
4296 { &dib0700_usb_id_table[68], NULL },
4297 { NULL },
4298 },
c985a8dc 4299 },
f72a27b8 4300
72b39310 4301 .rc.core = {
f72a27b8 4302 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4303 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4304 .module_name = "dib0700",
0ffd1ab3 4305 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4306 .allowed_protos = RC_BIT_RC5 |
4307 RC_BIT_RC6_MCE |
4308 RC_BIT_NEC,
d8b4b582 4309 .change_protocol = dib0700_change_protocol,
f72a27b8 4310 },
6ca8f0b9
AC		 4311 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4312
4313 .num_adapters = 1,
4314 .adapter = {
4315 {
77eed219
MK		 4316 .num_frontends = 1,
4317 .fe = {{
f8731f4d
OG		 4318 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4319 .pid_filter_count = 32,
4320 .pid_filter = stk70x0p_pid_filter,
4321 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
6ca8f0b9
AC		 4322 .frontend_attach = stk7700ph_frontend_attach,
4323 .tuner_attach = stk7700ph_tuner_attach,
4324
4325 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4326 }},
6ca8f0b9
AC		 4327 .size_of_priv = sizeof(struct
4328 dib0700_adapter_state),
4329 },
4330 },
4331
c53d83cc 4332 .num_device_descs = 9,
6ca8f0b9
AC		 4333 .devices = {
4334 { "Terratec Cinergy HT USB XE",
4335 { &dib0700_usb_id_table[27], NULL },
4336 { NULL },
4337 },
4338 { "Pinnacle Expresscard 320cx",
4339 { &dib0700_usb_id_table[28], NULL },
4340 { NULL },
4341 },
4342 { "Terratec Cinergy HT Express",
4343 { &dib0700_usb_id_table[32], NULL },
4344 { NULL },
4345 },
17a370bc
FT		 4346 { "Gigabyte U8000-RH",
4347 { &dib0700_usb_id_table[37], NULL },
4348 { NULL },
4349 },
8751aaa6
DON		 4350 { "YUAN High-Tech STK7700PH",
4351 { &dib0700_usb_id_table[38], NULL },
4352 { NULL },
4353 },
5769743a
AC		 4354 { "Asus My Cinema-U3000Hybrid",
4355 { &dib0700_usb_id_table[39], NULL },
4356 { NULL },
4357 },
16ba1ee5
XL		 4358 { "YUAN High-Tech MC770",
4359 { &dib0700_usb_id_table[48], NULL },
4360 { NULL },
4361 },
f0f4ae76 4362 { "Leadtek WinFast DTV Dongle H",
4363 { &dib0700_usb_id_table[51], NULL },
4364 { NULL },
4365 },
c53d83cc
PH		 4366 { "YUAN High-Tech STK7700D",
4367 { &dib0700_usb_id_table[54], NULL },
4368 { NULL },
4369 },
6ca8f0b9 4370 },
f72a27b8 4371
72b39310 4372 .rc.core = {
f72a27b8 4373 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4374 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4375 .module_name = "dib0700",
0ffd1ab3 4376 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4377 .allowed_protos = RC_BIT_RC5 |
4378 RC_BIT_RC6_MCE |
4379 RC_BIT_NEC,
d8b4b582 4380 .change_protocol = dib0700_change_protocol,
f72a27b8 4381 },
cb22cb52
DH		 4382 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4383 .num_adapters = 1,
4384 .adapter = {
4385 {
77eed219
MK		 4386 .num_frontends = 1,
4387 .fe = {{
cb22cb52
DH		 4388 .frontend_attach = s5h1411_frontend_attach,
4389 .tuner_attach = xc5000_tuner_attach,
4390
4391 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4392 }},
cb22cb52
DH		 4393 .size_of_priv = sizeof(struct
4394 dib0700_adapter_state),
4395 },
4396 },
4397
d2fc3bfc 4398 .num_device_descs = 2,
cb22cb52
DH		 4399 .devices = {
4400 { "Pinnacle PCTV HD Pro USB Stick",
4401 { &dib0700_usb_id_table[40], NULL },
4402 { NULL },
4403 },
d2fc3bfc
DH		 4404 { "Pinnacle PCTV HD USB Stick",
4405 { &dib0700_usb_id_table[41], NULL },
4406 { NULL },
4407 },
cb22cb52 4408 },
72b39310
MCC		 4409
4410 .rc.core = {
f72a27b8 4411 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4412 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4413 .module_name = "dib0700",
0ffd1ab3 4414 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4415 .allowed_protos = RC_BIT_RC5 |
4416 RC_BIT_RC6_MCE |
4417 RC_BIT_NEC,
d8b4b582 4418 .change_protocol = dib0700_change_protocol,
f72a27b8 4419 },
ce904bcb
MK		 4420 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4421 .num_adapters = 1,
4422 .adapter = {
4423 {
77eed219
MK		 4424 .num_frontends = 1,
4425 .fe = {{
ce904bcb
MK		 4426 .frontend_attach = lgdt3305_frontend_attach,
4427 .tuner_attach = mxl5007t_tuner_attach,
4428
4429 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4430 }},
ce904bcb
MK		 4431 .size_of_priv = sizeof(struct
4432 dib0700_adapter_state),
4433 },
4434 },
4435
4436 .num_device_descs = 2,
4437 .devices = {
4438 { "Hauppauge ATSC MiniCard (B200)",
4439 { &dib0700_usb_id_table[46], NULL },
4440 { NULL },
4441 },
4442 { "Hauppauge ATSC MiniCard (B210)",
4443 { &dib0700_usb_id_table[47], NULL },
4444 { NULL },
4445 },
4446 },
d300bd69
OG		 4447 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4448
4449 .num_adapters = 1,
4450 .adapter = {
4451 {
77eed219
MK		 4452 .num_frontends = 1,
4453 .fe = {{
f8731f4d
OG		 4454 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4455 .pid_filter_count = 32,
4456 .pid_filter = stk70x0p_pid_filter,
4457 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
90e12cec 4458 .frontend_attach = stk7770p_frontend_attach,
d300bd69
OG		 4459 .tuner_attach = dib7770p_tuner_attach,
4460
4461 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4462 }},
d300bd69 4463 .size_of_priv =
db48138f 4464 sizeof(struct dib0700_adapter_state),
d300bd69
OG		 4465 },
4466 },
4467
d1402307 4468 .num_device_descs = 4,
d300bd69
OG		 4469 .devices = {
4470 { "DiBcom STK7770P reference design",
4471 { &dib0700_usb_id_table[59], NULL },
4472 { NULL },
4473 },
1e13c8f0
PB		 4474 { "Terratec Cinergy T USB XXS (HD)/ T3",
4475 { &dib0700_usb_id_table[33],
4476 &dib0700_usb_id_table[52],
4477 &dib0700_usb_id_table[60], NULL},
db48138f
PB		 4478 { NULL },
4479 },
498e677c
LMF		 4480 { "TechniSat AirStar TeleStick 2",
4481 { &dib0700_usb_id_table[74], NULL },
4482 { NULL },
4483 },
d1402307
SE		 4484 { "Medion CTX1921 DVB-T USB",
4485 { &dib0700_usb_id_table[75], NULL },
4486 { NULL },
4487 },
d300bd69 4488 },
72b39310
MCC		 4489
4490 .rc.core = {
f72a27b8 4491 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4492 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4493 .module_name = "dib0700",
0ffd1ab3 4494 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4495 .allowed_protos = RC_BIT_RC5 |
4496 RC_BIT_RC6_MCE |
4497 RC_BIT_NEC,
d8b4b582 4498 .change_protocol = dib0700_change_protocol,
f72a27b8 4499 },
ba3fe3a9
PB		 4500 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4501 .num_adapters = 1,
4502 .adapter = {
4503 {
77eed219
MK		 4504 .num_frontends = 1,
4505 .fe = {{
f8731f4d
OG		 4506 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4507 .pid_filter_count = 32,
03245a5e
OG		 4508 .pid_filter = stk80xx_pid_filter,
4509 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4510 .frontend_attach = stk807x_frontend_attach,
4511 .tuner_attach = dib807x_tuner_attach,
4512
4513 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4514 }},
ba3fe3a9
PB		 4515 .size_of_priv =
4516 sizeof(struct dib0700_adapter_state),
4517 },
4518 },
4519
8a378e85 4520 .num_device_descs = 3,
ba3fe3a9
PB		 4521 .devices = {
4522 { "DiBcom STK807xP reference design",
4523 { &dib0700_usb_id_table[62], NULL },
4524 { NULL },
4525 },
aaeab30f
MCC		 4526 { "Prolink Pixelview SBTVD",
4527 { &dib0700_usb_id_table[63], NULL },
4528 { NULL },
4529 },
8a378e85
F		 4530 { "EvolutePC TVWay+",
4531 { &dib0700_usb_id_table[64], NULL },
4532 { NULL },
4533 },
ba3fe3a9
PB		 4534 },
4535
72b39310 4536 .rc.core = {
f72a27b8 4537 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4538 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4539 .module_name = "dib0700",
0ffd1ab3 4540 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4541 .allowed_protos = RC_BIT_RC5 |
4542 RC_BIT_RC6_MCE |
4543 RC_BIT_NEC,
d8b4b582 4544 .change_protocol = dib0700_change_protocol,
f72a27b8 4545 },
ba3fe3a9
PB		 4546 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4547 .num_adapters = 2,
4548 .adapter = {
4549 {
77eed219
MK		 4550 .num_frontends = 1,
4551 .fe = {{
f8731f4d
OG		 4552 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4553 .pid_filter_count = 32,
03245a5e
OG		 4554 .pid_filter = stk80xx_pid_filter,
4555 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4556 .frontend_attach = stk807xpvr_frontend_attach0,
4557 .tuner_attach = dib807x_tuner_attach,
4558
4559 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4560 }},
ba3fe3a9
PB		 4561 .size_of_priv =
4562 sizeof(struct dib0700_adapter_state),
4563 },
4564 {
77eed219
MK		 4565 .num_frontends = 1,
4566 .fe = {{
f8731f4d
OG		 4567 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4568 .pid_filter_count = 32,
03245a5e
OG		 4569 .pid_filter = stk80xx_pid_filter,
4570 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4571 .frontend_attach = stk807xpvr_frontend_attach1,
4572 .tuner_attach = dib807x_tuner_attach,
4573
4574 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4575 }},
ba3fe3a9
PB		 4576 .size_of_priv =
4577 sizeof(struct dib0700_adapter_state),
4578 },
4579 },
4580
4581 .num_device_descs = 1,
4582 .devices = {
4583 { "DiBcom STK807xPVR reference design",
4584 { &dib0700_usb_id_table[61], NULL },
4585 { NULL },
4586 },
4587 },
4588
72b39310 4589 .rc.core = {
f72a27b8 4590 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4591 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4592 .module_name = "dib0700",
0ffd1ab3 4593 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4594 .allowed_protos = RC_BIT_RC5 |
4595 RC_BIT_RC6_MCE |
4596 RC_BIT_NEC,
d8b4b582 4597 .change_protocol = dib0700_change_protocol,
f72a27b8 4598 },
03245a5e
OG		 4599 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4600 .num_adapters = 1,
4601 .adapter = {
4602 {
77eed219
MK		 4603 .num_frontends = 1,
4604 .fe = {{
03245a5e
OG		 4605 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4606 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4607 .pid_filter_count = 32,
4608 .pid_filter = stk80xx_pid_filter,
4609 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4610 .frontend_attach = stk809x_frontend_attach,
4611 .tuner_attach = dib809x_tuner_attach,
4612
4613 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4614 }},
03245a5e
OG		 4615 .size_of_priv =
4616 sizeof(struct dib0700_adapter_state),
4617 },
4618 },
4619
4620 .num_device_descs = 1,
4621 .devices = {
4622 { "DiBcom STK8096GP reference design",
4623 { &dib0700_usb_id_table[67], NULL },
4624 { NULL },
4625 },
4626 },
4627
be9bae10
OG		 4628 .rc.core = {
4629 .rc_interval = DEFAULT_RC_INTERVAL,
4630 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4631 .module_name = "dib0700",
4632 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4633 .allowed_protos = RC_BIT_RC5 |
4634 RC_BIT_RC6_MCE |
4635 RC_BIT_NEC,
be9bae10
OG		 4636 .change_protocol = dib0700_change_protocol,
4637 },
4638 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4639 .num_adapters = 1,
4640 .adapter = {
4641 {
77eed219
MK		 4642 .num_frontends = 1,
4643 .fe = {{
be9bae10
OG		 4644 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4645 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4646 .pid_filter_count = 32,
4647 .pid_filter = dib90x0_pid_filter,
4648 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4649 .frontend_attach = stk9090m_frontend_attach,
4650 .tuner_attach = dib9090_tuner_attach,
4651
4652 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4653 }},
be9bae10
OG		 4654 .size_of_priv =
4655 sizeof(struct dib0700_adapter_state),
4656 },
4657 },
4658
4659 .num_device_descs = 1,
4660 .devices = {
4661 { "DiBcom STK9090M reference design",
4662 { &dib0700_usb_id_table[69], NULL },
4663 { NULL },
4664 },
4665 },
4666
4667 .rc.core = {
4668 .rc_interval = DEFAULT_RC_INTERVAL,
4669 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4670 .module_name = "dib0700",
4671 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4672 .allowed_protos = RC_BIT_RC5 |
4673 RC_BIT_RC6_MCE |
4674 RC_BIT_NEC,
be9bae10
OG		 4675 .change_protocol = dib0700_change_protocol,
4676 },
4677 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4678 .num_adapters = 1,
4679 .adapter = {
4680 {
77eed219
MK		 4681 .num_frontends = 1,
4682 .fe = {{
be9bae10
OG		 4683 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4684 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4685 .pid_filter_count = 32,
4686 .pid_filter = stk80xx_pid_filter,
4687 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4688 .frontend_attach = nim8096md_frontend_attach,
4689 .tuner_attach = nim8096md_tuner_attach,
4690
4691 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4692 }},
be9bae10
OG		 4693 .size_of_priv =
4694 sizeof(struct dib0700_adapter_state),
4695 },
4696 },
4697
4698 .num_device_descs = 1,
4699 .devices = {
4700 { "DiBcom NIM8096MD reference design",
4701 { &dib0700_usb_id_table[70], NULL },
4702 { NULL },
4703 },
4704 },
4705
4706 .rc.core = {
4707 .rc_interval = DEFAULT_RC_INTERVAL,
4708 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4709 .module_name = "dib0700",
4710 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4711 .allowed_protos = RC_BIT_RC5 |
4712 RC_BIT_RC6_MCE |
4713 RC_BIT_NEC,
be9bae10
OG		 4714 .change_protocol = dib0700_change_protocol,
4715 },
4716 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4717 .num_adapters = 1,
4718 .adapter = {
4719 {
77eed219
MK		 4720 .num_frontends = 1,
4721 .fe = {{
be9bae10
OG		 4722 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4723 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4724 .pid_filter_count = 32,
4725 .pid_filter = dib90x0_pid_filter,
4726 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4727 .frontend_attach = nim9090md_frontend_attach,
4728 .tuner_attach = nim9090md_tuner_attach,
4729
4730 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4731 }},
be9bae10
OG		 4732 .size_of_priv =
4733 sizeof(struct dib0700_adapter_state),
4734 },
4735 },
4736
4737 .num_device_descs = 1,
4738 .devices = {
4739 { "DiBcom NIM9090MD reference design",
4740 { &dib0700_usb_id_table[71], NULL },
4741 { NULL },
4742 },
4743 },
4744
4745 .rc.core = {
4746 .rc_interval = DEFAULT_RC_INTERVAL,
4747 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4748 .module_name = "dib0700",
4749 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4750 .allowed_protos = RC_BIT_RC5 |
4751 RC_BIT_RC6_MCE |
4752 RC_BIT_NEC,
be9bae10
OG		 4753 .change_protocol = dib0700_change_protocol,
4754 },
4755 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4756 .num_adapters = 1,
4757 .adapter = {
4758 {
77eed219
MK		 4759 .num_frontends = 1,
4760 .fe = {{
be9bae10
OG		 4761 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4762 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4763 .pid_filter_count = 32,
4764 .pid_filter = stk70x0p_pid_filter,
4765 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4766 .frontend_attach = nim7090_frontend_attach,
4767 .tuner_attach = nim7090_tuner_attach,
4768
4769 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4770 }},
be9bae10
OG		 4771 .size_of_priv =
4772 sizeof(struct dib0700_adapter_state),
4773 },
4774 },
4775
4776 .num_device_descs = 1,
4777 .devices = {
4778 { "DiBcom NIM7090 reference design",
4779 { &dib0700_usb_id_table[72], NULL },
4780 { NULL },
4781 },
4782 },
4783
4784 .rc.core = {
4785 .rc_interval = DEFAULT_RC_INTERVAL,
4786 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4787 .module_name = "dib0700",
4788 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4789 .allowed_protos = RC_BIT_RC5 |
4790 RC_BIT_RC6_MCE |
4791 RC_BIT_NEC,
be9bae10
OG		 4792 .change_protocol = dib0700_change_protocol,
4793 },
4794 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4795 .num_adapters = 2,
4796 .adapter = {
4797 {
77eed219
MK		 4798 .num_frontends = 1,
4799 .fe = {{
be9bae10
OG		 4800 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4801 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4802 .pid_filter_count = 32,
4803 .pid_filter = stk70x0p_pid_filter,
4804 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4805 .frontend_attach = tfe7090pvr_frontend0_attach,
4806 .tuner_attach = tfe7090pvr_tuner0_attach,
4807
4808 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4809 }},
be9bae10
OG		 4810 .size_of_priv =
4811 sizeof(struct dib0700_adapter_state),
4812 },
4813 {
77eed219
MK		 4814 .num_frontends = 1,
4815 .fe = {{
be9bae10
OG		 4816 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4817 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4818 .pid_filter_count = 32,
4819 .pid_filter = stk70x0p_pid_filter,
4820 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4821 .frontend_attach = tfe7090pvr_frontend1_attach,
4822 .tuner_attach = tfe7090pvr_tuner1_attach,
4823
4824 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4825 }},
be9bae10
OG		 4826 .size_of_priv =
4827 sizeof(struct dib0700_adapter_state),
4828 },
4829 },
4830
4831 .num_device_descs = 1,
4832 .devices = {
4833 { "DiBcom TFE7090PVR reference design",
4834 { &dib0700_usb_id_table[73], NULL },
4835 { NULL },
4836 },
4837 },
4838
8d009a0c
DF		 4839 .rc.core = {
4840 .rc_interval = DEFAULT_RC_INTERVAL,
4841 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4842 .module_name = "dib0700",
4843 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4844 .allowed_protos = RC_BIT_RC5 |
4845 RC_BIT_RC6_MCE |
4846 RC_BIT_NEC,
8d009a0c
DF		 4847 .change_protocol = dib0700_change_protocol,
4848 },
4849 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4850 .num_adapters = 1,
4851 .adapter = {
4852 {
77eed219
MK		 4853 .num_frontends = 1,
4854 .fe = {{
01f16263 4855 .frontend_attach = pctv340e_frontend_attach,
8d009a0c
DF		 4856 .tuner_attach = xc4000_tuner_attach,
4857
4858 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4859 }},
8d009a0c
DF		 4860 .size_of_priv = sizeof(struct
4861 dib0700_adapter_state),
4862 },
4863 },
4864
33fb1681 4865 .num_device_descs = 2,
8d009a0c
DF		 4866 .devices = {
4867 { "Pinnacle PCTV 340e HD Pro USB Stick",
4868 { &dib0700_usb_id_table[76], NULL },
4869 { NULL },
4870 },
33fb1681
DH		 4871 { "Pinnacle PCTV Hybrid Stick Solo",
4872 { &dib0700_usb_id_table[77], NULL },
4873 { NULL },
4874 },
8d009a0c 4875 },
6724a2f4
OG		 4876 .rc.core = {
4877 .rc_interval = DEFAULT_RC_INTERVAL,
4878 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4879 .module_name = "dib0700",
4880 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4881 .allowed_protos = RC_BIT_RC5 |
4882 RC_BIT_RC6_MCE |
4883 RC_BIT_NEC,
6724a2f4
OG		 4884 .change_protocol = dib0700_change_protocol,
4885 },
4886 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4887 .num_adapters = 1,
4888 .adapter = {
4889 {
4890 .num_frontends = 1,
4891 .fe = {{
4892 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4893 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4894 .pid_filter_count = 32,
4895 .pid_filter = stk70x0p_pid_filter,
4896 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
f45f513a
OG		 4897 .frontend_attach = tfe7790p_frontend_attach,
4898 .tuner_attach = tfe7790p_tuner_attach,
b293f304
OG		 4899
4900 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4901 } },
4902
4903 .size_of_priv =
4904 sizeof(struct dib0700_adapter_state),
4905 },
4906 },
4907
4908 .num_device_descs = 1,
4909 .devices = {
f45f513a
OG		 4910 { "DiBcom TFE7790P reference design",
4911 { &dib0700_usb_id_table[78], NULL },
b293f304
OG		 4912 { NULL },
4913 },
4914 },
4915
88f3a358
OG		 4916 .rc.core = {
4917 .rc_interval = DEFAULT_RC_INTERVAL,
4918 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4919 .module_name = "dib0700",
4920 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4921 .allowed_protos = RC_BIT_RC5 |
4922 RC_BIT_RC6_MCE |
4923 RC_BIT_NEC,
88f3a358
OG		 4924 .change_protocol = dib0700_change_protocol,
4925 },
4926 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4927 .num_adapters = 1,
4928 .adapter = {
4929 {
4930 .num_frontends = 1,
4931 .fe = {{
4932 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4933 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4934 .pid_filter_count = 32,
4935 .pid_filter = stk80xx_pid_filter,
4936 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4937 .frontend_attach = tfe8096p_frontend_attach,
4938 .tuner_attach = tfe8096p_tuner_attach,
4939
4940 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4941
4942 } },
4943
4944 .size_of_priv =
4945 sizeof(struct dib0700_adapter_state),
4946 },
4947 },
4948
4949 .num_device_descs = 1,
4950 .devices = {
4951 { "DiBcom TFE8096P reference design",
f45f513a 4952 { &dib0700_usb_id_table[79], NULL },
88f3a358
OG		 4953 { NULL },
4954 },
4955 },
4956
72b39310 4957 .rc.core = {
f72a27b8 4958 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4959 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4960 .module_name = "dib0700",
0ffd1ab3 4961 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4962 .allowed_protos = RC_BIT_RC5 |
4963 RC_BIT_RC6_MCE |
4964 RC_BIT_NEC,
d8b4b582 4965 .change_protocol = dib0700_change_protocol,
f72a27b8 4966 },
01373a5c 4967 },
b7f54910
PB		 4968};
4969
4970int dib0700_device_count = ARRAY_SIZE(dib0700_devices);
Linux 6.x block layer and io_uring tree(s)