diff options
authorTali Perry <>2020-09-20 23:48:09 +0300
committerGreg Kroah-Hartman <>2020-10-07 08:02:53 +0200
commit83884333497fb58f1d96dada1e9995d868e4d38c (patch)
parent95b874d021f62febafa4c74c611b38c2b2c14c82 (diff)
i2c: npcm7xx: Clear LAST bit after a failed transaction.
[ Upstream commit 8947efc077168c53b84d039881a7c967086a248a ] Due to a HW issue, in some scenarios the LAST bit might remain set. This will cause an unexpected NACK after reading 16 bytes on the next read. Example: if user tries to read from a missing device, get a NACK, then if the next command is a long read ( > 16 bytes), the master will stop reading after 16 bytes. To solve this, if a command fails, check if LAST bit is still set. If it does, reset the module. Fixes: 56a1485b102e (i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver) Signed-off-by: Tali Perry <> Signed-off-by: Wolfram Sang <> Signed-off-by: Sasha Levin <>
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c
index dfcf04e1967f..2ad166355ec9 100644
--- a/drivers/i2c/busses/i2c-npcm7xx.c
+++ b/drivers/i2c/busses/i2c-npcm7xx.c
@@ -2163,6 +2163,15 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
if (bus->cmd_err == -EAGAIN)
ret = i2c_recover_bus(adap);
+ /*
+ * After any type of error, check if LAST bit is still set,
+ * due to a HW issue.
+ * It cannot be cleared without resetting the module.
+ */
+ if (bus->cmd_err &&
+ (NPCM_I2CRXF_CTL_LAST_PEC & ioread8(bus->reg + NPCM_I2CRXF_CTL)))
+ npcm_i2c_reset(bus);
/* reenable slave if it was enabled */
if (bus->slave)