KVM: x86/pmu: Zero out LBR capabilities during PMU refresh
authorSean Christopherson <seanjc@google.com>
Sat, 11 Mar 2023 00:46:05 +0000 (16:46 -0800)
committerSean Christopherson <seanjc@google.com>
Thu, 6 Apr 2023 21:58:43 +0000 (14:58 -0700)
commit957d0f70e97bb2257d8bf746ff2f524b793751b3
tree672905caeae738b1aaef9219131c013290c9d6a3
parent3a6de51a437fb4d2433f8a99fb59f43866cdbb98
KVM: x86/pmu: Zero out LBR capabilities during PMU refresh

Zero out the LBR capabilities during PMU refresh to avoid exposing LBRs
to the guest against userspace's wishes. If userspace modifies the
guest's CPUID model or invokes KVM_CAP_PMU_CAPABILITY to disable vPMU
after an initial KVM_SET_CPUID2, but before the first KVM_RUN, KVM will
retain the previous LBR info due to bailing before refreshing the LBR
descriptor.

Note, this is a very theoretical bug, there is no known use case where a
VMM would deliberately enable the vPMU via KVM_SET_CPUID2, and then later
disable the vPMU.

Link: https://lore.kernel.org/r/20230311004618.920745-9-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
arch/x86/kvm/vmx/pmu_intel.c