X-Git-Url: https://git.kernel.dk/?p=fio.git;a=blobdiff_plain;f=arch%2Farch-x86_64.h;h=e686d109e762998fbbfbf2c40d8d857ee2ce47ad;hp=979c3206185f87334488d60179ff9918e13642cf;hb=e8bf784a034fe73aeed99a3360e803af38728126;hpb=db6defc77508f5bf217f0a6768d13426eee21119

diff --git a/arch/arch-x86_64.h b/arch/arch-x86_64.h
index 979c3206..e686d109 100644
--- a/arch/arch-x86_64.h
+++ b/arch/arch-x86_64.h
@@ -1,42 +1,71 @@
-#ifndef ARCH_X86_64_h
-#define ARCH_X86_64_h
+#ifndef ARCH_X86_64_H
+#define ARCH_X86_64_H
 
-#define ARCH	(arch_x86_64)
-
-#ifndef __NR_ioprio_set
-#define __NR_ioprio_set		251
-#define __NR_ioprio_get		252
-#endif
-
-#ifndef __NR_fadvise64
-#define __NR_fadvise64		221
-#endif
+static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
+			    unsigned int *ecx, unsigned int *edx)
+{
+	asm volatile("cpuid"
+		: "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
+		: "0" (*eax), "2" (*ecx)
+		: "memory");
+}
 
-#ifndef __NR_sys_splice
-#define __NR_sys_splice		275
-#define __NR_sys_tee		276
-#define __NR_sys_vmsplice	278
-#endif
+#include "arch-x86-common.h"
 
-#ifndef __NR_async_exec
-#define __NR_async_exec		286
-#define __NR_async_wait		287
-#define __NR_umem_add		288
-#define __NR_async_thread	289
-#endif
+#define FIO_ARCH	(arch_x86_64)
 
 #define	FIO_HUGE_PAGE		2097152
 
-#define FIO_HAVE_SYSLET
-
 #define nop		__asm__ __volatile__("rep;nop": : :"memory")
-#define read_barrier()	asm volatile("lfence":::"memory")
+#define read_barrier()	__asm__ __volatile__("lfence":::"memory")
+#define write_barrier()	__asm__ __volatile__("sfence":::"memory")
 
-static inline unsigned long fio_ffz(unsigned long bitmask)
+static inline unsigned long arch_ffz(unsigned long bitmask)
 {
-	__asm__("bsfq %1,%0" :"=r" (bitmask) :"r" (~bitmask));
+	__asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask));
 	return bitmask;
 }
 
+static inline unsigned long long get_cpu_clock(void)
+{
+	unsigned int lo, hi;
+
+	__asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));
+	return ((unsigned long long) hi << 32ULL) | lo;
+}
+
+#define ARCH_HAVE_FFZ
+#define ARCH_HAVE_SSE4_2
+#define ARCH_HAVE_CPU_CLOCK
+
+#define RDRAND_LONG	".byte 0x48,0x0f,0xc7,0xf0"
+#define RDSEED_LONG	".byte 0x48,0x0f,0xc7,0xf8"
+#define RDRAND_RETRY	100
+
+static inline int arch_rand_long(unsigned long *val)
+{
+	int ok;
+
+	asm volatile("1: " RDRAND_LONG "\n\t"
+		     "jc 2f\n\t"
+		     "decl %0\n\t"
+		     "jnz 1b\n\t"
+		     "2:"
+		     : "=r" (ok), "=a" (*val)
+		     : "0" (RDRAND_RETRY));
+
+	return ok;
+}
+
+static inline int arch_rand_seed(unsigned long *seed)
+{
+	unsigned char ok;
+
+	asm volatile(RDSEED_LONG "\n\t"
+			"setc %0"
+			: "=qm" (ok), "=a" (*seed));
+
+	return 0;
+}
 
 #endif