t/io_uring: only calculate per-file depth if we have files

[fio.git] / arch / arch-x86_64.h

diff --git a/arch/arch-x86_64.h b/arch/arch-x86_64.h
index e686d109e762998fbbfbf2c40d8d857ee2ce47ad..b402dc6df39dbc4c7d677747571b6bb487a9c628 100644 (file)
--- a/arch/arch-x86_64.h
+++ b/arch/arch-x86_64.h
@@ -10,15 +10,15 @@ static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
                : "memory");
 }
 
-#include "arch-x86-common.h"
+#include "arch-x86-common.h" /* IWYU pragma: export */
 
 #define FIO_ARCH       (arch_x86_64)
 
 #define        FIO_HUGE_PAGE           2097152
 
 #define nop            __asm__ __volatile__("rep;nop": : :"memory")
-#define read_barrier() __asm__ __volatile__("lfence":::"memory")
-#define write_barrier()        __asm__ __volatile__("sfence":::"memory")
+#define read_barrier() __asm__ __volatile__("":::"memory")
+#define write_barrier()        __asm__ __volatile__("":::"memory")
 
 static inline unsigned long arch_ffz(unsigned long bitmask)
 {
@@ -26,6 +26,11 @@ static inline unsigned long arch_ffz(unsigned long bitmask)
        return bitmask;
 }
 
+static inline void tsc_barrier(void)
+{
+       __asm__ __volatile__("mfence":::"memory");
+}
+
 static inline unsigned long long get_cpu_clock(void)
 {
        unsigned int lo, hi;
@@ -68,4 +73,117 @@ static inline int arch_rand_seed(unsigned long *seed)
        return 0;
 }
 
+#define __do_syscall0(NUM) ({                  \
+       intptr_t rax;                           \
+                                               \
+       __asm__ volatile(                       \
+               "syscall"                       \
+               : "=a"(rax)     /* %rax */      \
+               : "a"(NUM)      /* %rax */      \
+               : "rcx", "r11", "memory"        \
+       );                                      \
+       rax;                                    \
+})
+
+#define __do_syscall1(NUM, ARG1) ({            \
+       intptr_t rax;                           \
+                                               \
+       __asm__ volatile(                       \
+               "syscall"                       \
+               : "=a"(rax)     /* %rax */      \
+               : "a"((NUM)),   /* %rax */      \
+                 "D"((ARG1))   /* %rdi */      \
+               : "rcx", "r11", "memory"        \
+       );                                      \
+       rax;                                    \
+})
+
+#define __do_syscall2(NUM, ARG1, ARG2) ({      \
+       intptr_t rax;                           \
+                                               \
+       __asm__ volatile(                       \
+               "syscall"                       \
+               : "=a"(rax)     /* %rax */      \
+               : "a"((NUM)),   /* %rax */      \
+                 "D"((ARG1)),  /* %rdi */      \
+                 "S"((ARG2))   /* %rsi */      \
+               : "rcx", "r11", "memory"        \
+       );                                      \
+       rax;                                    \
+})
+
+#define __do_syscall3(NUM, ARG1, ARG2, ARG3) ({        \
+       intptr_t rax;                           \
+                                               \
+       __asm__ volatile(                       \
+               "syscall"                       \
+               : "=a"(rax)     /* %rax */      \
+               : "a"((NUM)),   /* %rax */      \
+                 "D"((ARG1)),  /* %rdi */      \
+                 "S"((ARG2)),  /* %rsi */      \
+                 "d"((ARG3))   /* %rdx */      \
+               : "rcx", "r11", "memory"        \
+       );                                      \
+       rax;                                    \
+})
+
+#define __do_syscall4(NUM, ARG1, ARG2, ARG3, ARG4) ({                  \
+       intptr_t rax;                                                   \
+       register __typeof__(ARG4) __r10 __asm__("r10") = (ARG4);        \
+                                                                       \
+       __asm__ volatile(                                               \
+               "syscall"                                               \
+               : "=a"(rax)     /* %rax */                              \
+               : "a"((NUM)),   /* %rax */                              \
+                 "D"((ARG1)),  /* %rdi */                              \
+                 "S"((ARG2)),  /* %rsi */                              \
+                 "d"((ARG3)),  /* %rdx */                              \
+                 "r"(__r10)    /* %r10 */                              \
+               : "rcx", "r11", "memory"                                \
+       );                                                              \
+       rax;                                                            \
+})
+
+#define __do_syscall5(NUM, ARG1, ARG2, ARG3, ARG4, ARG5) ({            \
+       intptr_t rax;                                                   \
+       register __typeof__(ARG4) __r10 __asm__("r10") = (ARG4);        \
+       register __typeof__(ARG5) __r8 __asm__("r8") = (ARG5);          \
+                                                                       \
+       __asm__ volatile(                                               \
+               "syscall"                                               \
+               : "=a"(rax)     /* %rax */                              \
+               : "a"((NUM)),   /* %rax */                              \
+                 "D"((ARG1)),  /* %rdi */                              \
+                 "S"((ARG2)),  /* %rsi */                              \
+                 "d"((ARG3)),  /* %rdx */                              \
+                 "r"(__r10),   /* %r10 */                              \
+                 "r"(__r8)     /* %r8 */                               \
+               : "rcx", "r11", "memory"                                \
+       );                                                              \
+       rax;                                                            \
+})
+
+#define __do_syscall6(NUM, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6) ({      \
+       intptr_t rax;                                                   \
+       register __typeof__(ARG4) __r10 __asm__("r10") = (ARG4);        \
+       register __typeof__(ARG5) __r8 __asm__("r8") = (ARG5);          \
+       register __typeof__(ARG6) __r9 __asm__("r9") = (ARG6);          \
+                                                                       \
+       __asm__ volatile(                                               \
+               "syscall"                                               \
+               : "=a"(rax)     /* %rax */                              \
+               : "a"((NUM)),   /* %rax */                              \
+                 "D"((ARG1)),  /* %rdi */                              \
+                 "S"((ARG2)),  /* %rsi */                              \
+                 "d"((ARG3)),  /* %rdx */                              \
+                 "r"(__r10),   /* %r10 */                              \
+                 "r"(__r8),    /* %r8 */                               \
+                 "r"(__r9)     /* %r9 */                               \
+               : "rcx", "r11", "memory"                                \
+       );                                                              \
+       rax;                                                            \
+})
+
+#define FIO_ARCH_HAS_SYSCALL
+
 #endif