Make SH port work for packagers that don't differentiate between SH4 and SH4A

[fio.git] / arch / arch-ia64.h

diff --git a/arch/arch-ia64.h b/arch/arch-ia64.h
index 37284b1591c37835da23a4f73dae0d0e2cc2e357..056f6365597424240c73d3129f8d6b74ac1e76f5 100644 (file)
--- a/arch/arch-ia64.h
+++ b/arch/arch-ia64.h
@@ -20,7 +20,7 @@
 
 #define nop            asm volatile ("hint @pause" ::: "memory");
 #define read_barrier() asm volatile ("mf" ::: "memory")
-#define writebarrier() asm volatile ("mf" ::: "memory")
+#define write_barrier()        asm volatile ("mf" ::: "memory")
 
 #define ia64_popcnt(x)                                                 \
 ({                                                                     \
@@ -33,38 +33,16 @@ static inline unsigned long arch_ffz(unsigned long bitmask)
 {
        return ia64_popcnt(bitmask & (~bitmask - 1));
 }
-#define ARCH_HAVE_FFZ
-
-typedef struct {
-       volatile unsigned int lock;
-} spinlock_t;
-
-#define IA64_SPINLOCK_CLOBBERS "ar.ccv", "ar.pfs", "p14", "p15", "r27", "r28", "r29", "r30", "b6", "memory"
 
-static inline void spin_lock(spinlock_t *lock)
+static inline unsigned long get_cpu_clock(void)
 {
-       register volatile unsigned int *ptr asm ("r31") = &lock->lock;
-       unsigned long flags = 0;
+       unsigned long ret;
 
-       __asm__ __volatile__("{\n\t"
-                       "  mov ar.ccv = r0\n\t"
-                       "  mov r28 = ip\n\t"
-                       "  mov r30 = 1;;\n\t"
-                       "}\n\t"
-                       "cmpxchg4.acq r30 = [%1], r30, ar.ccv\n\t"
-                       "movl r29 = ia64_spinlock_contention_pre3_4;;\n\t"
-                       "cmp4.ne p14, p0 = r30, r0\n\t"
-                       "mov b6 = r29;;\n\t"
-                       "mov r27=%2\n\t"
-                       "(p14) br.cond.spnt.many b6"
-                       : "=r"(ptr) : "r"(ptr), "r" (flags)
-                       : IA64_SPINLOCK_CLOBBERS);
+       __asm__ __volatile__("mov %0=ar.itc" : "=r" (ret) : : "memory");
+       return ret;
 }
 
-static inline void spin_unlock(spinlock_t *lock)
-{
-       read_barrier();
-       __asm__ __volatile__("st4.rel.nta [%0] = r0\n\t" :: "r" (lock));
-}
+#define ARCH_HAVE_FFZ
+#define ARCH_HAVE_CPU_CLOCK
 
 #endif