ef4ee032f1ca0922014baca2e0697f210b3a37d7
[fio.git] / arch / arch-sh.h
1 /* Renesas SH (32bit) only */
2
3 #ifndef ARCH_SH_H
4 #define ARCH_SH_H
5
6 #define ARCH    (arch_sh)
7
8 #ifndef __NR_ioprio_set
9 #define __NR_ioprio_set 288
10 #define __NR_ioprio_get 289
11 #endif
12
13 #ifndef __NR_fadvise64
14 #define __NR_fadvise64  250
15 #endif
16
17 #ifndef __NR_sys_splice
18 #define __NR_sys_splice         313
19 #define __NR_sys_tee            315
20 #define __NR_sys_vmsplice       316
21 #endif
22
23 #define nop             __asm__ __volatile__ ("nop": : :"memory")
24
25 #define mb()                                                            \
26         do {                                                            \
27                 if (arch_flags & ARCH_FLAG_1)                           \
28                         __asm__ __volatile__ ("synco": : :"memory");    \
29                 else                                                    \
30                         __asm__ __volatile__ (" " : : : "memory");      \
31         } while (0)
32
33 #define read_barrier()  mb()
34 #define write_barrier() mb()
35
36 #define CPU_HAS_LLSC    0x0040
37
38 static inline int arch_init(char *envp[])
39 {
40         Elf32_auxv_t *auxv;
41
42         while (*envp++ != NULL)
43                 ;
44
45         for (auxv = (Elf32_auxv_t *) envp; auxv->a_type != AT_NULL; auxv++) {
46                 if (auxv->a_type == AT_HWCAP) {
47                         if (auxv->a_un.a_val & CPU_HAS_LLSC) {
48                                 arch_flags |= ARCH_FLAG_1;
49                                 break;
50                         }
51                 }
52         }
53
54         return 0;
55 }
56
57 #define ARCH_HAVE_INIT
58
59 #endif