| 1 | #ifndef ARCH_SPARC_H |
| 2 | #define ARCH_SPARC_H |
| 3 | |
| 4 | #define ARCH (arch_sparc) |
| 5 | |
| 6 | #ifndef __NR_ioprio_set |
| 7 | #define __NR_ioprio_set 196 |
| 8 | #define __NR_ioprio_get 218 |
| 9 | #endif |
| 10 | |
| 11 | #ifndef __NR_fadvise64 |
| 12 | #define __NR_fadvise64 209 |
| 13 | #endif |
| 14 | |
| 15 | #ifndef __NR_sys_splice |
| 16 | #define __NR_sys_splice 232 |
| 17 | #define __NR_sys_tee 280 |
| 18 | #define __NR_sys_vmsplice 25 |
| 19 | #endif |
| 20 | |
| 21 | #define nop do { } while (0) |
| 22 | |
| 23 | #define read_barrier() __asm__ __volatile__ ("" : : : "memory") |
| 24 | #define write_barrier() __asm__ __volatile__ ("" : : : "memory") |
| 25 | |
| 26 | typedef struct { |
| 27 | volatile unsigned char lock; |
| 28 | } spinlock_t; |
| 29 | |
| 30 | static inline void spin_lock(spinlock_t *lock) |
| 31 | { |
| 32 | __asm__ __volatile__( |
| 33 | "\n1:\n\t" |
| 34 | "ldstub [%0], %%g2\n\t" |
| 35 | "orcc %%g2, 0x0, %%g0\n\t" |
| 36 | "bne,a 2f\n\t" |
| 37 | " ldub [%0], %%g2\n\t" |
| 38 | ".subsection 2\n" |
| 39 | "2:\n\t" |
| 40 | "orcc %%g2, 0x0, %%g0\n\t" |
| 41 | "bne,a 2b\n\t" |
| 42 | " ldub [%0], %%g2\n\t" |
| 43 | "b,a 1b\n\t" |
| 44 | ".previous\n" |
| 45 | : /* no outputs */ |
| 46 | : "r" (lock) |
| 47 | : "g2", "memory", "cc"); |
| 48 | } |
| 49 | |
| 50 | static inline void spin_unlock(spinlock_t *lock) |
| 51 | { |
| 52 | __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); |
| 53 | } |
| 54 | |
| 55 | #endif |