[fio.git] / lib / lfsr.c

#include <stdio.h>
#include <math.h>

#include "lfsr.h"

/*
 * LFSR taps retrieved from:
 * http://home1.gte.net/res0658s/electronics/LFSRtaps.html
 *
 * The memory overhead of the following tap table should be relatively small,
 * no more than 400 bytes.
 */
static uint8_t taps[64][FIO_MAX_TAPS] =
{
	{0}, {0}, {0},		//LFSRs with less that 3-bits cannot exist
	{3, 2},			//Tap position for 3-bit LFSR
	{4, 3},			//Tap position for 4-bit LFSR
	{5, 3},			//Tap position for 5-bit LFSR
	{6, 5},			//Tap position for 6-bit LFSR
	{7, 6},			//Tap position for 7-bit LFSR
	{8, 6, 5 ,4},		//Tap position for 8-bit LFSR
	{9, 5},			//Tap position for 9-bit LFSR
	{10, 7},		//Tap position for 10-bit LFSR
	{11, 9},		//Tap position for 11-bit LFSR
	{12, 6, 4, 1},		//Tap position for 12-bit LFSR
	{13, 4, 3, 1},		//Tap position for 13-bit LFSR
	{14, 5, 3, 1},		//Tap position for 14-bit LFSR
	{15, 14},		//Tap position for 15-bit LFSR
	{16, 15, 13, 4},	//Tap position for 16-bit LFSR
	{17, 14},		//Tap position for 17-bit LFSR
	{18, 11},		//Tap position for 18-bit LFSR
	{19, 6, 2, 1},		//Tap position for 19-bit LFSR
	{20, 17},		//Tap position for 20-bit LFSR
	{21, 19},		//Tap position for 21-bit LFSR
	{22, 21},		//Tap position for 22-bit LFSR
	{23, 18},		//Tap position for 23-bit LFSR
	{24, 23, 22, 17},	//Tap position for 24-bit LFSR
	{25, 22},		//Tap position for 25-bit LFSR
	{26, 6, 2, 1},		//Tap position for 26-bit LFSR
	{27, 5, 2, 1},		//Tap position for 27-bit LFSR
	{28, 25},		//Tap position for 28-bit LFSR
	{29, 27},		//Tap position for 29-bit LFSR
	{30, 6, 4, 1},		//Tap position for 30-bit LFSR
	{31, 28},		//Tap position for 31-bit LFSR
	{32, 31, 29, 1},	//Tap position for 32-bit LFSR
	{33, 20},		//Tap position for 33-bit LFSR
	{34, 27, 2, 1},		//Tap position for 34-bit LFSR
	{35, 33},		//Tap position for 35-bit LFSR
	{36, 25},		//Tap position for 36-bit LFSR
	{37, 5, 4, 3, 2, 1},	//Tap position for 37-bit LFSR
	{38, 6, 5, 1},		//Tap position for 38-bit LFSR
	{39, 35},		//Tap position for 39-bit LFSR
	{40, 38, 21, 19},	//Tap position for 40-bit LFSR
	{41, 38},		//Tap position for 41-bit LFSR
	{42, 41, 20, 19},	//Tap position for 42-bit LFSR
	{43, 42, 38, 37},	//Tap position for 43-bit LFSR
	{44, 43, 18, 17},	//Tap position for 44-bit LFSR
	{45, 44, 42, 41},	//Tap position for 45-bit LFSR
	{46, 45, 26, 25},	//Tap position for 46-bit LFSR
	{47, 42},		//Tap position for 47-bit LFSR
	{48, 47, 21, 20},	//Tap position for 48-bit LFSR
	{49, 40},		//Tap position for 49-bit LFSR
	{50, 49, 24, 23},	//Tap position for 50-bit LFSR
	{51, 50, 36, 35},	//Tap position for 51-bit LFSR
	{52, 49},		//Tap position for 52-bit LFSR
	{53, 52, 38, 37},	//Tap position for 53-bit LFSR
	{54, 53, 18, 17},	//Tap position for 54-bit LFSR
	{55, 31},		//Tap position for 55-bit LFSR
	{56, 55, 35, 34},	//Tap position for 56-bit LFSR
	{57, 50},		//Tap position for 57-bit LFSR
	{58, 39},		//Tap position for 58-bit LFSR
	{59, 58, 38, 37},	//Tap position for 59-bit LFSR
	{60, 59},		//Tap position for 60-bit LFSR
	{61, 60, 46, 45},	//Tap position for 61-bit LFSR
	{62, 61, 6, 5},		//Tap position for 62-bit LFSR
	{63, 62},		//Tap position for 63-bit LFSR
};

#define __LFSR_NEXT(__fl, __v)						\
	__v = ((__v >> 1) | __fl->cached_bit) ^			\
			(((__v & 1UL) - 1UL) & __fl->xormask);

static inline void __lfsr_next(struct fio_lfsr *fl, unsigned int spin)
{
	/*
	 * This should be O(1) since most compilers will create a jump table for
	 * this switch.
	 */
	switch (spin) {
		case 16: __LFSR_NEXT(fl, fl->last_val);
		case 15: __LFSR_NEXT(fl, fl->last_val);
		case 14: __LFSR_NEXT(fl, fl->last_val);
		case 13: __LFSR_NEXT(fl, fl->last_val);
		case 12: __LFSR_NEXT(fl, fl->last_val);
		case 11: __LFSR_NEXT(fl, fl->last_val);
		case 10: __LFSR_NEXT(fl, fl->last_val);
		case  9: __LFSR_NEXT(fl, fl->last_val);
		case  8: __LFSR_NEXT(fl, fl->last_val);
		case  7: __LFSR_NEXT(fl, fl->last_val);
		case  6: __LFSR_NEXT(fl, fl->last_val);
		case  5: __LFSR_NEXT(fl, fl->last_val);
		case  4: __LFSR_NEXT(fl, fl->last_val);
		case  3: __LFSR_NEXT(fl, fl->last_val);
		case  2: __LFSR_NEXT(fl, fl->last_val);
		case  1: __LFSR_NEXT(fl, fl->last_val);
		case  0: __LFSR_NEXT(fl, fl->last_val);
		default: break;
	}
}

int lfsr_next(struct fio_lfsr *fl, uint64_t *off, uint64_t last)
{
	int repeat;
	unsigned int spin;

	repeat = fl->num_vals % fl->cycle_length;
	if (repeat == 0)
		spin = fl->spin + 1;
	else
		spin = fl->spin;

	if (fl->num_vals > fl->max_val)
		return 1;

	fl->num_vals++;

	do {
		__lfsr_next(fl, spin);
	} while (fl->last_val > fl->max_val);

	*off = fl->last_val;
	return 0;
}

static uint64_t lfsr_create_xormask(uint8_t *taps)
{
	int i;
	uint64_t xormask = 0;

	for(i = 0; i < FIO_MAX_TAPS && taps[i] != 0; i++)
		xormask |= 1UL << (taps[i] - 1);

	return xormask;
}

static uint8_t *find_lfsr(uint64_t size)
{
	int i;

	for (i = 3; i < 64; i++)
		if ((1UL << i) > size) /* TODO: Explain why. */
			return taps[i];

	return NULL;
}

/*
 * It is well-known that all maximal n-bit LFSRs will start repeating
 * themselves after their 2^n iteration. The introduction of spins however, is
 * possible to create a repetition of a sub-sequence before we hit that mark.
 * This happens if:
 *
 * [1]: ((2^n - 1) * i) % (spin + 1) == 0,
 * where "n" is LFSR's bits and "i" any number within the range [1,spin]
 *
 * It is important to know beforehand if a spin can cause a repetition of a
 * sub-sequence (cycle) and its length. However, calculating (2^n - 1) * i may
 * produce a buffer overflow for "n" close to 64, so we expand the above to:
 *
 * [2]: (2^n - 1) -> (x * (spin + 1) + y), where x >= 0 and 0 <= y <= spin
 *
 * Thus, [1] is equivalent to (y * i) % (spin + 1) == 0;
 * Also, the cycle's length will be (x * i) + (y * i) / (spin + 1)
 */
int prepare_spin(struct fio_lfsr *fl, unsigned int spin)
{
	uint64_t max = (fl->cached_bit << 1) - 1;
	uint64_t x, y;
	int i;

	if (spin > 15)
		return 1;

	x = max / (spin + 1);
	y = max % (spin + 1);
	fl->cycle_length = max;	/* This is the expected cycle */
	fl->spin = spin;

	for (i = 1; i <= spin; i++) {
		if ((y * i) % (spin + 1) == 0) {
			fl->cycle_length = (x * i) + (y * i) / (spin + 1);
			break;
		}
	}

	return 0;
}

int lfsr_reset(struct fio_lfsr *fl, unsigned long seed)
{
	uint64_t bitmask = (fl->cached_bit << 1) - 1;

	fl->num_vals = 0;
	fl->last_val = seed & bitmask;

	/* All-ones state is illegal for XNOR LFSRs */
	if (fl->last_val == bitmask)
		return 1;

	return 0;
}

int lfsr_init(struct fio_lfsr *fl, uint64_t nums, unsigned long seed,
		unsigned int spin)
{
	uint8_t *lfsr_taps;

	lfsr_taps = find_lfsr(nums);
	if (!lfsr_taps)
		return 1;

	fl->max_val = nums - 1;
	fl->xormask = lfsr_create_xormask(lfsr_taps);
	fl->cached_bit = 1UL << (lfsr_taps[0] - 1);

	if (prepare_spin(fl, spin))
		return 1;

	if (lfsr_reset(fl, seed))
		return 1;

	return 0;
}
Commit	Line	Data
8055e41d	1	#include <stdio.h>
d474cbc9	2	#include <math.h>
8055e41d JA	3
	4	#include "lfsr.h"
	5
	6	/*
d474cbc9 AP	7	* LFSR taps retrieved from:
d474cbc9 AP	8	* http://home1.gte.net/res0658s/electronics/LFSRtaps.html
8055e41d	9	*
d474cbc9 AP	10	* The memory overhead of the following tap table should be relatively small,
d474cbc9 AP	11	* no more than 400 bytes.
8055e41d	12	*/
d474cbc9 AP	13	static uint8_t taps[64][FIO_MAX_TAPS] =
d474cbc9 AP	14	{
b136e932 JA	15	{0}, {0}, {0}, //LFSRs with less that 3-bits cannot exist
	16	{3, 2}, //Tap position for 3-bit LFSR
	17	{4, 3}, //Tap position for 4-bit LFSR
	18	{5, 3}, //Tap position for 5-bit LFSR
	19	{6, 5}, //Tap position for 6-bit LFSR
	20	{7, 6}, //Tap position for 7-bit LFSR
	21	{8, 6, 5 ,4}, //Tap position for 8-bit LFSR
	22	{9, 5}, //Tap position for 9-bit LFSR
	23	{10, 7}, //Tap position for 10-bit LFSR
	24	{11, 9}, //Tap position for 11-bit LFSR
	25	{12, 6, 4, 1}, //Tap position for 12-bit LFSR
	26	{13, 4, 3, 1}, //Tap position for 13-bit LFSR
	27	{14, 5, 3, 1}, //Tap position for 14-bit LFSR
	28	{15, 14}, //Tap position for 15-bit LFSR
	29	{16, 15, 13, 4}, //Tap position for 16-bit LFSR
	30	{17, 14}, //Tap position for 17-bit LFSR
	31	{18, 11}, //Tap position for 18-bit LFSR
	32	{19, 6, 2, 1}, //Tap position for 19-bit LFSR
	33	{20, 17}, //Tap position for 20-bit LFSR
	34	{21, 19}, //Tap position for 21-bit LFSR
	35	{22, 21}, //Tap position for 22-bit LFSR
	36	{23, 18}, //Tap position for 23-bit LFSR
	37	{24, 23, 22, 17}, //Tap position for 24-bit LFSR
	38	{25, 22}, //Tap position for 25-bit LFSR
	39	{26, 6, 2, 1}, //Tap position for 26-bit LFSR
	40	{27, 5, 2, 1}, //Tap position for 27-bit LFSR
	41	{28, 25}, //Tap position for 28-bit LFSR
	42	{29, 27}, //Tap position for 29-bit LFSR
	43	{30, 6, 4, 1}, //Tap position for 30-bit LFSR
	44	{31, 28}, //Tap position for 31-bit LFSR
	45	{32, 31, 29, 1}, //Tap position for 32-bit LFSR
	46	{33, 20}, //Tap position for 33-bit LFSR
	47	{34, 27, 2, 1}, //Tap position for 34-bit LFSR
	48	{35, 33}, //Tap position for 35-bit LFSR
	49	{36, 25}, //Tap position for 36-bit LFSR
	50	{37, 5, 4, 3, 2, 1}, //Tap position for 37-bit LFSR
	51	{38, 6, 5, 1}, //Tap position for 38-bit LFSR
	52	{39, 35}, //Tap position for 39-bit LFSR
	53	{40, 38, 21, 19}, //Tap position for 40-bit LFSR
	54	{41, 38}, //Tap position for 41-bit LFSR
	55	{42, 41, 20, 19}, //Tap position for 42-bit LFSR
	56	{43, 42, 38, 37}, //Tap position for 43-bit LFSR
	57	{44, 43, 18, 17}, //Tap position for 44-bit LFSR
	58	{45, 44, 42, 41}, //Tap position for 45-bit LFSR
	59	{46, 45, 26, 25}, //Tap position for 46-bit LFSR
	60	{47, 42}, //Tap position for 47-bit LFSR
	61	{48, 47, 21, 20}, //Tap position for 48-bit LFSR
	62	{49, 40}, //Tap position for 49-bit LFSR
	63	{50, 49, 24, 23}, //Tap position for 50-bit LFSR
	64	{51, 50, 36, 35}, //Tap position for 51-bit LFSR
	65	{52, 49}, //Tap position for 52-bit LFSR
	66	{53, 52, 38, 37}, //Tap position for 53-bit LFSR
	67	{54, 53, 18, 17}, //Tap position for 54-bit LFSR
	68	{55, 31}, //Tap position for 55-bit LFSR
	69	{56, 55, 35, 34}, //Tap position for 56-bit LFSR
	70	{57, 50}, //Tap position for 57-bit LFSR
	71	{58, 39}, //Tap position for 58-bit LFSR
	72	{59, 58, 38, 37}, //Tap position for 59-bit LFSR
	73	{60, 59}, //Tap position for 60-bit LFSR
	74	{61, 60, 46, 45}, //Tap position for 61-bit LFSR
	75	{62, 61, 6, 5}, //Tap position for 62-bit LFSR
	76	{63, 62}, //Tap position for 63-bit LFSR
8055e41d JA	77	};
8055e41d JA	78
d474cbc9 AP	79	#define __LFSR_NEXT(__fl, __v) \
	80	__v = ((__v >> 1) \| __fl->cached_bit) ^ \
	81	(((__v & 1UL) - 1UL) & __fl->xormask);
c4fc0ff1	82
d474cbc9	83	static inline void __lfsr_next(struct fio_lfsr *fl, unsigned int spin)
8055e41d	84	{
d474cbc9 AP	85	/*
	86	* This should be O(1) since most compilers will create a jump table for
	87	* this switch.
	88	*/
	89	switch (spin) {
	90	case 16: __LFSR_NEXT(fl, fl->last_val);
	91	case 15: __LFSR_NEXT(fl, fl->last_val);
	92	case 14: __LFSR_NEXT(fl, fl->last_val);
	93	case 13: __LFSR_NEXT(fl, fl->last_val);
	94	case 12: __LFSR_NEXT(fl, fl->last_val);
	95	case 11: __LFSR_NEXT(fl, fl->last_val);
	96	case 10: __LFSR_NEXT(fl, fl->last_val);
	97	case 9: __LFSR_NEXT(fl, fl->last_val);
	98	case 8: __LFSR_NEXT(fl, fl->last_val);
	99	case 7: __LFSR_NEXT(fl, fl->last_val);
	100	case 6: __LFSR_NEXT(fl, fl->last_val);
	101	case 5: __LFSR_NEXT(fl, fl->last_val);
	102	case 4: __LFSR_NEXT(fl, fl->last_val);
	103	case 3: __LFSR_NEXT(fl, fl->last_val);
	104	case 2: __LFSR_NEXT(fl, fl->last_val);
	105	case 1: __LFSR_NEXT(fl, fl->last_val);
	106	case 0: __LFSR_NEXT(fl, fl->last_val);
	107	default: break;
	108	}
8055e41d JA	109	}
8055e41d JA	110
74776733	111	int lfsr_next(struct fio_lfsr fl, uint64_t off, uint64_t last)
8055e41d	112	{
d474cbc9 AP	113	int repeat;
	114	unsigned int spin;
	115
	116	repeat = fl->num_vals % fl->cycle_length;
	117	if (repeat == 0)
	118	spin = fl->spin + 1;
	119	else
	120	spin = fl->spin;
	121
8055e41d JA	122	if (fl->num_vals > fl->max_val)
	123	return 1;
	124
d474cbc9 AP	125	fl->num_vals++;
d474cbc9 AP	126
8055e41d	127	do {
d474cbc9 AP	128	__lfsr_next(fl, spin);
d474cbc9 AP	129	} while (fl->last_val > fl->max_val);
8055e41d	130
d474cbc9	131	*off = fl->last_val;
8055e41d JA	132	return 0;
	133	}
	134
d474cbc9	135	static uint64_t lfsr_create_xormask(uint8_t *taps)
8055e41d JA	136	{
8055e41d JA	137	int i;
d474cbc9	138	uint64_t xormask = 0;
8055e41d	139
d474cbc9 AP	140	for(i = 0; i < FIO_MAX_TAPS && taps[i] != 0; i++)
d474cbc9 AP	141	xormask \|= 1UL << (taps[i] - 1);
8055e41d	142
d474cbc9	143	return xormask;
8055e41d JA	144	}
8055e41d JA	145
d474cbc9	146	static uint8_t *find_lfsr(uint64_t size)
0415406f	147	{
d474cbc9	148	int i;
0415406f	149
d474cbc9 AP	150	for (i = 3; i < 64; i++)
	151	if ((1UL << i) > size) /* TODO: Explain why. */
	152	return taps[i];
0415406f	153
d474cbc9	154	return NULL;
0415406f JA	155	}
0415406f JA	156
d474cbc9 AP	157	/*
	158	* It is well-known that all maximal n-bit LFSRs will start repeating
	159	* themselves after their 2^n iteration. The introduction of spins however, is
	160	* possible to create a repetition of a sub-sequence before we hit that mark.
	161	* This happens if:
	162	*
	163	* [1]: ((2^n - 1) * i) % (spin + 1) == 0,
	164	* where "n" is LFSR's bits and "i" any number within the range [1,spin]
	165	*
	166	* It is important to know beforehand if a spin can cause a repetition of a
	167	* sub-sequence (cycle) and its length. However, calculating (2^n - 1) * i may
	168	* produce a buffer overflow for "n" close to 64, so we expand the above to:
	169	*
	170	* [2]: (2^n - 1) -> (x * (spin + 1) + y), where x >= 0 and 0 <= y <= spin
	171	*
	172	* Thus, [1] is equivalent to (y * i) % (spin + 1) == 0;
	173	* Also, the cycle's length will be (x * i) + (y * i) / (spin + 1)
	174	*/
	175	int prepare_spin(struct fio_lfsr *fl, unsigned int spin)
8055e41d	176	{
d474cbc9 AP	177	uint64_t max = (fl->cached_bit << 1) - 1;
d474cbc9 AP	178	uint64_t x, y;
8055e41d JA	179	int i;
8055e41d JA	180
d474cbc9	181	if (spin > 15)
8055e41d JA	182	return 1;
8055e41d JA	183
d474cbc9 AP	184	x = max / (spin + 1);
	185	y = max % (spin + 1);
	186	fl->cycle_length = max; /* This is the expected cycle */
	187	fl->spin = spin;
0415406f	188
d474cbc9 AP	189	for (i = 1; i <= spin; i++) {
	190	if ((y * i) % (spin + 1) == 0) {
	191	fl->cycle_length = (x * i) + (y * i) / (spin + 1);
8055e41d	192	break;
d474cbc9	193	}
8055e41d JA	194	}
8055e41d JA	195
d474cbc9 AP	196	return 0;
	197	}
	198
	199	int lfsr_reset(struct fio_lfsr *fl, unsigned long seed)
	200	{
	201	uint64_t bitmask = (fl->cached_bit << 1) - 1;
	202
	203	fl->num_vals = 0;
	204	fl->last_val = seed & bitmask;
	205
	206	/* All-ones state is illegal for XNOR LFSRs */
	207	if (fl->last_val == bitmask)
	208	return 1;
	209
	210	return 0;
	211	}
	212
	213	int lfsr_init(struct fio_lfsr *fl, uint64_t nums, unsigned long seed,
	214	unsigned int spin)
	215	{
	216	uint8_t *lfsr_taps;
	217
	218	lfsr_taps = find_lfsr(nums);
	219	if (!lfsr_taps)
	220	return 1;
	221
	222	fl->max_val = nums - 1;
	223	fl->xormask = lfsr_create_xormask(lfsr_taps);
	224	fl->cached_bit = 1UL << (lfsr_taps[0] - 1);
	225
	226	if (prepare_spin(fl, spin))
	227	return 1;
	228
	229	if (lfsr_reset(fl, seed))
	230	return 1;
	231
8055e41d JA	232	return 0;
8055e41d JA	233	}