projects / fio.git / blame
| Commit | Line | Data |
|---|---|---|
| ebac4655 JA |
1 | #ifndef ARCH_X86_64_h |
| 2 | #define ARCH_X86_64_h | |
| 3 | ||
| 6b13c710 JA |
4 | static inline void do_cpuid(unsigned int *eax, unsigned int *ebx, |
| 5 | unsigned int *ecx, unsigned int *edx) | |
| 6 | { | |
| 7 | asm volatile("cpuid" | |
| 8afbf874 | 8 | : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx) |
| 6b13c710 JA |
9 | : "0" (*eax), "2" (*ecx) |
| 10 | : "memory"); | |
| 11 | } | |
| 12 | ||
| fa80feae JA |
13 | #include "arch-x86-common.h" |
| 14 | ||
| cca84643 | 15 | #define FIO_ARCH (arch_x86_64) |
| ebac4655 JA |
16 | |
| 17 | #ifndef __NR_ioprio_set | |
| 18 | #define __NR_ioprio_set 251 | |
| 19 | #define __NR_ioprio_get 252 | |
| 20 | #endif | |
| 21 | ||
| 22 | #ifndef __NR_fadvise64 | |
| 23 | #define __NR_fadvise64 221 | |
| 24 | #endif | |
| 25 | ||
| 8756e4d4 JA |
26 | #ifndef __NR_sys_splice |
| 27 | #define __NR_sys_splice 275 | |
| 28 | #define __NR_sys_tee 276 | |
| 29 | #define __NR_sys_vmsplice 278 | |
| 30 | #endif | |
| 31 | ||
| 6a79a4cb JA |
32 | #ifndef __NR_shmget |
| 33 | #define __NR_shmget 29 | |
| 34 | #define __NR_shmat 30 | |
| 35 | #define __NR_shmctl 31 | |
| 36 | #define __NR_shmdt 67 | |
| 37 | #endif | |
| 38 | ||
| cb25df61 JA |
39 | #define FIO_HUGE_PAGE 2097152 |
| 40 | ||
| db6defc7 | 41 | #define nop __asm__ __volatile__("rep;nop": : :"memory") |
| 44c47feb JA |
42 | #define read_barrier() __asm__ __volatile__("lfence":::"memory") |
| 43 | #define write_barrier() __asm__ __volatile__("sfence":::"memory") | |
| ebac4655 | 44 | |
| 0ce8b119 | 45 | static inline unsigned long arch_ffz(unsigned long bitmask) |
| 8f7e39dd | 46 | { |
| 0ce8b119 | 47 | __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask)); |
| 8f7e39dd JA |
48 | return bitmask; |
| 49 | } | |
| c223da83 JA |
50 | |
| 51 | static inline unsigned long long get_cpu_clock(void) | |
| 52 | { | |
| 53 | unsigned int lo, hi; | |
| 54 | ||
| 55 | __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi)); | |
| 56 | return ((unsigned long long) hi << 32ULL) | lo; | |
| 57 | } | |
| 58 | ||
| 21df44a2 | 59 | #define ARCH_HAVE_FFZ |
| 2f68124f | 60 | #define ARCH_HAVE_SSE4_2 |
| c223da83 | 61 | #define ARCH_HAVE_CPU_CLOCK |
| 8f7e39dd | 62 | |
| 16dc0710 JA |
63 | #define RDRAND_LONG ".byte 0x48,0x0f,0xc7,0xf0" |
| 64 | #define RDSEED_LONG ".byte 0x48,0x0f,0xc7,0xf8" | |
| 65 | #define RDRAND_RETRY 100 | |
| 66 | ||
| 67 | static inline int arch_rand_long(unsigned long *val) | |
| 68 | { | |
| 69 | int ok; | |
| 70 | ||
| 71 | asm volatile("1: " RDRAND_LONG "\n\t" | |
| 72 | "jc 2f\n\t" | |
| 73 | "decl %0\n\t" | |
| 74 | "jnz 1b\n\t" | |
| 75 | "2:" | |
| 76 | : "=r" (ok), "=a" (*val) | |
| 77 | : "0" (RDRAND_RETRY)); | |
| 78 | ||
| 79 | return ok; | |
| 80 | } | |
| 81 | ||
| 82 | static inline int arch_rand_seed(unsigned long *seed) | |
| 83 | { | |
| 84 | unsigned char ok; | |
| 85 | ||
| 86 | asm volatile(RDSEED_LONG "\n\t" | |
| 87 | "setc %0" | |
| 88 | : "=qm" (ok), "=a" (*seed)); | |
| 89 | ||
| 90 | return 0; | |
| 91 | } | |
| 92 | ||
| ebac4655 | 93 | #endif |